package rexcode/isa/arm64 - pkg.odin-lang.org

Address_Mode ¶
Source

Address_Mode :: enum u8 {
	OFFSET,         // [Xn, #imm]   (imm may be 0)
	PRE_INDEXED,    // [Xn, #imm]!
	POST_INDEXED,   // [Xn], #imm
	REG_OFFSET,     // [Xn, Xm{, LSL #s}]
	EXT_REG_OFFSET, // [Xn, Wm, SXTW|UXTW|SXTX #s]
	LITERAL,        // PC-rel target (LDR literal)
}

Clobber ¶
Source

Clobber :: struct {
	written:      Operand_Set,
	// operand slots whose register/SIMD reg is written
	read:         Operand_Set,
	// operand slots whose register / mem-base is read
	implicit_wr:  Clobber_Regs,
	// implicit reg writes (LR on BL/BLR)
	implicit_rd:  Clobber_Regs,
	// implicit reg reads (LR on RET, SP on PAC*SP)
	nzcv_wr:      NZCV_Flags,
	// condition flags written (ADDS/SUBS/ANDS, CMP, FCMP, CCMP...)
	nzcv_undef:   NZCV_Flags,
	// condition flags left UNKNOWN — rare in A64, usually empty
	nzcv_rd:      NZCV_Flags,
	// condition flags read (B.cond, CSEL, ADC/SBC, CCMP...)
	fpsr_wr:      FPSR_Flags,
	// FP cumulative exception/saturation flags this op may raise
	reads_fpcr:   bool,
	// consumes the rounding mode / FP control from FPCR
	writes_mem:   bool,
	reads_mem:    bool,
	side_effects: Side_Effects,
}

Clobber_Reg ¶
Source

Clobber_Reg :: enum u8 {
	LR,  // x30, implicit link written by BL/BLR, implicitly read by RET
	SP,  // sp,  implicit base on PACIASP/AUTIASP (and stack-relative forms)
	X16, // implicit modifier register for PAC*1716 / AUT*1716
	X17, // implicit pointer register (read-modify-write) for PAC*1716 / AUT*1716
}

Clobber_Regs ¶
Source

Clobber_Regs :: distinct bit_set[Clobber_Reg; u8]

Cond ¶
Source

Cond :: enum u8 {
	EQ = 0x0, 
	NE = 0x1, 
	CS = 0x2, // unsigned higher or same (alias HS)
	CC = 0x3, // unsigned lower (alias LO)
	MI = 0x4, 
	PL = 0x5, 
	VS = 0x6, 
	VC = 0x7, 
	HI = 0x8, 
	LS = 0x9, 
	GE = 0xA, 
	LT = 0xB, 
	GT = 0xC, 
	LE = 0xD, 
	AL = 0xE, 
	NV = 0xF, 
}

Related Procedures With Parameters

Related Constants

Decode_Entry ¶
Source

Decode_Entry :: struct #packed {
	mnemonic: Mnemonic,
	// 2
	ops:      [5]Operand_Type,
	// 4
	enc:      [5]Operand_Encoding,
	// 4
	bits:     u32,
	// 4 -- static field pattern
	mask:     u32,
	// 4 -- which bits are static
	feature:  Feature,
	// 1
	flags:    Encoding_Flags,
}

Decode_Index ¶
Source

Decode_Index :: struct #packed {
	start: u16,
	count: u16,
}

Encode_Run ¶
Source

Encode_Run :: struct {
	start: u32,
	count: u32,
}

Companion run index: ENCODE_RUNS[mnemonic] -> contiguous run in ENCODE_FORMS.

Encoding_Flags ¶
Source

Encoding_Flags :: distinct bit_field u8 {
	branch:         bool | 1,
	cond_branch:    bool | 1,
	writes_pc:      bool | 1,
	sets_flags:     bool | 1,
	is_64:          bool | 1,
	explicit_count: u8 | 3,
}

Endianness ¶
Source

Endianness :: enum u8 {
	LITTLE = 0, 
	BIG    = 1, 
}

Endianness for storing 32-bit instructions to []u8. ARM defaults to little-endian instruction storage on every modern platform; BE-8 mode stores data BE but instructions LE; BE-32 (legacy) is rare on AArch64 and unsupported in mainstream toolchains.

Related Procedures With Parameters

Error ¶
Source

Error :: rexcode_isa.Error

Error_Code ¶
Source

Error_Code :: rexcode_isa.Error_Code

Extend ¶
Source

Extend :: enum u8 {
	UXTB = 0, 
	UXTH = 1, 
	UXTW = 2, 
	UXTX = 3, 
	SXTB = 4, 
	SXTH = 5, 
	SXTW = 6, 
	SXTX = 7, 
}

Related Procedures With Parameters

emit_add_r_r_ex
emit_adds_r_r_ex
emit_cmn_r_ex
emit_cmp_r_ex
emit_sub_r_r_ex
emit_subs_r_r_ex
inst_add_r_r_ex
inst_adds_r_r_ex
inst_cmn_r_ex
inst_cmp_r_ex
inst_sub_r_r_ex
inst_subs_r_r_ex
mem_ext
op_extended
emit_add (procedure groups)
emit_adds (procedure groups)
emit_cmn (procedure groups)
emit_cmp (procedure groups)
emit_sub (procedure groups)
emit_subs (procedure groups)
inst_add (procedure groups)
inst_adds (procedure groups)
inst_cmn (procedure groups)
inst_cmp (procedure groups)
inst_sub (procedure groups)
inst_subs (procedure groups)

Extended_Reg ¶
Source

Extended_Reg :: struct #packed {
	reg:    Register,
	// 4
	extend: Extend,
	// 1
	amount: u8,
}

FPSR_Flag ¶
Source

FPSR_Flag :: enum u8 {
	IOC, // invalid operation
	DZC, // divide by zero
	OFC, // overflow
	UFC, // underflow
	IXC, // inexact
	IDC, // input denormal
	QC,  // cumulative saturation (Advanced SIMD saturating ops)
}

FPSR_Flags ¶
Source

FPSR_Flags :: distinct bit_set[FPSR_Flag; u8]

Feature ¶
Source

Feature :: enum u8 {
	BASE,   // AArch64 base integer ISA
	FP,     // scalar FP (FPSCR-using; FADD/FCMP/FCVT/etc.)
	NEON,   // Advanced SIMD vector ops
	CRYPTO, // AES, SHA1, SHA2, SHA3, SM3, SM4
	CRC32,  // CRC32B/H/W/X + CRC32CB/H/W/X
	LSE,    // Large System Extensions (atomic LDADD/LDCLR/...)
	LSE2,   // single-copy-atomicity load/store
	FP16,   // half-precision FP arithmetic
	BF16,   // BFloat16
	DOT,    // SDOT/UDOT integer dot product
	PAC,    // Pointer Authentication
	BTI,    // Branch Target Indicator
	MTE,    // Memory Tagging
	SVE,    // Scalable Vector Extension
	SVE2, 
	SME,    // Scalable Matrix Extension
	AMX,    // Apple Matrix Extension (undocumented A13+/M1+ coprocessor)
}

Architectural feature this entry requires (for filtering and tagging at decode/print time).

Instruction ¶
Source

Instruction :: struct #align (64) {
	ops:           [5]Operand `fmt:"v,operand_count"`,
	// 5 * size_of(Operand) = 55
	mnemonic:      Mnemonic,
	// 2
	operand_count: u8,
	// 1
	flags:         Instruction_Flags,
	// 1
	length:        u8,
	// 55 is odd, so mnemonic's alignment costs a byte here; 3 more reach 64.
	_:             [3]u8,
}

Sized and aligned to a cache line, deliberately.

The payload is 45 bytes -- shrinking Operand to 10 got it there -- but leaving the struct at 48 was measurably worse than padding it back out. With #packed the struct aligns to 1, so a 48-byte stride straddles a line boundary 75% of the time and a 64-byte one straddled 100% of the time (the heap base is not line-aligned either). Decode writes whole Instructions, and unaligned stores cost enough that on an i7-9750H this layout decodes ~21% faster than the 48-byte packed one -- while writing MORE bytes. The gap holds even when the whole array is L1-resident, so it is split-store cost at the store ports, not cache-line fetches.

Encode is within 1% and a pure read traversal is ~9% slower at working sets past L2, both of which the decode win dwarfs for real workloads.

The spare bytes are free: they cost nothing over a 48-byte struct that straddles, and new fields land in them without changing the layout.

Related Procedures With Parameters

pack_operand_inline

Related Procedures With Returns

Instruction_Flags ¶
Source

Instruction_Flags :: distinct bit_field u8 {
	_: u8 | 8,
}

Instruction_Info ¶
Source

Instruction_Info :: struct {
	offset:       u32,
	decode_entry: u16,
	_:            u16,
}

Label_Definition ¶
Source

Label_Definition :: rexcode_isa.Label_Definition

Related Constants

LABEL_UNDEFINED

Label_Map ¶
Source

Label_Map :: rexcode_isa.Label_Map

Label_Names ¶
Source

Label_Names :: map[rexcode_isa.Label_Offset]string

Related Procedures With Parameters

Label_Offset ¶
Source

Label_Offset :: rexcode_isa.Label_Offset

Memory ¶
Source

Memory :: distinct bit_field u64 {
	base:   Register | 16,
	index:  Register | 16,
	disp:   i32 | 23,
	extend: Extend | 3,
	shift:  u8 | 3,
	mode:   Address_Mode | 3,
}

Memory operand packed into one word: base + optional index + signed disp + addressing metadata. Index is NONE for non-register-offset modes.

A bit_field rather than a struct because this sits in every Operand, so its width is multiplied by four in every Instruction. Field syntax is unchanged (m.base, m.disp) and composite literals still work, so this is invisible to callers.

Widths: registers get 16 bits. Register itself is a u32, but every class legal in an address lives entirely in its low 16 bits -- only a system register (class REG_SYS) carries field bits above them, and one is never a valid base or index -- so the truncation is lossless and the NONE sentinel (0xFFFF) round-trips. That leaves 23 bits for disp (+/-4.19M) against a worst case of 65,520 -- LDR Q, [Xn, #imm12*16] -- the largest displacement any A64 addressing mode can encode, so there is ~64x headroom.

Related Procedures With Parameters

Related Procedures With Returns

Mnemonic ¶
Source

Mnemonic :: enum u16 {
	INVALID        = 0, 
	ADD, 
	ADDS, 
	SUB, 
	SUBS,               // optional LSL #12 carried in shift field
	MOVZ, 
	MOVN, 
	MOVK,               // 16-bit imm + 2-bit hw
	ADR, 
	ADRP,               // PC-relative address
	AND, 
	ANDS, 
	ORR, 
	EOR, 
	BIC, 
	BICS, 
	ORN, 
	EON, 
	LSL, 
	LSR, 
	ASR, 
	ROR,                // register and immediate forms both
	UDIV, 
	SDIV, 
	MADD, 
	MSUB,               // 64x64+64 -> 64 (or 32 variant)
	SMADDL, 
	SMSUBL, 
	UMADDL, 
	UMSUBL,             // 32x32+64 -> 64
	SMULH, 
	UMULH,              // 64x64 -> high 64
	CLZ, 
	CLS, 
	RBIT, 
	REV, 
	REV16, 
	REV32, 
	CSEL, 
	CSINC, 
	CSINV, 
	CSNEG, 
	CCMP, 
	CCMN, 
	// Aliases of the above with the condition inverted; every assembler both
	// accepts and prefers these spellings.
	CSET, 
	CSETM,              // CSINC/CSINV with Rn = Rm = ZR
	CINC, 
	CINV, 
	CNEG,               // CSINC/CSINV/CSNEG with Rn = Rm
	EXTR, 
	B, 
	BL,                 // 26-bit PC-rel
	BR, 
	BLR, 
	RET,                // register indirect
	// One member per condition, the way an assembler spells them and the way
	// x86 does its Jcc. The condition is not an operand: it is four bits of
	// the opcode, and splitting it lets each entry record the flags it
	// actually reads -- b.eq consults Z alone, b.le consults N, Z and V --
	// where a single B_COND had to claim all four for every condition.
	B_EQ, 
	B_NE, 
	B_CS, 
	B_CC,               // B.cond -- 19-bit PC-rel
	B_MI, 
	B_PL, 
	B_VS, 
	B_VC, 
	B_HI, 
	B_LS, 
	B_GE, 
	B_LT, 
	B_GT, 
	B_LE, 
	B_AL, 
	B_NV, 
	CBZ, 
	CBNZ,               // 19-bit PC-rel + Rt
	TBZ, 
	TBNZ,               // 14-bit PC-rel + bit position
	// Plain (unsigned offset / signed unscaled / pre / post)
	LDR, 
	STR,                // X/W variants (matched by reg width)
	LDRB, 
	STRB, 
	LDRSB, 
	LDRH, 
	STRH, 
	LDRSH, 
	LDRSW, 
	// Pair
	LDP, 
	STP, 
	LDPSW, 
	// Acquire / release
	LDAR, 
	STLR, 
	LDARB, 
	STLRB, 
	LDARH, 
	STLRH, 
	// Exclusive (load-linked / store-conditional)
	LDXR, 
	STXR, 
	LDAXR, 
	STLXR, 
	NOP, 
	YIELD, 
	WFE, 
	WFI, 
	SEV, 
	SEVL, 
	HINT, 
	MRS, 
	MSR, 
	ISB, 
	DSB, 
	DMB, 
	SVC, 
	HVC, 
	SMC, 
	BRK, 
	HLT, 
	ERET, 
	FMOV,               // reg-reg / imm / between int/FP
	FABS, 
	FNEG, 
	FSQRT, 
	FADD, 
	FSUB, 
	FMUL, 
	FDIV, 
	FNMUL, 
	FMADD, 
	FMSUB, 
	FNMADD, 
	FNMSUB, 
	FCMP, 
	FCMPE, 
	FCSEL, 
	FMAX, 
	FMIN, 
	FMAXNM, 
	FMINNM, 
	FCVT,               // between single/double/half
	SCVTF, 
	UCVTF, 
	FCVTZS, 
	FCVTZU, 
	FCVTAS, 
	FCVTAU, 
	FCVTNS, 
	FCVTNU, 
	FCVTPS, 
	FCVTPU, 
	FCVTMS, 
	FCVTMU, 
	FRINTA, 
	FRINTI, 
	FRINTM, 
	FRINTN, 
	FRINTP, 
	FRINTX, 
	FRINTZ, 
	// -------------------------------------------------------------------------
	// Logical immediate (bitmask-encoded; N:imms:immr)
	// -------------------------------------------------------------------------
	TST,                // ANDS with Rd=ZR
	// -------------------------------------------------------------------------
	// Additional load/store addressing modes
	// -------------------------------------------------------------------------
	LDUR, 
	STUR, 
	LDURB, 
	STURB, 
	LDURSB, 
	LDURH, 
	STURH, 
	LDURSH, 
	LDURSW, 
	LDNP, 
	STNP,               // non-temporal pair
	LDXP, 
	STXP, 
	LDAXP, 
	STLXP,              // exclusive pair
	LDXRB, 
	STXRB, 
	LDAXRB, 
	STLXRB,             // exclusive byte
	LDXRH, 
	STXRH, 
	LDAXRH, 
	STLXRH,             // exclusive halfword
	LDAPR, 
	LDAPRB, 
	LDAPRH,             // load-acquire RCpc
	// -------------------------------------------------------------------------
	// LSE atomics (8 ops x 4 acq/rel x 2 width = 64 forms, named by op only;
	// size and acq/rel encoded in the bits + flags)
	// -------------------------------------------------------------------------
	LDADD, 
	LDADDA, 
	LDADDL, 
	LDADDAL, 
	LDCLR, 
	LDCLRA, 
	LDCLRL, 
	LDCLRAL, 
	LDEOR, 
	LDEORA, 
	LDEORL, 
	LDEORAL, 
	LDSET, 
	LDSETA, 
	LDSETL, 
	LDSETAL, 
	LDSMAX, 
	LDSMAXA, 
	LDSMAXL, 
	LDSMAXAL, 
	LDSMIN, 
	LDSMINA, 
	LDSMINL, 
	LDSMINAL, 
	LDUMAX, 
	LDUMAXA, 
	LDUMAXL, 
	LDUMAXAL, 
	LDUMIN, 
	LDUMINA, 
	LDUMINL, 
	LDUMINAL, 
	SWP, 
	SWPA, 
	SWPL, 
	SWPAL, 
	CAS, 
	CASA, 
	CASL, 
	CASAL,              // 32/64
	CASB, 
	CASAB, 
	CASLB, 
	CASALB,             // byte
	CASH, 
	CASAH, 
	CASLH, 
	CASALH,             // half
	CASP, 
	CASPA, 
	CASPL, 
	CASPAL,             // pair (W,W)/(X,X)
	// -------------------------------------------------------------------------
	// Pointer Authentication (PAC v8.3-A)
	// -------------------------------------------------------------------------
	PACIA, 
	PACIB, 
	PACDA, 
	PACDB, 
	PACIZA, 
	PACIZB, 
	PACDZA, 
	PACDZB,             // implicit-zero variants
	AUTIA, 
	AUTIB, 
	AUTDA, 
	AUTDB, 
	AUTIZA, 
	AUTIZB, 
	AUTDZA, 
	AUTDZB, 
	PACIASP, 
	PACIBSP, 
	AUTIASP, 
	AUTIBSP,            // hint-encoded SP variants
	PACIA1716, 
	PACIB1716, 
	AUTIA1716, 
	AUTIB1716, 
	PACGA, 
	XPACI, 
	XPACD, 
	XPACLRI, 
	RETAA, 
	RETAB, 
	BRAA, 
	BRAB, 
	BRAAZ, 
	BRABZ, 
	BLRAA, 
	BLRAB, 
	BLRAAZ, 
	BLRABZ, 
	ERETAA, 
	ERETAB, 
	// -------------------------------------------------------------------------
	// Branch Target Identification (BTI v8.5-A)
	// -------------------------------------------------------------------------
	BTI,                // single mnemonic; modifier (c/j/jc) in operand
	// -------------------------------------------------------------------------
	// Memory Tagging Extension (MTE v8.5-A)
	// -------------------------------------------------------------------------
	IRG, 
	ADDG, 
	SUBG, 
	GMI, 
	SUBP, 
	SUBPS, 
	LDG, 
	STG, 
	ST2G, 
	STZG, 
	STZ2G, 
	STGP, 
	LDGM, 
	STGM, 
	STZGM, 
	// -------------------------------------------------------------------------
	// CRC32 (v8.0-A optional, mandatory v8.1+)
	// -------------------------------------------------------------------------
	CRC32B, 
	CRC32H, 
	CRC32W, 
	CRC32X, 
	CRC32CB, 
	CRC32CH, 
	CRC32CW, 
	CRC32CX, 
	// -------------------------------------------------------------------------
	// Crypto: AES / SHA / SM3 / SM4 / polynomial multiply
	// -------------------------------------------------------------------------
	AESE, 
	AESD, 
	AESMC, 
	AESIMC, 
	SHA1H, 
	SHA1C, 
	SHA1P, 
	SHA1M, 
	SHA1SU0, 
	SHA1SU1, 
	SHA256H, 
	SHA256H2, 
	SHA256SU0, 
	SHA256SU1, 
	SHA512H, 
	SHA512H2, 
	SHA512SU0, 
	SHA512SU1,          // v8.2-A
	EOR3, 
	BCAX, 
	RAX1, 
	XAR,                // SHA3 v8.2-A
	SM3PARTW1, 
	SM3PARTW2, 
	SM3SS1, 
	SM3TT1A, 
	SM3TT1B, 
	SM3TT2A, 
	SM3TT2B, 
	SM4E, 
	SM4EKEY, 
	PMULL, 
	PMULL2, 
	// -------------------------------------------------------------------------
	// BFloat16 (BF16; v8.6-A)
	// -------------------------------------------------------------------------
	BFCVT,              // BFloat16 from single
	BFDOT, 
	BFMMLA, 
	BFMLALB, 
	BFMLALT, 
	BFCVTN, 
	BFCVTN2, 
	// 3-same arithmetic
	MUL, 
	MLA, 
	MLS, 
	NEG, 
	ABS, 
	SHADD, 
	UHADD, 
	SHSUB, 
	UHSUB, 
	SRHADD, 
	URHADD, 
	SQADD, 
	UQADD, 
	SQSUB, 
	UQSUB, 
	SMAX, 
	UMAX, 
	SMIN, 
	UMIN, 
	SABD, 
	UABD, 
	SABA, 
	UABA, 
	ADDP, 
	ADDV, 
	SADDLP, 
	UADDLP, 
	SADALP, 
	UADALP, 
	SADDLV, 
	UADDLV, 
	SMAXV, 
	UMAXV, 
	SMINV, 
	UMINV, 
	SMAXP, 
	UMAXP, 
	SMINP, 
	UMINP, 
	// long / wide / narrowing
	SADDL, 
	SADDL2, 
	UADDL, 
	UADDL2, 
	SSUBL, 
	SSUBL2, 
	USUBL, 
	USUBL2, 
	SADDW, 
	SADDW2, 
	UADDW, 
	UADDW2, 
	SSUBW, 
	SSUBW2, 
	USUBW, 
	USUBW2, 
	RADDHN, 
	RADDHN2, 
	RSUBHN, 
	RSUBHN2, 
	ADDHN, 
	ADDHN2, 
	SUBHN, 
	SUBHN2, 
	XTN, 
	XTN2, 
	SQXTN, 
	SQXTN2, 
	UQXTN, 
	UQXTN2, 
	SQXTUN, 
	SQXTUN2, 
	// multiply long / multiply-accumulate long
	SMULL, 
	SMULL2, 
	UMULL, 
	UMULL2, 
	SMLAL, 
	SMLAL2, 
	UMLAL, 
	UMLAL2, 
	SMLSL, 
	SMLSL2, 
	UMLSL, 
	UMLSL2, 
	SQDMULL, 
	SQDMULL2, 
	SQDMLAL, 
	SQDMLAL2, 
	SQDMLSL, 
	SQDMLSL2, 
	SQDMULH, 
	SQRDMULH, 
	// dot product
	SDOT, 
	UDOT, 
	USDOT, 
	// FP vector
	FMLA, 
	FMLS, 
	FMULX, 
	FMAXP, 
	FMINP, 
	FMAXNMP, 
	FMINNMP, 
	FMAXV, 
	FMINV, 
	FMAXNMV, 
	FMINNMV, 
	FRECPE, 
	FRSQRTE, 
	FRECPS, 
	FRSQRTS, 
	FRECPX, 
	FADDP, 
	FCVTL, 
	FCVTL2, 
	FCVTN, 
	FCVTN2, 
	FCVTXN, 
	FCVTXN2, 
	// FP compare (vector)
	FCMEQ, 
	FCMGE, 
	FCMGT, 
	FCMLE, 
	FCMLT, 
	FACGE, 
	FACGT, 
	// Integer compare (vector)
	CMEQ, 
	CMGE, 
	CMGT, 
	CMHI, 
	CMHS, 
	CMLE, 
	CMLT, 
	CMTST, 
	// Logical (vector)
	MVN, 
	BIT, 
	BIF, 
	BSL, 
	// Shifts
	SHL, 
	SQSHL, 
	SQSHLU, 
	SRSHL, 
	URSHL, 
	SSHR, 
	USHR, 
	SSRA, 
	USRA, 
	SRSHR, 
	URSHR, 
	SRSRA, 
	URSRA, 
	SSHL, 
	USHL, 
	SLI, 
	SRI, 
	SSHLL, 
	SSHLL2, 
	USHLL, 
	USHLL2, 
	SXTL, 
	SXTL2, 
	UXTL, 
	UXTL2,              // aliases of SSHLL/USHLL with imm=0
	SHRN, 
	SHRN2, 
	RSHRN, 
	RSHRN2, 
	SQSHRN, 
	SQSHRN2, 
	UQSHRN, 
	UQSHRN2, 
	SQRSHRN, 
	SQRSHRN2, 
	UQRSHRN, 
	UQRSHRN2, 
	SQSHRUN, 
	SQSHRUN2, 
	SQRSHRUN, 
	SQRSHRUN2, 
	// Misc / permute / bit
	DUP, 
	INS, 
	MOV, 
	EXT, 
	TBL, 
	TBX, 
	ZIP1, 
	ZIP2, 
	UZP1, 
	UZP2, 
	TRN1, 
	TRN2, 
	NOT, 
	REV64, 
	CNT, 
	URECPE, 
	URSQRTE, 
	// Vector immediate
	MOVI, 
	MVNI, 
	// NEON load/store
	LD1, 
	LD2, 
	LD3, 
	LD4,                // multiple structures
	ST1, 
	ST2, 
	ST3, 
	ST4, 
	LD1R, 
	LD2R, 
	LD3R, 
	LD4R,               // load-and-replicate to all lanes
	// Integer arithmetic (predicated, destructive merging)
	SUBR, 
	ASRR, 
	LSLR, 
	LSRR, 
	// FP arithmetic (unpredicated)
	FTSMUL, 
	// FP arithmetic (predicated, destructive merging)
	FSUBR, 
	FDIVR, 
	FNMLA, 
	FNMLS, 
	// Predicate logical / move
	NAND, 
	NOR, 
	SEL, 
	ORRS, 
	EORS, 
	NANDS, 
	NORS, 
	ORNS, 
	MOVS, 
	PTRUE, 
	PTRUES, 
	PFALSE, 
	PFIRST, 
	PNEXT, 
	BRKA, 
	BRKB, 
	BRKAS, 
	BRKBS, 
	BRKPA, 
	BRKPB, 
	BRKN, 
	RDFFR, 
	WRFFR, 
	SETFFR, 
	// Integer compare and set predicate
	CMPEQ, 
	CMPNE, 
	CMPGE, 
	CMPGT, 
	CMPLE, 
	CMPLT, 
	CMPHI, 
	CMPHS, 
	CMPLO, 
	CMPLS, 
	// FP compare and set predicate
	FCMNE, 
	FCMUO, 
	// Permute / move / replicate
	INSR, 
	CPY, 
	COMPACT, 
	// Loads / stores (contiguous)
	LD1B, 
	LD1H, 
	LD1W, 
	LD1D, 
	LD1SB, 
	LD1SH, 
	LD1SW, 
	ST1B, 
	ST1H, 
	ST1W, 
	ST1D, 
	LDFF1B, 
	LDFF1H, 
	LDFF1W, 
	LDFF1D,             // first-faulting
	// SVE2 additions
	WHILEGE, 
	WHILEGT, 
	WHILELE, 
	WHILELT, 
	WHILEHI, 
	WHILEHS, 
	WHILELO, 
	WHILELS, 
	SQRDMLAH, 
	SQRDMLSH, 
	ADCLB, 
	ADCLT, 
	SBCLB, 
	SBCLT, 
	MATCH, 
	NMATCH, 
	HISTCNT, 
	HISTSEG, 
	// -------------------------------------------------------------------------
	// SME (Scalable Matrix Extension)
	// -------------------------------------------------------------------------
	SMSTART, 
	SMSTOP, 
	RDSVL, 
	ADDHA, 
	ADDVA, 
	ZERO, 
	FMOPA, 
	FMOPS, 
	BFMOPA, 
	BFMOPS, 
	SMOPA, 
	SMOPS, 
	UMOPA, 
	UMOPS, 
	USMOPA, 
	SUMOPA, 
	CNTB, 
	CNTH, 
	CNTW, 
	CNTD, 
	INCB, 
	INCH, 
	INCW, 
	INCD, 
	DECB, 
	DECH, 
	DECW, 
	DECD, 
	SQINCB, 
	SQINCH, 
	SQINCW, 
	SQINCD, 
	SQDECB, 
	SQDECH, 
	SQDECW, 
	SQDECD, 
	UQINCB, 
	UQINCH, 
	UQINCW, 
	UQINCD, 
	UQDECB, 
	UQDECH, 
	UQDECW, 
	UQDECD, 
	CNTP, 
	INCP, 
	DECP, 
	SQINCP, 
	SQDECP, 
	UQINCP, 
	UQDECP, 
	// -------------------------------------------------------------------------
	// SME tile slice load/store (LD1B/H/W/D/Q to ZA tile slice; ST1 reverse)
	// -------------------------------------------------------------------------
	LD1Q, 
	ST1Q, 
	// MOVA between Z register and tile slice (both directions)
	MOVA, 
	// -------------------------------------------------------------------------
	// NEON complex FP multiply-add (v8.3-A FCMA extension)
	// -------------------------------------------------------------------------
	FCMLA, 
	FCADD, 
	// -------------------------------------------------------------------------
	// SVE prefetch, non-temporal load/store, EXT/SPLICE/INDEX
	// -------------------------------------------------------------------------
	PRFB, 
	PRFH, 
	PRFW, 
	PRFD, 
	LDNT1B, 
	LDNT1H, 
	LDNT1W, 
	LDNT1D, 
	STNT1B, 
	STNT1H, 
	STNT1W, 
	STNT1D, 
	SPLICE, 
	INDEX, 
	// -------------------------------------------------------------------------
	// SVE2 bitwise select family + polynomial multiply
	// -------------------------------------------------------------------------
	BSL1N, 
	BSL2N, 
	NBSL, 
	PMUL, 
	PMULLB, 
	PMULLT, 
	// -------------------------------------------------------------------------
	// SVE BF16 conversions (BFCVT in SVE form)
	// -------------------------------------------------------------------------
	BFCVTNT, 
	// -------------------------------------------------------------------------
	// PAC-authenticated loads (v8.3-A)
	// -------------------------------------------------------------------------
	LDRAA, 
	LDRAB, 
	// -------------------------------------------------------------------------
	// Transactional Memory Extension (TME, v9.0-A)
	// -------------------------------------------------------------------------
	TSTART, 
	TCOMMIT, 
	TCANCEL, 
	TTEST, 
	// -------------------------------------------------------------------------
	// Wait with timeout (v8.7-A)
	// -------------------------------------------------------------------------
	WFET, 
	WFIT, 
	// -------------------------------------------------------------------------
	// Branch consistency hint (v8.8-A BC.cond)
	// -------------------------------------------------------------------------
	// BC.cond: the consistent-branch form, same 16 conditions.
	BC_EQ, 
	BC_NE, 
	BC_CS, 
	BC_CC, 
	BC_MI, 
	BC_PL, 
	BC_VS, 
	BC_VC, 
	BC_HI, 
	BC_LS, 
	BC_GE, 
	BC_LT, 
	BC_GT, 
	BC_LE, 
	BC_AL, 
	BC_NV, 
	// -------------------------------------------------------------------------
	// Sign/zero extend aliases (canonical names for SBFM/UBFM specific cases)
	// -------------------------------------------------------------------------
	UXTB, 
	UXTH, 
	UXTW,               // unsigned extends (UBFM aliases)
	SXTB, 
	SXTH, 
	SXTW,               // signed extends (SBFM aliases)
	// -------------------------------------------------------------------------
	// Carry arithmetic (add/sub with carry)
	// -------------------------------------------------------------------------
	ADC, 
	ADCS, 
	SBC, 
	SBCS, 
	NGC, 
	NGCS,               // NGC Rd, Rm = SBC Rd, ZR, Rm; NGCS similar
	// -------------------------------------------------------------------------
	// RCpc / LDAPUR / STLUR (v8.4-A unscaled release-consistency loads/stores)
	// -------------------------------------------------------------------------
	LDAPUR, 
	STLUR,              // 32/64-bit word
	LDAPURB, 
	STLURB, 
	LDAPURH, 
	STLURH,             // byte / half
	LDAPURSB, 
	LDAPURSH, 
	LDAPURSW,           // signed extending
	// -------------------------------------------------------------------------
	// SVE BF16 predicated arithmetic (3-same)
	// -------------------------------------------------------------------------
	BFADD, 
	BFSUB, 
	BFMUL, 
	BFMLA, 
	BFMLS, 
	// -------------------------------------------------------------------------
	// Speculation / profiling barriers + speculation hints
	// -------------------------------------------------------------------------
	SB,                 // Speculation Barrier (v8.0)
	CSDB,               // Consumption of Speculative Data Barrier
	DGH,                // Data Gathering Hint (v8.5-A)
	PSB_CSYNC,          // Profile Synchronization Barrier
	TSB_CSYNC,          // Trace Synchronization Barrier
	BTI_J, 
	BTI_C, 
	BTI_JC,             // explicit BTI variants
	// -------------------------------------------------------------------------
	// SVE2.1 / SME2 -- BF16 unpredicated + clamp/min/max + multi-vector
	// -------------------------------------------------------------------------
	BFCLAMP,            // BFCLAMP Zd.H, Zn.H, Zm.H
	BFMAXNM, 
	BFMINNM,            // BF16 min/max-num predicated
	// SME2 multi-vector: contiguous LD/ST and select-table lookup
	LUTI2, 
	LUTI4,              // LUTI2/4 table lookup (byte)
	// SME2 ZIP / UZP multi-way (3-vector and 4-vector forms)
	ZIP, 
	UZP, 
	// -------------------------------------------------------------------------
	// RME (Realm Management Extension, ARMv9-A)
	// -------------------------------------------------------------------------
	TLBI_RPALOS, 
	TLBI_RPAOS,         // Realm physical address space
	AT_S1E1A,           // stage-1 translate with implicit authority
	DC_CIPAPA, 
	DC_CIGDPAPA,        // physical-address cache mgmt
	TLBI_PAALL, 
	TLBI_PAALLOS, 
	// -------------------------------------------------------------------------
	// Apple AMX (undocumented vendor coprocessor; A13+/M1+)
	// -------------------------------------------------------------------------
	// 
	// All AMX instructions share the encoding 0x00201000 | (op << 5) | xn,
	// where xn is a 5-bit operand (typically a GPR holding pointer +
	// control word). The reserved bit pattern lives in the system-
	// instruction space (op0 = 0b0000) so it doesn't collide with any
	// standard A64 mnemonic. Reverse-engineered ops:
	// 
	//   00 LDX     load X register set (16 input rows)
	//   01 LDY     load Y register set (16 input rows)
	//   02 STX     store X
	//   03 STY     store Y
	//   04 LDZ     load Z accumulator (64 rows)
	//   05 STZ     store Z
	//   06 LDZI    load Z interleaved
	//   07 STZI    store Z interleaved
	//   08 EXTRX   extract from X
	//   09 EXTRY   extract from Y
	//   10 FMA64   FP64 fused multiply-add
	//   11 FMS64   FP64 fused multiply-subtract
	//   12 FMA32   FP32 fused multiply-add
	//   13 FMS32   FP32 fused multiply-subtract
	//   14 MAC16   int16 multiply-accumulate
	//   15 FMA16   FP16 fused multiply-add
	//   16 FMS16   FP16 fused multiply-subtract
	//   17 SET     enable AMX (operand=0)
	//   18 CLR     disable AMX
	//   19 VECINT  integer vector ops
	//   20 VECFP   FP vector ops
	//   21 MATINT  integer matrix ops
	//   22 MATFP   FP matrix ops
	//   23 GENLUT  general lookup table (A14+)
	AMX_LDX, 
	AMX_LDY, 
	AMX_STX, 
	AMX_STY, 
	AMX_LDZ, 
	AMX_STZ, 
	AMX_LDZI, 
	AMX_STZI, 
	AMX_EXTRX, 
	AMX_EXTRY, 
	AMX_FMA64, 
	AMX_FMS64, 
	AMX_FMA32, 
	AMX_FMS32, 
	AMX_MAC16, 
	AMX_FMA16, 
	AMX_FMS16, 
	AMX_SET, 
	AMX_CLR, 
	AMX_VECINT, 
	AMX_VECFP, 
	AMX_MATINT, 
	AMX_MATFP, 
	AMX_GENLUT, 
	// -------------------------------------------------------------------------
	// MOPS (Memory Operations, v8.8-A)
	// -------------------------------------------------------------------------
	// 
	// Each operation is split into a 3-instruction Prologue/Main/Epilogue
	// sequence that all share the same {Xd, Xs, Xn} destructive operands.
	//   CPY*  : general memcpy (may overlap)
	//   CPYF* : forward-only memcpy
	//   SET*  : memset (Xs holds the byte value)
	CPYP, 
	CPYM, 
	CPYE, 
	CPYFP, 
	CPYFM, 
	CPYFE, 
	SETP, 
	SETM, 
	SETE, 
	// -------------------------------------------------------------------------
	// Cache management (SYS-encoded under op0=3 or op0=0)
	// -------------------------------------------------------------------------
	// 
	// Data cache:
	DC_IVAC, 
	DC_ISW, 
	DC_CSW, 
	DC_CISW, 
	DC_ZVA, 
	DC_CVAC, 
	DC_CVAU, 
	DC_CIVAC, 
	// Instruction cache:
	IC_IALLUIS, 
	IC_IALLU, 
	IC_IVAU, 
	// Address translate (PE current EL):
	AT_S1E1R, 
	AT_S1E1W, 
	AT_S1E0R, 
	AT_S1E0W, 
	AT_S1E2R, 
	AT_S1E2W, 
	AT_S1E3R, 
	AT_S1E3W, 
	AT_S12E1R, 
	AT_S12E1W, 
	AT_S12E0R, 
	AT_S12E0W, 
	// TLB invalidate (the practical subset):
	TLBI_VMALLE1, 
	TLBI_VMALLE1IS, 
	TLBI_VAE1, 
	TLBI_VAE1IS, 
	TLBI_ASIDE1, 
	TLBI_ASIDE1IS, 
	TLBI_VAAE1, 
	TLBI_VAAE1IS, 
	TLBI_VALE1, 
	TLBI_VALE1IS, 
	TLBI_VAALE1, 
	TLBI_VAALE1IS, 
	TLBI_ALLE1, 
	TLBI_ALLE1IS, 
	TLBI_ALLE2, 
	TLBI_ALLE2IS, 
	TLBI_ALLE3, 
	TLBI_ALLE3IS, 
	// -------------------------------------------------------------------------
	// Prefetch
	// -------------------------------------------------------------------------
	PRFM, 
	PRFUM, 
	// -------------------------------------------------------------------------
	// Aliases (printed canonically; encode the underlying operation with
	// Rd=ZR or Rn=ZR fixed).
	// -------------------------------------------------------------------------
	NEGS,               // NEGS Rd, Rm{,shift} =  SUBS Rd, ZR, Rm{,shift}
	CMP,                // CMP Rn, Rm{,shift}  =  SUBS ZR, Rn, Rm{,shift}
	CMN,                // CMN Rn, Rm{,shift}  =  ADDS ZR, Rn, Rm{,shift}
}

Related Procedures With Parameters

NZCV_Flag ¶
Source

NZCV_Flag :: enum u8 {
	N, // negative result
	Z, // zero result
	C, // carry-out / no-borrow (unsigned sense)
	V, // signed overflow
}

NZCV_Flags ¶
Source

NZCV_Flags :: distinct bit_set[NZCV_Flag; u8]

Operand ¶
Source

Operand :: struct #packed {
	using _:    struct #packed #raw_union {
		reg:       Register,
		// 4
		mem:       Memory,
		// 8
		immediate: i64,
		// 8
		relative:  i64,
		// 8
		shifted:   Shifted_Reg,
		// 6
		extended:  Extended_Reg,
		// 6
		cond:      u8,
		// 1
		za:        ZA_Slice,
	},
	// 8 total -- the largest member wins
	kind:       Operand_Kind,
	// 1
	size:       u8,
	// How many consecutive registers the syntax writes as a list, starting at
	// `reg`: `{v0.16b, v1.16b}` is 2. Zero means the operand is a plain
	// register. The count belongs to the instruction form rather than to the
	// caller -- LD2 always names two -- so it comes from the encoding.
	list_count: u8,
}

11-byte tagged operand. The union holds whichever payload matches kind.

Related Procedures With Parameters

pack_operand_inline

Related Procedures With Returns

Operand_Encoding ¶
Source

Operand_Encoding :: enum u8 {
	NONE, 
	IMPL,                    // implicit; no bits emitted
	// ---- Register slots (5-bit hw fields) ----
	RD,                      // bits 0-4
	RT,                      // bits 0-4 (alias of RD used in loads)
	RN,                      // bits 5-9
	RT2,                     // bits 10-14
	RA,                      // bits 10-14 (alias of RT2 used in MADD/MSUB)
	RM,                      // bits 16-20
	RN_RM,                   // bits 5-9 AND 16-20 -- one register into both source
	// ---- Immediates ----
	IMM12,                   // bits 10-21
	IMM16,                   // bits 5-20
	IMM6,                    // bits 10-15  (shift amount; SHAMT)
	IMM9,                    // bits 12-20  (signed 9-bit; LDUR/pre/post)
	IMM_HW,                  // bits 21-22  (MOVZ/MOVN/MOVK hw field; value is shift/16)
	// LSR/ASR by immediate are UBFM/SBFM Rd, Rn, #shift, #(31|63): the shift
	// goes to immr and imms is a constant already fixed in the form's bits,
	// so unlike LSL (ENC_LSL_IMM_*) only one field is operand-driven.
	ENC_SHIFT_IMMR,          // bits 16-21  (immr; LSR/ASR immediate aliases)
	// RDSVL / the RDVL family put their signed 6-bit immediate at bits 10:5,
	// not where IMM6 (bits 15:10) writes it.
	ENC_IMM6_LO,             // bits  5-10  (signed 6-bit; RDSVL)
	IMM_SH12,                // bit  22     (ADD/SUB imm: LSL #12 flag)
	SHIFT_TYPE,              // bits 22-23  (LSL/LSR/ASR/ROR for shifted-register)
	EXT_OPT,                 // bits 13-15  (extend type for extended-register)
	EXT_IMM3,                // bits 10-12  (extend amount)
	COND_HI,                 // bits 12-15  (CSEL/CSINC/CSINV/CSNEG, FCSEL, CCMP)
	COND_HI_INV,             // bits 12-15, stored inverted -- the cset/cinc aliases
	// read as `cset Wd, eq` but encode CSINC's cond as NE
	COND_LO,                 // bits  0-3   (B.cond)
	NZCV_FIELD,              // bits  0-3   (CCMP/CCMN immediate NZCV)
	SYS_FIELD,               // bits 5-19   (MRS/MSR: op0/op1/CRn/CRm/op2)
	HINT_FIELD,              // bits 5-11   (HINT type)
	BARRIER_FIELD,           // bits 8-11   (DMB/DSB/ISB barrier type)
	// ---- Memory operand composites ----
	OFFSET_BASE_U12,         // [Xn, #imm * size] with imm12 scaled by data size
	OFFSET_BASE_S9,          // [Xn, #imm] signed-9 unscaled (LDUR/STUR)
	OFFSET_BASE_PRE,         // [Xn, #imm]!   signed-9 pre-index
	OFFSET_BASE_POST,        // [Xn], #imm    signed-9 post-index
	OFFSET_BASE_A,           // [Xn]          no displacement (exclusives, acquire/release, LSE)
	// LDP/STP family. Nothing like the single-register modes above: the
	// displacement is a signed 7-bit value SCALED by the transfer size at
	// bits 21:15 (single-register forms use an unscaled 9-bit at 20:12), and
	// bits 11:10 are part of Rt2 here, so the pre/post markers the
	// single-register encodings OR in would corrupt the second register.
	// The scale cannot be read off the register type -- LDPSW pairs X
	// registers but loads words (scale 4), STGP pairs X registers and scales
	// by 16 -- so it is spelled out per encoding. The addressing mode lives
	// in the form's bits[24:23] (01 post, 10 signed offset, 11 pre), which
	// is where the decoder reads it back from.
	OFFSET_PAIR_4,           // [Xn{, #imm}] / [Xn, #imm]! / [Xn], #imm -- imm7 x 4
	OFFSET_PAIR_8,           //                                            imm7 x 8
	OFFSET_PAIR_16,          //                                            imm7 x 16
	OFFSET_REG,              // [Xn, Xm{, LSL #s}] or [Xn, Wm|Xm, <extend> {#s}];
	//   option (15:13) comes from the operand's mode/extend
	OFFSET_EXT,              // subsumed by OFFSET_REG; kept because these values are
	// ---- PC-relative ----
	BRANCH_26,               // B / BL  (operand-driven 26-bit field, scaled ×4)
	BRANCH_19,               // B.cond / CBZ / LDR literal
	BRANCH_14,               // TBZ / TBNZ
	BRANCH_PG21,             // ADR / ADRP: imm21 split as immlo[29-30] + immhi[5-23]
	// ---- TBZ/TBNZ bit position (split field b5 + b40) ----
	TBZ_BIT,                 // b5 at bit 31, b40 at bits 19-23
	// ---- NEON / SIMD specific ---------------------------------------------
	VD, 
	VN, 
	VM,                      // 5-bit V regs at bits 0-4 / 5-9 / 16-20 (alias of RD/RN/RM)
	VA,                      // R4-type 3rd source (FMLA-ish) at bits 10-14
	NEON_IMM8_FMOV,          // 8-bit imm split (abc at 18-16, defgh at 9-5)
	NEON_INDEX_H,            // 2-bit H lane index
	NEON_INDEX_S,            // S lane index
	NEON_INDEX_D,            // D lane index
	// ---- NEON shift-by-immediate (immh:immb at bits 22:16) ----
	// The element-size marker bit is fixed in the entry's `bits`; the operand
	// drives only the low bits. Left: low = shift. Right: low = esize - shift.
	NEON_SHL_IMM, 
	NEON_SHR_IMM, 
	// ---- NEON copy/permute index fields ----
	// The element-size marker bit lives in the entry `bits`; the lane index
	// operand drives the bits above it (DUP/INS imm5, INS imm4) or the plain
	// imm4 (EXT). The decoder recovers the element size from imm5's marker.
	VN_VM_DUP,               // one V reg packed into BOTH Vn (9:5) and Vm (20:16) (MOV = ORR alias)
	NEON_IDX5,               // element lane index in imm5 (20:16); index << (markerbit+1)
	NEON_IDX4,               // INS source lane index in imm4 (14:11); index << markerbit
	NEON_EXT_IDX,            // EXT byte index in imm4 (14:11)
	// ---- MSR (immediate to PSTATE): pstate field selector op1:op2 ----
	// User passes the combined 6-bit selector (op1<<3 | op2); op1 lands at
	// bits 18:16, op2 at bits 7:5. The #imm goes to CRm (bits 11:8) via
	// BARRIER_FIELD, which it shares with the DMB/DSB barrier encoding.
	IMM5_HI,                 // generic 5-bit immediate at bits 20:16 (CCMP/CCMN immediate)
	MSR_PSTATE,              // PSTATE field selector: op1 at 18:16, op2 at 7:5
	FMOV_SCALAR_IMM,         // scalar FMOV 8-bit float immediate at bits 20:13
	// ---- SVE alias duplicated predicate/Z fields + EXT byte index ----
	// MOV/NOT/MOVS predicate aliases are EOR/ORR/AND with a duplicated field;
	// MOV (predicated) is SEL with Zm = Zd. The source register is packed into
	// every slot it occupies so the alias round-trips to the canonical bytes.
	PG4_PM_DUP,              // Pg at 10:13 AND Pm at 16:19 (NOT = EOR Pd,Pg/z,Pn,Pg)
	PN_PM_DUP,               // Pn at 5:8 AND Pm at 16:19 (MOVS/MOV-pred: Pm = Pn)
	PN_PG_PM_DUP,            // Pn at 5:8, Pg at 10:13, Pm at 16:19 (MOV Pd,Pn)
	ZD_ZM_DUP,               // Zd at 0:4 AND Zm at 16:20 (MOV Zd,Pg/m,Zn = SEL ...,Zd)
	SVE_EXT_IMM,             // SVE EXT byte index: imm8h at 20:16, imm8l at 12:10
	ZA_TILE_LOW,             // SME ZA accumulator tile number at bits 2:0 (ADDHA/ADDVA)
	// ---- NEON single-structure lane index (LD1..4_LANE / ST1..4_LANE) ----
	// The lane index is split across Q (bit 30), S (bit 12) and size (bits
	// 11:10) in an element-size-dependent way; the structure-size/count opcode
	// bits stay fixed in the entry `bits`.
	NEON_LANE_B,             // .B[i]: Q<<3 | S<<2 | size  (i in 0..15)
	NEON_LANE_H,             // .H[i]: Q<<2 | S<<1 | bit11 (i in 0..7)
	NEON_LANE_S,             // .S[i]: Q<<1 | S            (i in 0..3)
	NEON_LANE_D,             // .D[i]: Q                   (i in 0..1)
	// ---- SVE2 XAR rotate amount (tszh:tszl:imm3 split) ----
	// V = 2*esize - amount placed as tszh(23:22):tszl(20:19):imm3(18:16);
	// esize comes from the form's Z register (highest set bit of tszh:tszl).
	SVE_XAR_SHIFT, 
	// ---- LSE atomics ------------------------------------------------------
	ATOMIC_RS,               // Rs (source / compare) at bits 16-20
	ATOMIC_RT,               // Rt (target) at bits 0-4
	ATOMIC_RN,               // Rn (address) at bits 5-9
	// ---- Bitmask logical immediate (N:imms:immr at bits 22 / 15:10 / 21:16) ----
	BITMASK_FIELD, 
	// ---- Predicate (SVE) --------------------------------------------------
	PD, 
	PN, 
	PM,                      // P-reg positions (bits 0-3 / 5-8 / 16-19 in many SVE forms)
	PG,                      // governing predicate (3-bit at bits 10-12)
	PG4,                     // governing predicate (4-bit at bits 10-13, e.g. predicate logical)
	PM3,                     // 3-bit Pm at bits 15:13 (SME outer products / a few SVE forms)
	// ---- SVE immediates ---------------------------------------------------
	SVE_IMM8,                // signed 8-bit at bits 12-5 (DUP/CPY/ADD imm)
	SVE_IMM5,                // 5-bit at bits 20-16 (INDEX imm, etc.)
	SVE_SHIFT_TSZ_IMM,       // tsz:imm3 at bits 22:16, encodes element-size + shift amount
	SVE_PATTERN,             // 5-bit pattern (POW2/VL1.../ALL) at bits 9-5 (PTRUE)
	IMM_MUL4, 
	// ---- SVE memory operands ---------------------------------------------
	SVE_OFFSET_BASE_SS,      // [Xn, Xm, LSL #s] -- scalar+scalar contiguous
	SVE_OFFSET_BASE_SI,      // [Xn, #imm, MUL VL] -- scalar+imm (signed 4-bit times VL)
	SVE_OFFSET_BASE_VEC,     // [Xn, Zm.S/D, UXTW|SXTW|LSL #s] -- scalar base + vec offset
	SVE_OFFSET_VEC_BASE,     // [Zn.S/D, #imm5] -- vector base + scalar imm
	// ---- SVE indexed lane field (FMLA Zda.T, Zn.T, Zm.T[i]) -----------
	SVE_FMLA_IDX_H,          // .H index: i3 split as (bit 22, bits 20:19), Zm@18:16
	SVE_FMLA_IDX_S,          // .S index: i2 at bits 20:19, Zm@18:16
	SVE_FMLA_IDX_D,          // .D index: i1 at bit 20, Zm@19:16
	// ---- SME ZA tile + slice fields --------------------------------------
	ZA_TILE_NUM_B,           // single-tile (ZA0.B): no field (implicit)
	ZA_TILE_NUM_H,           // tile number bit at bit 22 (ZA0.H..ZA1.H)
	ZA_TILE_NUM_S,           // tile number bits 23:22 (ZA0.S..ZA3.S)
	ZA_TILE_NUM_D,           // tile number bits 23:21 (ZA0.D..ZA7.D)
	SME_PATTERN_FIELD,       // 5-bit SME pattern (for ZERO list / SMSTART/SMSTOP)
	// ---- SME tile-slice descriptor field (LD1B/LD1H/LD1W/LD1D/LD1Q) ------
	// 
	// User passes a packed immediate carrying the full slice descriptor:
	//   bits  3:0  = imm offset within tile (0..15 for .B, 0..7 for .H, ...)
	//   bit  4     = direction (0=H, 1=V)
	//   bits  6:5  = Ws index (Ws is W12+this, range 0..3)
	//   bits 10:7  = tile number (only the low bits relevant per element size)
	// 
	// The encoder unpacks and places the bits per element-size layout.
	SME_SLICE_B,             // byte tile (single tile, imm 0..15)
	SME_SLICE_H,             // half tile (2 tiles, imm 0..7)
	SME_SLICE_W,             // word tile (4 tiles, imm 0..3)
	SME_SLICE_D,             // double tile (8 tiles, imm 0..1)
	SME_SLICE_Q,             // quad tile (16 tiles, imm 0)
	// ---- Misc new operand-encoding values (batch 3) ----
	ENC_FCMLA_ROT,           // 2-bit rotation at bits 13:12 (FCMLA)
	NEON_IDX2,               // 2-bit lane index at bits 13:12 (SM3TT)
	// A register the syntax writes as a list of N consecutive registers,
	// `{v0.16b, v1.16b}`. Same bits as VD / VN; N is fixed by the form (LD2
	// always names two), so it rides on the encoding rather than the operand
	// type -- otherwise every count would need its own type per arrangement.
	VD_LIST1, 
	VD_LIST2, 
	VD_LIST3, 
	VD_LIST4, 
	PNG,                     // bits 10-12, predicate-as-counter (SME2)
	ENC_ZT0,                 // no bits at all; there is only one ZT register
	LUTI_IDX,                // bits 15-16, LUTI2/LUTI4 table index
	SME_ZA_ARRAY,            // `za[w12, 0]` -- a vector of the ZA array, not a tile
	SME_ZA_MASK,             // bits 0-7, ZERO's per-tile mask
	// SVE scalar+scalar addressing scales the index by the access size, and the
	// assembler wants that written out (`[x0, x0, lsl #2]`). The amount is a
	// property of the form, so it rides on the encoding.
	SVE_OFFSET_BASE_SS1, 
	SVE_OFFSET_BASE_SS2, 
	SVE_OFFSET_BASE_SS3, 
	SVE_OFFSET_BASE_SS4, 
	// SVE gather/scatter: the index is a vector, and the syntax names its
	// element size and how the base extends it. A 32-bit index is written
	// `uxtw`/`sxtw` (bit 22 says which); a 64-bit one needs neither.
	SVE_OFFSET_BASE_VEC_S, 
	SVE_OFFSET_BASE_VEC_D, 
	// A scatter lays the same information out differently: bit 22 is the
	// index's width and bit 14 is the extend, where a gather has the extend at
	// 22 and takes the width from its opcode.
	SVE_OFFSET_BASE_VECST_S, 
	SVE_OFFSET_BASE_VECST_D, 
	SVE_IMM5A,               // 5-bit at bits 5-9 (INDEX first operand)
	// A Z register whose element size is not in the static pattern but in the
	// instruction's own tsz field, so decode has to read it out of the word
	// rather than take it from the form (SVE2 XAR).
	VD_TSZ,                  // bits 0-4
	VN_TSZ,                  // bits 5-9
	VN_LIST1, 
	VN_LIST2, 
	VN_LIST3, 
	VN_LIST4, 
	ENC_FCADD_ROT,           // 1-bit rotation at bit 12 (FCADD)
	ENC_SVE_PRFOP,           // 4-bit prefetch op at bits 3:0 (SVE PRFB/H/W/D)
	ENC_LDRAA_IMM10,         // signed 10-bit imm10 at bits 21:12, scaled by 8 (LDRAA/B)
	// ---- Batch 5 composite-packed encodings ----
	// 
	// LSL_IMM Wd, Wn, #imm = UBFM Wd, Wn, #(-imm % 32), #(31-imm).
	// The single user-passed shift amount drives BOTH immr (21:16) and
	// imms (15:10). Width 32 (W) vs 64 (X) selects the modulus and N bit.
	ENC_LSL_IMM_W,           // W-form: immr = (-imm) & 31, imms = 31 - imm
	ENC_LSL_IMM_X,           // X-form: immr = (-imm) & 63, imms = 63 - imm
	// ROR_IMM Rd, Rn, #imm = EXTR Rd, Rn, Rn, #imm. The Rn register is
	// packed at BOTH the Rn slot (9:5) AND the Rm slot (20:16). The shift
	// amount goes to imms (15:10).
	ENC_DUAL_RN_RM,          // packs op.reg at both bits 9:5 AND bits 20:16
	ENC_ROR_SHIFT,           // 6-bit shift amount at bits 15:10 (imms slot)
	// SME2 multi-vector lists at the Vd/Vn/Vm slots. The user passes the
	// first register of the list; the matcher validates alignment.
	// Encoding just packs the first register's hardware number into the
	// standard slot (the implicit pair/quad is encoded by mnemonic).
	ENC_Z_PAIR_VD, 
	ENC_Z_PAIR_VN, 
	ENC_Z_PAIR_VM, 
	ENC_Z_QUAD_VD, 
	ENC_Z_QUAD_VN, 
	ENC_Z_QUAD_VM, 
}

Where each operand's bits land in the 32-bit word.

Related Procedures With Parameters

pack_operand_inline

Operand_Kind ¶
Source

Operand_Kind :: enum u8 {
	NONE, 
	REGISTER, 
	IMMEDIATE, 
	MEMORY, 
	RELATIVE, 
	SHIFTED_REG,  // X reg + shift type + shift amount
	EXTENDED_REG, // X/W reg + extend + amount
	COND,         // 4-bit condition code (EQ/NE/.../AL/NV)
	ZA_SLICE,     // `za0h.b[w12, 0]` -- a row or column of an SME tile
}

Operand_Set ¶
Source

Operand_Set :: distinct bit_set[int; u8]

Operand_Type ¶
Source

Operand_Type :: enum u8 {
	NONE, 
	// ---- Integer registers ----
	W_REG,        // W0..W30 or WZR (hw=31 means ZR)
	X_REG,        // X0..X30 or XZR
	WSP_REG,      // W0..W30 or WSP (hw=31 means stack pointer)
	XSP_REG,      // X0..X30 or SP
	W_SHIFTED,    // W reg + shift type + 5-bit amount
	X_SHIFTED,    // X reg + shift type + 6-bit amount
	W_EXTENDED,   // W reg + extend + 3-bit amount
	X_EXTENDED,   // X reg + extend + 3-bit amount
	// ---- SIMD/FP scalar register views ----
	B_REG, 
	H_REG, 
	S_REG, 
	D_REG, 
	Q_REG, 
	// ---- Vector register (NEON full V) ----
	V_REG, 
	// NEON vector with explicit arrangement
	V_8B, 
	V_16B, 
	V_4H, 
	V_8H, 
	V_2S, 
	V_4S, 
	V_1D, 
	V_2D, 
	V_4H_FP16, 
	V_8H_FP16,    // FP16 vector forms
	// Element-indexed vector (V0.B[i] / .H[i] / .S[i] / .D[i])
	V_ELEM_B, 
	V_ELEM_H, 
	V_ELEM_S, 
	V_ELEM_D, 
	// ---- SVE register operands ----
	Z_REG_B, 
	Z_REG_H, 
	Z_REG_S, 
	Z_REG_D, 
	P_REG,        // P0..P15 (predicate)
	P_REG_MERGE, 
	P_REG_ZERO,   // predicated execution modes
	P_REG_GOV,    // governing predicate slot (3-bit P0..P7)
	// ---- SME register operands ----
	ZA_TILE_B, 
	ZA_TILE_H, 
	ZA_TILE_S, 
	ZA_TILE_D, 
	ZA_TILE_Q,    // ZA tile by element size
	SME_PATTERN,  // SME pattern/tile-list mask selector
	SVE_PATTERN,  // SVE predicate pattern (POW2, VL1.., ALL)
	// ---- SME tile-slice operand (packed immediate descriptor) ----
	//   bits  3:0 = imm offset within tile (range varies by element size)
	//   bit  4    = direction (0=H, 1=V)
	//   bits 6:5  = Ws index (Ws is W12 + this, range 0..3)
	//   bits 10:7 = tile number (relevant bits per element size)
	SME_SLICE_B, 
	SME_SLICE_H, 
	SME_SLICE_W, 
	SME_SLICE_D, 
	SME_SLICE_Q, 
	// ---- Misc new operand-type aliases ----
	FCMLA_ROT,    // 2-bit complex rotation index (0/90/180/270 deg) at bits 13:12
	FCADD_ROT,    // 1-bit complex rotation index (0=90, 1=270 deg) at bit 12
	SVE_PRFOP,    // 4-bit SVE prefetch op selector at bits 3:0
	LDRAA_IMM10,  // signed 10-bit imm10 scaled by 8 (LDRAA / LDRAB)
	LSL_SHIFT_W,  // shift amount 0..31 for LSL Wd, Wn, #imm (32-bit)
	LSL_SHIFT_X,  // shift amount 0..63 for LSL Xd, Xn, #imm (64-bit)
	ROR_SHIFT,    // shift amount for ROR (alias of EXTR), goes to imms
	// ---- Immediates ----
	IMM_12,       // 12-bit unsigned (ADD/SUB imm; carries optional LSL #12 in size byte)
	IMM_16,       // 16-bit unsigned (MOVZ/MOVN/MOVK)
	IMM_8,        // 8-bit unsigned (NEON MOVI, BTI/CRC32 immediate-like)
	IMM_6,        // 6-bit unsigned (data-proc shift amount)
	IMM_5,        // 5-bit unsigned (TBZ/TBNZ bit position; FP rounding lane)
	IMM_3,        // 3-bit (shift amount for EXTEND, NZCV, system register field)
	IMM_4,        // 4-bit (HINT, DMB/DSB barrier types, NZCV flags)
	IMM_2,        // 2-bit (FP rounding mode / NEON cmode bits 14:13 etc.)
	NZCV_IMM,     // 4-bit NZCV for CCMP/CCMN immediate forms
	SYS_REG,      // MRS/MSR target system register
	PSTATE_FIELD, // MSR immediate form: a PSTATE field selector,
	// a different namespace from the system registers
	HW_SHIFT,     // 2-bit LSL hw (0/16/32/48) for MOV-immediate
	BITMASK_IMM,  // Logical immediate (bitmask-encoded N:imms:immr)
	LSE_SIZE,     // 2-bit size selector for LSE atomics (00=B 01=H 10=W 11=X)
	IMM_MUL4, 
	// ---- PC-relative ----
	REL_26,       // B / BL (signed 26-bit << 2)
	REL_19,       // B.cond / CBZ / CBNZ / LDR literal (signed 19-bit << 2)
	REL_14,       // TBZ / TBNZ (signed 14-bit << 2)
	REL_PG21,     // ADR / ADRP (signed 21-bit; ADRP scales by 4096)
	// ---- Memory ----
	// 
	// One operand type per addressing mode. The mode has to be part of the
	// operand TYPE, not just the operand encoding, because it is a matching
	// criterion: `LDR Xt, [Xn, #imm]`, `[Xn, #imm]!`, `[Xn], #imm` and
	// `[Xn, Xm]` are all the mnemonic LDR, and the matcher picks between
	// their forms on the addressing mode alone. (Same reason W_REG /
	// W_SHIFTED / W_EXTENDED are distinct types over one register class.)
	// Each maps to exactly one Address_Mode; the form's Operand_Encoding
	// then says how the fields are packed.
	MEM_OFFSET,   // [Xn{, #imm}]                    -> Address_Mode.OFFSET
	MEM_PRE,      // [Xn, #imm]!                     -> PRE_INDEXED
	MEM_POST,     // [Xn], #imm                      -> POST_INDEXED
	MEM_REG,      // [Xn, Xm{, LSL #s}] or [Xn, Wm|Xm, <extend> {#s}]
	//   -> REG_OFFSET or EXT_REG_OFFSET; one word, option picks
	MEM_EXT,      // subsumed by MEM_REG; kept because these values are baked
	//   into the table blobs
	// SVE addressing. Kept distinct from the plain modes above: a gather
	// load has both a scalar+scalar and a scalar+vector form under the one
	// mnemonic, and those two differ only in the index register's class.
	MEM_SVE_SS,   // [Xn, Xm, LSL #s]                -> REG_OFFSET, X index
	MEM_SVE_SI,   // [Xn, #imm, MUL VL]              -> OFFSET
	MEM_SVE_VEC,  // [Xn, Zm.S/D, UXTW|SXTW|LSL #s]  -> REG_OFFSET, Z index
	MEM_SVE_VB,   // [Zn.S/D, #imm5]                 -> OFFSET, Z base
	// ---- Condition code ----
	COND, 
	// Condition with AL/NV excluded. The cset/cinc alias family is only the
	// preferred spelling when cond != 111x -- with AL or NV the underlying
	// CSINC/CSINV/CSNEG is what an assembler writes.
	COND_NOT_AL, 
	// SME2 vector pairs and quads. The element size cannot come from the
	// encoding the way the list length does, because the operand is written
	// with it (`{z0.b, z1.b}`) and it is what separates LD1B from LD1H.
	// A Z register of any element size, for the forms where the size is not in
	// the static pattern and so cannot select between forms (SVE2 XAR).
	Z_REG_ANY, 
	Z_PAIR_B, 
	Z_PAIR_H, 
	Z_PAIR_S, 
	Z_PAIR_D, 
	Z_QUAD_B, 
	Z_QUAD_H, 
	Z_QUAD_S, 
	Z_QUAD_D, 
	// SME2 predicate-as-counter (PN8..PN15). `_ZERO` prints the `/z` a load
	// needs; a store writes it bare.
	PN_REG, 
	PN_REG_ZERO, 
	ZT_REG,       // ZT0 -- SME2's lookup table, and the only one of its kind
	ZA_ARRAY,     // a ZA array vector, addressed by Wn plus an offset
	// A Z register written as a table list. SVE's TBL takes one table or two,
	// and unlike LD2 the caller chooses which, so the count has to be in the
	// operand type for the matcher to tell the two forms apart.
	Z_LIST1_B, 
	Z_LIST1_H, 
	Z_LIST1_S, 
	Z_LIST1_D, 
	Z_LIST2_B, 
	// A predicate that is written with an element size because it is the
	// instruction's destination (`cmpge p0.b, p1/z, ...`).
	P_REG_B, 
	P_REG_H, 
	P_REG_S, 
	P_REG_D, 
	// ---- NEON shift-by-immediate amount (encoded into immh:immb together
	//      with the element size: left = esize+shift, right = 2*esize-shift) ----
	VEC_SHIFT, 
	// ---- NEON element lane index (DUP/INS/EXT). The element-size marker
	//      lives in the entry `bits`; the operand drives only the index bits. ----
	VEC_INDEX, 
	V_1Q,         // NEON .1q -- one 128-bit lane (PMULL's destination). Not
}

What the user passes in. Most operand types describe a register class or a specific immediate width that the matcher cares about.

Print_Options ¶
Source

Print_Options :: rexcode_isa.Print_Options

Related Procedures With Parameters

Related Constants

DEFAULT_PRINT_OPTIONS

Print_Result ¶
Source

Print_Result :: rexcode_isa.Print_Result

Register ¶
Source

Register :: distinct u32

Related Procedures With Parameters

Related Procedures With Returns

Related Constants

Relocation ¶
Source

Relocation :: struct #packed {
	offset:   u32,
	label_id: u32,
	addend:   i32,
	type:     Relocation_Type,
	size:     u8,
	inst_idx: u16,
}

Relocation_Type ¶
Source

Relocation_Type :: enum u8 {
	NONE          = 0, 
	// PC-relative branches
	B26,               // 26-bit signed offset (×4) -- B / BL
	B_COND19,          // 19-bit signed offset (×4) -- B.cond, CBZ/CBNZ
	TBZ14,             // 14-bit signed offset (×4) -- TBZ / TBNZ
	// PC-relative addressing
	ADR_PCREL21,       // ±1MB signed offset -- ADR
	ADRP_PCREL21,      // ±4GB signed offset on 4K page boundary -- ADRP
	PCREL_LO12_I,      // low 12 of (sym - page_of(ADRP)) -- ADD/LDR/STR after ADRP
	PCREL_LO12_S,      // S-form variant if needed for store-pair-style ops
	// Load-literal (PC-relative 19-bit signed, scaled by 4)
	LDR_LITERAL19, 
	// Absolute (filled by linker)
	ABS64, 
	ABS32, 
	ABS16, 
}

Shift_Type ¶
Source

Shift_Type :: enum u8 {
	LSL = 0, 
	LSR = 1, 
	ASR = 2, 
	ROR = 3, 
}

Related Procedures With Parameters

emit_add_r_r_sh
emit_adds_r_r_sh
emit_and_r_r_sh
emit_ands_r_r_sh
emit_bic_r_r_sh
emit_bics_r_r_sh
emit_cmn_r_sh
emit_cmp_r_sh
emit_eon_r_r_sh
emit_eor_r_r_sh
emit_neg_r_sh
emit_negs_r_sh
emit_orn_r_r_sh
emit_orr_r_r_sh
emit_sub_r_r_sh
emit_subs_r_r_sh
emit_tst_r_sh
inst_add_r_r_sh
inst_adds_r_r_sh
inst_and_r_r_sh
inst_ands_r_r_sh
inst_bic_r_r_sh
inst_bics_r_r_sh
inst_cmn_r_sh
inst_cmp_r_sh
inst_eon_r_r_sh
inst_eor_r_r_sh
inst_neg_r_sh
inst_negs_r_sh
inst_orn_r_r_sh
inst_orr_r_r_sh
inst_sub_r_r_sh
inst_subs_r_r_sh
inst_tst_r_sh
op_shifted
emit_add (procedure groups)
emit_adds (procedure groups)
emit_and (procedure groups)
emit_ands (procedure groups)
emit_bic (procedure groups)
emit_bics (procedure groups)
emit_cmn (procedure groups)
emit_cmp (procedure groups)
emit_eor (procedure groups)
emit_neg (procedure groups)
emit_orn (procedure groups)
emit_orr (procedure groups)
emit_sub (procedure groups)
emit_subs (procedure groups)
emit_tst (procedure groups)
inst_add (procedure groups)
inst_adds (procedure groups)
inst_and (procedure groups)
inst_ands (procedure groups)
inst_bic (procedure groups)
inst_bics (procedure groups)
inst_cmn (procedure groups)
inst_cmp (procedure groups)
inst_eor (procedure groups)
inst_neg (procedure groups)
inst_orn (procedure groups)
inst_orr (procedure groups)
inst_sub (procedure groups)
inst_subs (procedure groups)
inst_tst (procedure groups)

Shifted_Reg ¶
Source

Shifted_Reg :: struct #packed {
	reg:    Register,
	// 4
	type:   Shift_Type,
	// 1
	amount: u8,
}

Side_Effect ¶
Source

Side_Effect :: enum u8 {
	CONTROL,          // writes pc: B/BL/BR/BLR/RET, B.cond, CBZ/CBNZ, TBZ/TBNZ
	EXCEPTION,        // exception-generating call: SVC / HVC / SMC
	TRAP,             // deliberately faults: BRK (breakpoint), UDF (undefined)
	FENCE,            // memory-ordering barrier: DMB/DSB, and acquire/release accesses
	ISYNC,            // instruction-stream / context synchronization: ISB
	ATOMIC,           // indivisible RMW: LDXR/STXR pair, LSE (LDADD/SWP/CAS...)
	RESERVATION,      // sets/tests/clears the local exclusive monitor: LDXR/STXR, CLREX
	CACHE,            // cache maintenance with coherence effects: DC, IC
	HINT,             // architecturally-inert hint: NOP/YIELD/PRFM/SEV/ESB/CSDB
	BTI,              // branch-target-identification landing pad (control-flow integrity)
	PAC,              // pointer authentication: reads an implicit key, may fault (FEAT_FPAC)
	WAIT,             // suspends execution until an event/interrupt: WFI/WFE
	PRIVILEGED,       // reads/writes system state: MSR/MRS, ERET, TLBI, AT, DAIF
	FFR,              // reads/writes the SVE first-fault register: SETFFR/RDFFR/WRFFR, LDFF*
	NONDETERMINISTIC, // RNDR/RNDRRS, counter/timer reads (CNTVCT), TSTART
}

Side_Effects ¶
Source

Side_Effects :: distinct bit_set[Side_Effect; u16]

Sysreg_Name ¶
Source

Sysreg_Name :: struct {
	value: u16,
	// the bare 15-bit MRS/MSR field (what sysreg_bits returns)
	name:  string,
}

Token ¶
Source

Token :: rexcode_isa.Token

Token_Kind ¶
Source

Token_Kind :: rexcode_isa.Token_Kind

ZA_Slice ¶
Source

ZA_Slice :: distinct bit_field u32 {
	tile:     u8 | 4,
	vertical: bool | 1,
	ws:       u8 | 2,
	offset:   u8 | 4,
	elem:     u8 | 5,
}

One slice of an SME accumulator tile: which tile, taken along the rows (h) or the columns (v), addressed by one of W12..W15 plus a fixed offset.

ACTLR_EL1 ¶
Source

ACTLR_EL1 :: Register(0x4081_1000)

op0 op1 CRn CRm op2

AFSR0_EL1 ¶
Source

AFSR0_EL1 :: Register(0x4288_1000)

op0 op1 CRn CRm op2

AFSR1_EL1 ¶
Source

AFSR1_EL1 :: Register(0x4289_1000)

3 0 5 1 1

AMAIR_EL1 ¶
Source

AMAIR_EL1 :: Register(0x4518_1000)

3 0 10 3 0

APDAKEYHI_EL1 ¶
Source

APDAKEYHI_EL1 :: Register(0x4111_1000)

op0 op1 CRn CRm op2

APDAKEYLO_EL1 ¶
Source

APDAKEYLO_EL1 :: Register(0x4110_1000)

3 0 2 2 0

APDBKEYHI_EL1 ¶
Source

APDBKEYHI_EL1 :: Register(0x4113_1000)

3 0 2 2 3

APDBKEYLO_EL1 ¶
Source

APDBKEYLO_EL1 :: Register(0x4112_1000)

3 0 2 2 2

APGAKEYHI_EL1 ¶
Source

APGAKEYHI_EL1 :: Register(0x4119_1000)

3 0 2 3 1

APGAKEYLO_EL1 ¶
Source

APGAKEYLO_EL1 :: Register(0x4118_1000)

3 0 2 3 0

APIAKEYHI_EL1 ¶
Source

APIAKEYHI_EL1 :: Register(0x4109_1000)

3 0 2 1 1

APIAKEYLO_EL1 ¶
Source

APIAKEYLO_EL1 :: Register(0x4108_1000)

3 0 2 1 0 (FEAT_PAuth)

APIBKEYHI_EL1 ¶
Source

APIBKEYHI_EL1 :: Register(0x410B_1000)

3 0 2 1 3

APIBKEYLO_EL1 ¶
Source

APIBKEYLO_EL1 :: Register(0x410A_1000)

3 0 2 1 2

CCSIDR_EL1 ¶
Source

CCSIDR_EL1 :: Register(0x4800_1000)

op0 op1 CRn CRm op2

CLIDR_EL1 ¶
Source

CLIDR_EL1 :: Register(0x4801_1000)

3 1 0 0 1

CNTFRQ_EL0 ¶
Source

CNTFRQ_EL0 :: Register(0x5F00_1000)

op0 op1 CRn CRm op2

CNTHCTL_EL2 ¶
Source

CNTHCTL_EL2 :: Register(0x6708_1000)

3 4 14 1 0

CNTHP_CTL_EL2 ¶
Source

CNTHP_CTL_EL2 :: Register(0x6711_1000)

3 4 14 2 1

CNTHP_CVAL_EL2 ¶
Source

CNTHP_CVAL_EL2 :: Register(0x6712_1000)

3 4 14 2 2

CNTHP_TVAL_EL2 ¶
Source

CNTHP_TVAL_EL2 :: Register(0x6710_1000)

3 4 14 2 0

CNTHV_CTL_EL2 ¶
Source

CNTHV_CTL_EL2 :: Register(0x6719_1000)

3 4 14 3 1

CNTHV_CVAL_EL2 ¶
Source

CNTHV_CVAL_EL2 :: Register(0x671A_1000)

3 4 14 3 2

CNTHV_TVAL_EL2 ¶
Source

CNTHV_TVAL_EL2 :: Register(0x6718_1000)

3 4 14 3 0

CNTKCTL_EL1 ¶
Source

CNTKCTL_EL1 :: Register(0x4708_1000)

3 0 14 1 0

CNTPCT_EL0 ¶
Source

CNTPCT_EL0 :: Register(0x5F01_1000)

3 3 14 0 1

CNTPS_CTL_EL1 ¶
Source

CNTPS_CTL_EL1 :: Register(0x7F11_1000)

3 7 14 2 1

CNTPS_CVAL_EL1 ¶
Source

CNTPS_CVAL_EL1 :: Register(0x7F12_1000)

3 7 14 2 2

CNTPS_TVAL_EL1 ¶
Source

CNTPS_TVAL_EL1 :: Register(0x7F10_1000)

3 7 14 2 0

CNTP_CTL_EL0 ¶
Source

CNTP_CTL_EL0 :: Register(0x5F11_1000)

3 3 14 2 1

CNTP_CVAL_EL0 ¶
Source

CNTP_CVAL_EL0 :: Register(0x5F12_1000)

3 3 14 2 2

CNTP_TVAL_EL0 ¶
Source

CNTP_TVAL_EL0 :: Register(0x5F10_1000)

3 3 14 2 0

CNTVCT_EL0 ¶
Source

CNTVCT_EL0 :: Register(0x5F02_1000)

3 3 14 0 2

CNTVOFF_EL2 ¶
Source

CNTVOFF_EL2 :: Register(0x6703_1000)

3 4 14 0 3

CNTV_CTL_EL0 ¶
Source

CNTV_CTL_EL0 :: Register(0x5F19_1000)

3 3 14 3 1

CNTV_CVAL_EL0 ¶
Source

CNTV_CVAL_EL0 :: Register(0x5F1A_1000)

3 3 14 3 2

CNTV_TVAL_EL0 ¶
Source

CNTV_TVAL_EL0 :: Register(0x5F18_1000)

3 3 14 3 0

COND_HS ¶
Source

COND_HS :: Cond.CS

Architectural aliases for the two carry-style conditions.

COND_LO ¶
Source

COND_LO :: Cond.CC

CONTEXTIDR_EL1 ¶
Source

CONTEXTIDR_EL1 :: Register(0x4681_1000)

op0 op1 CRn CRm op2

CPACR_EL1 ¶
Source

CPACR_EL1 :: Register(0x4082_1000)

3 0 1 0 2

CSSELR_EL1 ¶
Source

CSSELR_EL1 :: Register(0x5000_1000)

3 2 0 0 0

CTR_EL0 ¶
Source

CTR_EL0 :: Register(0x5801_1000)

3 3 0 0 1

CURRENT_EL ¶
Source

CURRENT_EL :: Register(0x4212_1000)

3 0 4 2 2

DACR32_EL2 ¶
Source

DACR32_EL2 :: Register(0x6180_1000)

op0 op1 CRn CRm op2

DAIF ¶
Source

DAIF :: Register(0x5A11_1000)

3 3 4 2 1

DBGAUTHSTATUS_EL1 ¶
Source

DBGAUTHSTATUS_EL1 :: Register(0x03F6_1000)

op0 op1 CRn CRm op2

DBGCLAIMCLR_EL1 ¶
Source

DBGCLAIMCLR_EL1 :: Register(0x03CE_1000)

2 0 7 9 6

DBGCLAIMSET_EL1 ¶
Source

DBGCLAIMSET_EL1 :: Register(0x03C6_1000)

2 0 7 8 6

DBGDTRRX_EL0 ¶
Source

DBGDTRRX_EL0 :: Register(0x1828_1000)

2 3 0 5 0

DBGDTRTX_EL0 ¶
Source

DBGDTRTX_EL0 :: Register(0x1828_1000)

2 3 0 5 0 (write view of DBGDTRRX_EL0)

DBGDTR_EL0 ¶
Source

DBGDTR_EL0 :: Register(0x1820_1000)

2 3 0 4 0

DBGPRCR_EL1 ¶
Source

DBGPRCR_EL1 :: Register(0x00A4_1000)

2 0 1 4 4

DCZID_EL0 ¶
Source

DCZID_EL0 :: Register(0x5807_1000)

3 3 0 0 7 (used by __sve_max_vl-style probes too)

DEFAULT_PRINT_OPTIONS ¶
Source

DEFAULT_PRINT_OPTIONS: rexcode_isa.Print_Options : isa.DEFAULT_PRINT_OPTIONS

DISR_EL1 ¶
Source

DISR_EL1 :: Register(0x4609_1000)

op0 op1 CRn CRm op2

DLR_EL0 ¶
Source

DLR_EL0 :: Register(0x5A29_1000)

3 3 4 5 1

DSPSR_EL0 ¶
Source

DSPSR_EL0 :: Register(0x5A28_1000)

3 3 4 5 0

ELR_EL1 ¶
Source

ELR_EL1 :: Register(0x4201_1000)

3 0 4 0 1

ELR_EL2 ¶
Source

ELR_EL2 :: Register(0x6201_1000)

3 4 4 0 1

ELR_EL3 ¶
Source

ELR_EL3 :: Register(0x7201_1000)

3 6 4 0 1

ERRIDR_EL1 ¶
Source

ERRIDR_EL1 :: Register(0x4298_1000)

3 0 5 3 0

ERRSELR_EL1 ¶
Source

ERRSELR_EL1 :: Register(0x4299_1000)

3 0 5 3 1

ERXADDR_EL1 ¶
Source

ERXADDR_EL1 :: Register(0x42A3_1000)

3 0 5 4 3

ERXCTLR_EL1 ¶
Source

ERXCTLR_EL1 :: Register(0x42A1_1000)

3 0 5 4 1

ERXFR_EL1 ¶
Source

ERXFR_EL1 :: Register(0x42A0_1000)

3 0 5 4 0

ERXMISC0_EL1 ¶
Source

ERXMISC0_EL1 :: Register(0x42A8_1000)

3 0 5 5 0

ERXMISC1_EL1 ¶
Source

ERXMISC1_EL1 :: Register(0x42A9_1000)

3 0 5 5 1

ERXMISC2_EL1 ¶
Source

ERXMISC2_EL1 :: Register(0x42AA_1000)

3 0 5 5 2

ERXMISC3_EL1 ¶
Source

ERXMISC3_EL1 :: Register(0x42AB_1000)

3 0 5 5 3

ERXSTATUS_EL1 ¶
Source

ERXSTATUS_EL1 :: Register(0x42A2_1000)

3 0 5 4 2

ESR_EL1 ¶
Source

ESR_EL1 :: Register(0x4290_1000)

3 0 5 2 0

ESR_EL2 ¶
Source

ESR_EL2 :: Register(0x6290_1000)

3 4 5 2 0

FAR_EL1 ¶
Source

FAR_EL1 :: Register(0x4300_1000)

3 0 6 0 0

FAR_EL2 ¶
Source

FAR_EL2 :: Register(0x6300_1000)

3 4 6 0 0

FPCR ¶
Source

FPCR :: Register(0x5A20_1000)

op0 op1 CRn CRm op2

FPEXC32_EL2 ¶
Source

FPEXC32_EL2 :: Register(0x6298_1000)

3 4 5 3 0

FPSR ¶
Source

FPSR :: Register(0x5A21_1000)

3 3 4 4 1

FP_REG ¶
Source

FP_REG: Register : X29

frame pointer (avoid collision with FP if added later)

GCR_EL1 ¶
Source

GCR_EL1 :: Register(0x4086_1000)

op0 op1 CRn CRm op2

GMID_EL1 ¶
Source

GMID_EL1 :: Register(0x4804_1000)

3 1 0 0 4 (FEAT_MTE)

GPCCR_EL3 ¶
Source

GPCCR_EL3 :: Register(0x710E_1000)

op0 op1 CRn CRm op2

GPTBR_EL3 ¶
Source

GPTBR_EL3 :: Register(0x710C_1000)

3 6 2 1 4 (Granule Protection Table Base)

HCR_EL2 ¶
Source

HCR_EL2 :: Register(0x6088_1000)

3 4 1 1 0

HSTR_EL2 ¶
Source

HSTR_EL2 :: Register(0x608B_1000)

3 4 1 1 3

ICC_ASGI1R_EL1 ¶
Source

ICC_ASGI1R_EL1 :: Register(0x465E_1000)

op0 op1 CRn CRm op2

ICC_BPR0_EL1 ¶
Source

ICC_BPR0_EL1 :: Register(0x4643_1000)

3 0 12 8 3

ICC_BPR1_EL1 ¶
Source

ICC_BPR1_EL1 :: Register(0x4663_1000)

3 0 12 12 3

ICC_CTLR_EL1 ¶
Source

ICC_CTLR_EL1 :: Register(0x4664_1000)

3 0 12 12 4

ICC_CTLR_EL3 ¶
Source

ICC_CTLR_EL3 :: Register(0x7664_1000)

3 6 12 12 4

ICC_DIR_EL1 ¶
Source

ICC_DIR_EL1 :: Register(0x4659_1000)

3 0 12 11 1

ICC_EOIR0_EL1 ¶
Source

ICC_EOIR0_EL1 :: Register(0x4641_1000)

3 0 12 8 1

ICC_EOIR1_EL1 ¶
Source

ICC_EOIR1_EL1 :: Register(0x4661_1000)

3 0 12 12 1

ICC_HPPIR0_EL1 ¶
Source

ICC_HPPIR0_EL1 :: Register(0x4642_1000)

3 0 12 8 2

ICC_HPPIR1_EL1 ¶
Source

ICC_HPPIR1_EL1 :: Register(0x4662_1000)

3 0 12 12 2

ICC_IAR0_EL1 ¶
Source

ICC_IAR0_EL1 :: Register(0x4640_1000)

3 0 12 8 0

ICC_IAR1_EL1 ¶
Source

ICC_IAR1_EL1 :: Register(0x4660_1000)

3 0 12 12 0

ICC_IGRPEN0_EL1 ¶
Source

ICC_IGRPEN0_EL1 :: Register(0x4666_1000)

3 0 12 12 6

ICC_IGRPEN1_EL1 ¶
Source

ICC_IGRPEN1_EL1 :: Register(0x4667_1000)

3 0 12 12 7

ICC_IGRPEN1_EL3 ¶
Source

ICC_IGRPEN1_EL3 :: Register(0x7667_1000)

3 6 12 12 7

ICC_PMR_EL1 ¶
Source

ICC_PMR_EL1 :: Register(0x4230_1000)

3 0 4 6 0

ICC_RPR_EL1 ¶
Source

ICC_RPR_EL1 :: Register(0x465B_1000)

3 0 12 11 3

ICC_SGI0R_EL1 ¶
Source

ICC_SGI0R_EL1 :: Register(0x465F_1000)

3 0 12 11 7

ICC_SGI1R_EL1 ¶
Source

ICC_SGI1R_EL1 :: Register(0x465D_1000)

3 0 12 11 5

ICC_SRE_EL1 ¶
Source

ICC_SRE_EL1 :: Register(0x4665_1000)

3 0 12 12 5

ICC_SRE_EL2 ¶
Source

ICC_SRE_EL2 :: Register(0x664D_1000)

3 4 12 9 5

ICC_SRE_EL3 ¶
Source

ICC_SRE_EL3 :: Register(0x7665_1000)

3 6 12 12 5

ICH_EISR_EL2 ¶
Source

ICH_EISR_EL2 :: Register(0x665B_1000)

3 4 12 11 3

ICH_ELRSR_EL2 ¶
Source

ICH_ELRSR_EL2 :: Register(0x665D_1000)

3 4 12 11 5

ICH_HCR_EL2 ¶
Source

ICH_HCR_EL2 :: Register(0x6658_1000)

3 4 12 11 0

ICH_MISR_EL2 ¶
Source

ICH_MISR_EL2 :: Register(0x665A_1000)

3 4 12 11 2

ICH_VMCR_EL2 ¶
Source

ICH_VMCR_EL2 :: Register(0x665F_1000)

3 4 12 11 7

ICH_VTR_EL2 ¶
Source

ICH_VTR_EL2 :: Register(0x6659_1000)

3 4 12 11 1

ID_AA64AFR0_EL1 ¶
Source

ID_AA64AFR0_EL1 :: Register(0x402C_1000)

3 0 0 5 4 (auxiliary)

ID_AA64AFR1_EL1 ¶
Source

ID_AA64AFR1_EL1 :: Register(0x402D_1000)

3 0 0 5 5

ID_AA64DFR0_EL1 ¶
Source

ID_AA64DFR0_EL1 :: Register(0x4028_1000)

3 0 0 5 0

ID_AA64DFR1_EL1 ¶
Source

ID_AA64DFR1_EL1 :: Register(0x4029_1000)

3 0 0 5 1

ID_AA64DFR2_EL1 ¶
Source

ID_AA64DFR2_EL1 :: Register(0x402A_1000)

3 0 0 5 2

ID_AA64ISAR0_EL1 ¶
Source

ID_AA64ISAR0_EL1 :: Register(0x4030_1000)

3 0 0 6 0

ID_AA64ISAR1_EL1 ¶
Source

ID_AA64ISAR1_EL1 :: Register(0x4031_1000)

3 0 0 6 1

ID_AA64ISAR2_EL1 ¶
Source

ID_AA64ISAR2_EL1 :: Register(0x4032_1000)

3 0 0 6 2

ID_AA64ISAR3_EL1 ¶
Source

ID_AA64ISAR3_EL1 :: Register(0x4033_1000)

3 0 0 6 3

ID_AA64MMFR0_EL1 ¶
Source

ID_AA64MMFR0_EL1 :: Register(0x4038_1000)

3 0 0 7 0

ID_AA64MMFR1_EL1 ¶
Source

ID_AA64MMFR1_EL1 :: Register(0x4039_1000)

3 0 0 7 1

ID_AA64MMFR2_EL1 ¶
Source

ID_AA64MMFR2_EL1 :: Register(0x403A_1000)

3 0 0 7 2

ID_AA64PFR0_EL1 ¶
Source

ID_AA64PFR0_EL1 :: Register(0x4020_1000)

3 0 0 4 0

ID_AA64PFR1_EL1 ¶
Source

ID_AA64PFR1_EL1 :: Register(0x4021_1000)

3 0 0 4 1

ID_AA64SMFR0_EL1 ¶
Source

ID_AA64SMFR0_EL1 :: Register(0x4025_1000)

3 0 0 4 5 (SME feature ID)

ID_AA64ZFR0_EL1 ¶
Source

ID_AA64ZFR0_EL1 :: Register(0x4024_1000)

3 0 0 4 4 (SVE feature ID)

ID_AFR0_EL1 ¶
Source

ID_AFR0_EL1 :: Register(0x400B_1000)

3 0 0 1 3

ID_DFR0_EL1 ¶
Source

ID_DFR0_EL1 :: Register(0x400A_1000)

3 0 0 1 2

ID_ISAR0_EL1 ¶
Source

ID_ISAR0_EL1 :: Register(0x4010_1000)

3 0 0 2 0

ID_ISAR1_EL1 ¶
Source

ID_ISAR1_EL1 :: Register(0x4011_1000)

3 0 0 2 1

ID_ISAR2_EL1 ¶
Source

ID_ISAR2_EL1 :: Register(0x4012_1000)

3 0 0 2 2

ID_ISAR3_EL1 ¶
Source

ID_ISAR3_EL1 :: Register(0x4013_1000)

3 0 0 2 3

ID_ISAR4_EL1 ¶
Source

ID_ISAR4_EL1 :: Register(0x4014_1000)

3 0 0 2 4

ID_ISAR5_EL1 ¶
Source

ID_ISAR5_EL1 :: Register(0x4015_1000)

3 0 0 2 5

ID_ISAR6_EL1 ¶
Source

ID_ISAR6_EL1 :: Register(0x4017_1000)

3 0 0 2 7

ID_MMFR0_EL1 ¶
Source

ID_MMFR0_EL1 :: Register(0x400C_1000)

3 0 0 1 4

ID_MMFR1_EL1 ¶
Source

ID_MMFR1_EL1 :: Register(0x400D_1000)

3 0 0 1 5

ID_MMFR2_EL1 ¶
Source

ID_MMFR2_EL1 :: Register(0x400E_1000)

3 0 0 1 6

ID_MMFR3_EL1 ¶
Source

ID_MMFR3_EL1 :: Register(0x400F_1000)

3 0 0 1 7

ID_MMFR4_EL1 ¶
Source

ID_MMFR4_EL1 :: Register(0x4016_1000)

3 0 0 2 6

ID_MMFR5_EL1 ¶
Source

ID_MMFR5_EL1 :: Register(0x401E_1000)

3 0 0 3 6

ID_PFR0_EL1 ¶
Source

ID_PFR0_EL1 :: Register(0x4008_1000)

3 0 0 1 0

ID_PFR1_EL1 ¶
Source

ID_PFR1_EL1 :: Register(0x4009_1000)

3 0 0 1 1

ID_PFR2_EL1 ¶
Source

ID_PFR2_EL1 :: Register(0x401C_1000)

3 0 0 3 4

ISR_EL1 ¶
Source

ISR_EL1 :: Register(0x4608_1000)

3 0 12 1 0

LABEL_UNDEFINED ¶
Source

LABEL_UNDEFINED: rexcode_isa.Label_Definition : isa.LABEL_UNDEFINED

LANE_INDEX ¶
Source

LANE_INDEX :: u8(0xFF)

A vector lane index. It is a plain immediate in the encoding, but it prints glued to the register it indexes (v2.s[3]) rather than as a separate operand, so it is marked to tell it apart from an immediate that really is one -- EXT's byte index, for instance, is written #3.

LORC_EL1 ¶
Source

LORC_EL1 :: Register(0x4523_1000)

3 0 10 4 3

LOREA_EL1 ¶
Source

LOREA_EL1 :: Register(0x4521_1000)

3 0 10 4 1

LORID_EL1 ¶
Source

LORID_EL1 :: Register(0x4527_1000)

3 0 10 4 7

LORN_EL1 ¶
Source

LORN_EL1 :: Register(0x4522_1000)

3 0 10 4 2

LORSA_EL1 ¶
Source

LORSA_EL1 :: Register(0x4520_1000)

3 0 10 4 0

LR ¶
Source

LR: Register : X30

procedure call link register

MAIR_EL1 ¶
Source

MAIR_EL1 :: Register(0x4510_1000)

3 0 10 2 0

MAX_INST_SIZE ¶
Source

MAX_INST_SIZE :: 4

MDCCINT_EL1 ¶
Source

MDCCINT_EL1 :: Register(0x0010_1000)

2 0 0 2 0

MDCR_EL2 ¶
Source

MDCR_EL2 :: Register(0x6089_1000)

3 4 1 1 1

MDRAR_EL1 ¶
Source

MDRAR_EL1 :: Register(0x0080_1000)

2 0 1 0 0

MDSCR_EL1 ¶
Source

MDSCR_EL1 :: Register(0x0012_1000)

2 0 0 2 2

MFAR_EL3 ¶
Source

MFAR_EL3 :: Register(0x7305_1000)

3 6 6 0 5 (Multiple FAR)

MIDR_EL1 ¶
Source

MIDR_EL1 :: Register(0x4000_1000)

3 0 0 0 0

MPIDR_EL1 ¶
Source

MPIDR_EL1 :: Register(0x4005_1000)

3 0 0 0 5

MVFR0_EL1 ¶
Source

MVFR0_EL1 :: Register(0x4018_1000)

3 0 0 3 0

MVFR1_EL1 ¶
Source

MVFR1_EL1 :: Register(0x4019_1000)

3 0 0 3 1

MVFR2_EL1 ¶
Source

MVFR2_EL1 :: Register(0x401A_1000)

3 0 0 3 2

NONE ¶
Source

NONE :: Register(0xFFFF)

NZCV ¶
Source

NZCV :: Register(0x5A10_1000)

3 3 4 2 0

OSLAR_EL1 ¶
Source

OSLAR_EL1 :: Register(0x0084_1000)

2 0 1 0 4 (op0=2 -> o0=0)

OSLSR_EL1 ¶
Source

OSLSR_EL1 :: Register(0x008C_1000)

2 0 1 1 4

PAR_EL1 ¶
Source

PAR_EL1 :: Register(0x43A0_1000)

3 0 7 4 0

PMBIDR_EL1 ¶
Source

PMBIDR_EL1 :: Register(0x44D7_1000)

op0 op1 CRn CRm op2

PMBLIMITR_EL1 ¶
Source

PMBLIMITR_EL1 :: Register(0x44D0_1000)

3 0 9 10 0

PMBPTR_EL1 ¶
Source

PMBPTR_EL1 :: Register(0x44D1_1000)

3 0 9 10 1

PMBSR_EL1 ¶
Source

PMBSR_EL1 :: Register(0x44D3_1000)

3 0 9 10 3

PMCCFILTR_EL0 ¶
Source

PMCCFILTR_EL0 :: Register(0x5F7F_1000)

op0 op1 CRn CRm op2

PMCCNTR_EL0 ¶
Source

PMCCNTR_EL0 :: Register(0x5CE8_1000)

3 3 9 13 0

PMCEID0_EL0 ¶
Source

PMCEID0_EL0 :: Register(0x5CE6_1000)

3 3 9 12 6

PMCEID1_EL0 ¶
Source

PMCEID1_EL0 :: Register(0x5CE7_1000)

3 3 9 12 7

PMCNTENCLR_EL0 ¶
Source

PMCNTENCLR_EL0 :: Register(0x5CE2_1000)

3 3 9 12 2

PMCNTENSET_EL0 ¶
Source

PMCNTENSET_EL0 :: Register(0x5CE1_1000)

3 3 9 12 1

PMCR_EL0 ¶
Source

PMCR_EL0 :: Register(0x5CE0_1000)

3 3 9 12 0

PMINTENCLR_EL1 ¶
Source

PMINTENCLR_EL1 :: Register(0x44F2_1000)

3 0 9 14 2

PMINTENSET_EL1 ¶
Source

PMINTENSET_EL1 :: Register(0x44F1_1000)

3 0 9 14 1

PMOVSCLR_EL0 ¶
Source

PMOVSCLR_EL0 :: Register(0x5CE3_1000)

3 3 9 12 3

PMSCR_EL1 ¶
Source

PMSCR_EL1 :: Register(0x44C8_1000)

3 0 9 9 0

PMSELR_EL0 ¶
Source

PMSELR_EL0 :: Register(0x5CE5_1000)

3 3 9 12 5

PMSEVFR_EL1 ¶
Source

PMSEVFR_EL1 :: Register(0x44CD_1000)

3 0 9 9 5

PMSFCR_EL1 ¶
Source

PMSFCR_EL1 :: Register(0x44CC_1000)

3 0 9 9 4

PMSICR_EL1 ¶
Source

PMSICR_EL1 :: Register(0x44CA_1000)

3 0 9 9 2

PMSIDR_EL1 ¶
Source

PMSIDR_EL1 :: Register(0x44CF_1000)

3 0 9 9 7

PMSIRR_EL1 ¶
Source

PMSIRR_EL1 :: Register(0x44CB_1000)

3 0 9 9 3

PMSLATFR_EL1 ¶
Source

PMSLATFR_EL1 :: Register(0x44CE_1000)

3 0 9 9 6

PMSWINC_EL0 ¶
Source

PMSWINC_EL0 :: Register(0x5CE4_1000)

3 3 9 12 4

PMUSERENR_EL0 ¶
Source

PMUSERENR_EL0 :: Register(0x5CF0_1000)

3 3 9 14 0

PN10 ¶
Source

PN10 :: Register(REG_PN | 10)

PN11 ¶
Source

PN11 :: Register(REG_PN | 11)

PN12 ¶
Source

PN12 :: Register(REG_PN | 12)

PN13 ¶
Source

PN13 :: Register(REG_PN | 13)

PN14 ¶
Source

PN14 :: Register(REG_PN | 14)

PN15 ¶
Source

PN15 :: Register(REG_PN | 15)

PN8 ¶
Source

PN8 :: Register(REG_PN | 8)

SME2 addresses its predicates as counters rather than masks, and numbers them from 8: the encoding holds pn - 8.

PN9 ¶
Source

PN9 :: Register(REG_PN | 9)

PQUAL_MERGE ¶
Source

PQUAL_MERGE :: u8(2)

PQUAL_NONE ¶
Source

PQUAL_NONE :: u8(4)

PQUAL_ZERO ¶
Source

PQUAL_ZERO :: u8(1)

A predicate register's governing qualifier, carried in Operand.size and read only when the register's class is REG_P. SVE writes it as a suffix -- p0/z zeroes the inactive lanes, p0/m leaves them alone -- and an assembler will not take the instruction without it where the form calls for one.

PRSELR_EL1 ¶
Source

PRSELR_EL1 :: Register(0x4311_1000)

3 0 6 2 1

PSHAPE_B ¶
Source

PSHAPE_B :: u8(20)

A predicate that is an instruction's DESTINATION is written with an element size instead -- cmpge p0.b, p1/z, ... -- so those codes have to live apart from the qualifiers above, and apart from the neutral 4 a plain op_reg gives.

PSHAPE_D ¶
Source

PSHAPE_D :: u8(23)

PSHAPE_H ¶
Source

PSHAPE_H :: u8(21)

PSHAPE_S ¶
Source

PSHAPE_S :: u8(22)

REG_B ¶
Source

REG_B :: 0x0600

B0..B31 (byte view)

REG_D ¶
Source

REG_D :: 0x0900

D0..D31 (double view)

REG_H ¶
Source

REG_H :: 0x0700

H0..H31 (half view)

REG_NONE ¶
Source

REG_NONE :: 0x0000

REG_P ¶
Source

REG_P :: 0x0C00

P0..P15 SVE predicate

REG_PN ¶
Source

REG_PN :: 0x0D00

PN8..PN15 SME2 predicate-as-counter

REG_Q ¶
Source

REG_Q :: 0x0A00

Q0..Q31 (quad view)

REG_S ¶
Source

REG_S :: 0x0800

S0..S31 (single view)

REG_SYS ¶
Source

REG_SYS :: 0x1000

system registers (MRS/MSR); the field is in bits 16-30

REG_V ¶
Source

REG_V :: 0x0500

V0..V31 (full 128-bit; used in NEON vector form)

REG_W ¶
Source

REG_W :: 0x0200

W0..W30, WZR

REG_WSP ¶
Source

REG_WSP :: 0x0400

WSP

REG_X ¶
Source

REG_X :: 0x0100

X0..X30, XZR (X31 = ZR semantically)

REG_XSP ¶
Source

REG_XSP :: 0x0300

SP (only -- distinct class from X to opt-in)

REG_Z ¶
Source

REG_Z :: 0x0B00

Z0..Z31 SVE scalable vector (low 128 aliased with V)

REG_ZA ¶
Source

REG_ZA :: 0x0F00

ZA0..ZA15, SME's accumulator tiles

REG_ZT ¶
Source

REG_ZT :: 0x0E00

ZT0, the SME2 lookup table

RGSR_EL1 ¶
Source

RGSR_EL1 :: Register(0x4085_1000)

3 0 1 0 5 (FEAT_MTE)

RNDR ¶
Source

RNDR :: Register(0x5920_1000)

op0 op1 CRn CRm op2

RNDRRS ¶
Source

RNDRRS :: Register(0x5921_1000)

3 3 2 4 1

SCTLR_EL1 ¶
Source

SCTLR_EL1 :: Register(0x4080_1000)

3 0 1 0 0

SCTLR_EL2 ¶
Source

SCTLR_EL2 :: Register(0x6080_1000)

3 4 1 0 0

SCTLR_EL3 ¶
Source

SCTLR_EL3 :: Register(0x7080_1000)

3 6 1 0 0

SMCR_EL1 ¶
Source

SMCR_EL1 :: Register(0x4096_1000)

op0 op1 CRn CRm op2

SMCR_EL2 ¶
Source

SMCR_EL2 :: Register(0x6096_1000)

3 4 1 2 6

SP ¶
Source

SP :: Register(REG_XSP | 31)

SPSR_EL1 ¶
Source

SPSR_EL1 :: Register(0x4200_1000)

3 0 4 0 0

SPSR_EL2 ¶
Source

SPSR_EL2 :: Register(0x6200_1000)

3 4 4 0 0

SPSR_EL3 ¶
Source

SPSR_EL3 :: Register(0x7200_1000)

3 6 4 0 0

SP_EL0 ¶
Source

SP_EL0 :: Register(0x4208_1000)

3 0 4 1 0

SP_EL1 ¶
Source

SP_EL1 :: Register(0x6208_1000)

3 4 4 1 0

SVCR ¶
Source

SVCR :: Register(0x5A12_1000)

3 3 4 2 2 (FEAT_SME: SM + ZA bits)

SVE_MUL_IMM ¶
Source

SVE_MUL_IMM :: u8(0xFD)

SVE_PATTERN_IMM ¶
Source

SVE_PATTERN_IMM :: u8(0xFE)

SVE writes its element-count pattern by name (vl8, mul3, all) and its multiplier as mul #N, so both need telling apart from a plain immediate.

TCR_EL1 ¶
Source

TCR_EL1 :: Register(0x4102_1000)

3 0 2 0 2

TFSRE0_EL1 ¶
Source

TFSRE0_EL1 :: Register(0x42B1_1000)

3 0 5 6 1 (FEAT_MTE)

TFSR_EL1 ¶
Source

TFSR_EL1 :: Register(0x42B0_1000)

3 0 5 6 0 (FEAT_MTE)

TPIDR2_EL0 ¶
Source

TPIDR2_EL0 :: Register(0x5E85_1000)

3 3 13 0 5 (SME thread pointer 2)

TPIDRRO_EL0 ¶
Source

TPIDRRO_EL0 :: Register(0x5E83_1000)

3 3 13 0 3

TPIDR_EL0 ¶
Source

TPIDR_EL0 :: Register(0x5E82_1000)

3 3 13 0 2

TPIDR_EL1 ¶
Source

TPIDR_EL1 :: Register(0x4684_1000)

3 0 13 0 4

TPIDR_EL2 ¶
Source

TPIDR_EL2 :: Register(0x6682_1000)

3 4 13 0 2

TPIDR_EL3 ¶
Source

TPIDR_EL3 :: Register(0x7682_1000)

3 6 13 0 2

TRBBASER_EL1 ¶
Source

TRBBASER_EL1 :: Register(0x44DA_1000)

op0 op1 CRn CRm op2

TRBIDR_EL1 ¶
Source

TRBIDR_EL1 :: Register(0x44DF_1000)

3 0 9 11 7

TRBLIMITR_EL1 ¶
Source

TRBLIMITR_EL1 :: Register(0x44D8_1000)

3 0 9 11 0

TRBMAR_EL1 ¶
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TRBMAR_EL1 :: Register(0x44DC_1000)

3 0 9 11 4

TRBPTR_EL1 ¶
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TRBPTR_EL1 :: Register(0x44D9_1000)

3 0 9 11 1

TRBSR_EL1 ¶
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TRBSR_EL1 :: Register(0x44DB_1000)

3 0 9 11 3

TRBTRG_EL1 ¶
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TRBTRG_EL1 :: Register(0x44DE_1000)

3 0 9 11 6

TTBR0_EL1 ¶
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TTBR0_EL1 :: Register(0x4100_1000)

3 0 2 0 0

TTBR1_EL1 ¶
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TTBR1_EL1 :: Register(0x4101_1000)

3 0 2 0 1

V0 ¶
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V0 :: Register(REG_V | 0)

V1 ¶
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V1 :: Register(REG_V | 1)

V10 ¶
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V10 :: Register(REG_V | 10)

V11 ¶
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V11 :: Register(REG_V | 11)

V12 ¶
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V12 :: Register(REG_V | 12)

V13 ¶
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V13 :: Register(REG_V | 13)

V14 ¶
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V14 :: Register(REG_V | 14)

V15 ¶
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V15 :: Register(REG_V | 15)

V16 ¶
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V16 :: Register(REG_V | 16)

V17 ¶
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V17 :: Register(REG_V | 17)

V18 ¶
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V18 :: Register(REG_V | 18)

V19 ¶
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V19 :: Register(REG_V | 19)

V2 ¶
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V2 :: Register(REG_V | 2)

V20 ¶
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V20 :: Register(REG_V | 20)

V21 ¶
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V21 :: Register(REG_V | 21)

V22 ¶
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V22 :: Register(REG_V | 22)

V23 ¶
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V23 :: Register(REG_V | 23)

V24 ¶
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V24 :: Register(REG_V | 24)

V25 ¶
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V25 :: Register(REG_V | 25)

V26 ¶
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V26 :: Register(REG_V | 26)

V27 ¶
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V27 :: Register(REG_V | 27)

V28 ¶
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V28 :: Register(REG_V | 28)

V29 ¶
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V29 :: Register(REG_V | 29)

V3 ¶
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V3 :: Register(REG_V | 3)

V30 ¶
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V30 :: Register(REG_V | 30)

V31 ¶
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V31 :: Register(REG_V | 31)

V4 ¶
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V4 :: Register(REG_V | 4)

V5 ¶
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V5 :: Register(REG_V | 5)

V6 ¶
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V6 :: Register(REG_V | 6)

V7 ¶
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V7 :: Register(REG_V | 7)

V8 ¶
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V8 :: Register(REG_V | 8)

V9 ¶
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V9 :: Register(REG_V | 9)

VBAR_EL1 ¶
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VBAR_EL1 :: Register(0x4600_1000)

3 0 12 0 0

VBAR_EL2 ¶
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VBAR_EL2 :: Register(0x6600_1000)

3 4 12 0 0

VBAR_EL3 ¶
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VBAR_EL3 :: Register(0x7600_1000)

3 6 12 0 0

VDISR_EL2 ¶
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VDISR_EL2 :: Register(0x6609_1000)

3 4 12 1 1

VSESR_EL2 ¶
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VSESR_EL2 :: Register(0x6293_1000)

3 4 5 2 3

VSHAPE_16B ¶
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VSHAPE_16B :: u8(16)

VSHAPE_1D ¶
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VSHAPE_1D :: u8(56)

VSHAPE_1Q ¶
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VSHAPE_1Q :: u8(72)

VSHAPE_2D ¶
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VSHAPE_2D :: u8(64)

VSHAPE_2S ¶
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VSHAPE_2S :: u8(40)

VSHAPE_4H ¶
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VSHAPE_4H :: u8(24)

VSHAPE_4S ¶
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VSHAPE_4S :: u8(48)

VSHAPE_8B ¶
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VSHAPE_8B :: u8(8)

VSHAPE_8H ¶
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VSHAPE_8H :: u8(32)

VSHAPE_ELEM_B ¶
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VSHAPE_ELEM_B :: u8(1)

VSHAPE_ELEM_D ¶
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VSHAPE_ELEM_D :: u8(7)

VSHAPE_ELEM_H ¶
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VSHAPE_ELEM_H :: u8(3)

VSHAPE_ELEM_S ¶
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VSHAPE_ELEM_S :: u8(5)

VSHAPE_NONE ¶
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VSHAPE_NONE :: u8(4)

Arrangement codes carried in Operand.size. Element views are odd and arrangements are multiples of 8, so the two can never be confused; 4 is the neutral "no vector shape" value every scalar class uses.

VTCR_EL2 ¶
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VTCR_EL2 :: Register(0x610A_1000)

3 4 2 1 2

VTTBR_EL2 ¶
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VTTBR_EL2 :: Register(0x6108_1000)

3 4 2 1 0

W0 ¶
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W0 :: Register(REG_W | 0)

W1 ¶
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W1 :: Register(REG_W | 1)

W10 ¶
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W10 :: Register(REG_W | 10)

W11 ¶
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W11 :: Register(REG_W | 11)

W12 ¶
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W12 :: Register(REG_W | 12)

W13 ¶
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W13 :: Register(REG_W | 13)

W14 ¶
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W14 :: Register(REG_W | 14)

W15 ¶
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W15 :: Register(REG_W | 15)

W16 ¶
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W16 :: Register(REG_W | 16)

W17 ¶
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W17 :: Register(REG_W | 17)

W18 ¶
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W18 :: Register(REG_W | 18)

W19 ¶
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W19 :: Register(REG_W | 19)

W2 ¶
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W2 :: Register(REG_W | 2)

W20 ¶
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W20 :: Register(REG_W | 20)

W21 ¶
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W21 :: Register(REG_W | 21)

W22 ¶
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W22 :: Register(REG_W | 22)

W23 ¶
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W23 :: Register(REG_W | 23)

W24 ¶
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W24 :: Register(REG_W | 24)

W25 ¶
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W25 :: Register(REG_W | 25)

W26 ¶
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W26 :: Register(REG_W | 26)

W27 ¶
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W27 :: Register(REG_W | 27)

W28 ¶
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W28 :: Register(REG_W | 28)

W29 ¶
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W29 :: Register(REG_W | 29)

W3 ¶
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W3 :: Register(REG_W | 3)

W30 ¶
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W30 :: Register(REG_W | 30)

W4 ¶
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W4 :: Register(REG_W | 4)

W5 ¶
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W5 :: Register(REG_W | 5)

W6 ¶
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W6 :: Register(REG_W | 6)

W7 ¶
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W7 :: Register(REG_W | 7)

W8 ¶
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W8 :: Register(REG_W | 8)

W9 ¶
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W9 :: Register(REG_W | 9)

WSP ¶
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WSP :: Register(REG_WSP | 31)

WZR ¶
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WZR :: Register(REG_W | 31)

X0 ¶
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X0 :: Register(REG_X | 0)

X1 ¶
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X1 :: Register(REG_X | 1)

X10 ¶
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X10 :: Register(REG_X | 10)

X11 ¶
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X11 :: Register(REG_X | 11)

X12 ¶
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X12 :: Register(REG_X | 12)

X13 ¶
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X13 :: Register(REG_X | 13)

X14 ¶
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X14 :: Register(REG_X | 14)

X15 ¶
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X15 :: Register(REG_X | 15)

X16 ¶
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X16 :: Register(REG_X | 16)

X17 ¶
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X17 :: Register(REG_X | 17)

X18 ¶
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X18 :: Register(REG_X | 18)

X19 ¶
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X19 :: Register(REG_X | 19)

X2 ¶
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X2 :: Register(REG_X | 2)

X20 ¶
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X20 :: Register(REG_X | 20)

X21 ¶
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X21 :: Register(REG_X | 21)

X22 ¶
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X22 :: Register(REG_X | 22)

X23 ¶
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X23 :: Register(REG_X | 23)

X24 ¶
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X24 :: Register(REG_X | 24)

X25 ¶
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X25 :: Register(REG_X | 25)

X26 ¶
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X26 :: Register(REG_X | 26)

X27 ¶
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X27 :: Register(REG_X | 27)

X28 ¶
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X28 :: Register(REG_X | 28)

X29 ¶
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X29 :: Register(REG_X | 29)

X3 ¶
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X3 :: Register(REG_X | 3)

X30 ¶
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X30 :: Register(REG_X | 30)

X4 ¶
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X4 :: Register(REG_X | 4)

X5 ¶
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X5 :: Register(REG_X | 5)

X6 ¶
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X6 :: Register(REG_X | 6)

X7 ¶
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X7 :: Register(REG_X | 7)

X8 ¶
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X8 :: Register(REG_X | 8)

X9 ¶
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X9 :: Register(REG_X | 9)

XZR ¶
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XZR :: Register(REG_X | 31)

ZA_TILE_MASK ¶
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ZA_TILE_MASK :: u8(0xFC)

ZERO's operand is an 8-bit mask, one bit per .d tile, written as the list of the largest tiles that exactly cover it: a .s tile is two .d tiles four apart, a .h tile is four two apart, and the single .b tile is all eight.

ZCR_EL1 ¶
Source

ZCR_EL1 :: Register(0x4090_1000)

3 0 1 2 0 (FEAT_SVE)

ZCR_EL2 ¶
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ZCR_EL2 :: Register(0x6090_1000)

3 4 1 2 0

ZCR_EL3 ¶
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ZCR_EL3 :: Register(0x7090_1000)

3 6 1 2 0

ZSHAPE_B ¶
Source

ZSHAPE_B :: u8(1)

SVE element-width codes carried in Operand.size for a Z register.

ZSHAPE_D ¶
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ZSHAPE_D :: u8(8)

ZSHAPE_H ¶
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ZSHAPE_H :: u8(2)

ZSHAPE_Q ¶
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ZSHAPE_Q :: u8(16)

ZSHAPE_S ¶
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ZSHAPE_S :: u8(4)

ZT0 ¶
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ZT0 :: Register(REG_ZT | 0)

SME2's lookup table. There is exactly one, so it takes no bits.

CLOBBER_FORMS ¶
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@(rodata)
CLOBBER_FORMS: []Clobber = …

DECODE_ENTRIES ¶
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@(rodata)
DECODE_ENTRIES: []Decode_Entry = …

DECODE_INDEX_OP0 ¶
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@(rodata)
DECODE_INDEX_OP0: []Decode_Index = …

ENCODE_FORMS ¶
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@(rodata)
ENCODE_FORMS: []Encoding = …

ENCODE_RUNS ¶
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@(rodata)
ENCODE_RUNS: []Encode_Run = …

SVE_PATTERN_NAMES ¶
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@(rodata)
SVE_PATTERN_NAMES: [32]string = …

The 32 SVE element-count patterns; the gaps are reserved and print as a bare number.

SYSREG_NAMES ¶
Source

@(rodata)
SYSREG_NAMES: [230]Sysreg_Name = …

aprint ¶
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aprint :: proc(
	instructions: []Instruction, 
	inst_info:    []Instruction_Info, 
	label_defs:   []rexcode_isa.Label_Definition, 
	tokens:       ^[dynamic]rexcode_isa.Token = nil, 
	options:      ^rexcode_isa.Print_Options = nil, 
	label_names:  ^map[rexcode_isa.Label_Offset]string = nil, 
	allocator := context.allocator, 
) -> string {…}

aprintln ¶
Source

aprintln :: proc(
	instructions: []Instruction, 
	inst_info:    []Instruction_Info, 
	label_defs:   []rexcode_isa.Label_Definition, 
	tokens:       ^[dynamic]rexcode_isa.Token = nil, 
	options:      ^rexcode_isa.Print_Options = nil, 
	label_names:  ^map[rexcode_isa.Label_Offset]string = nil, 
	allocator := context.allocator, 
) -> string {…}

b_reg ¶
Source

@(require_results)
b_reg :: proc "contextless" (n: u8) -> Register {…}

Scalar view constructors -- the hw number is the same V register.

bprint ¶
Source

bprint :: proc(
	buf:          []u8, 
	instructions: []Instruction, 
	inst_info:    []Instruction_Info, 
	label_defs:   []rexcode_isa.Label_Definition, 
	tokens:       ^[dynamic]rexcode_isa.Token = nil, 
	options:      ^rexcode_isa.Print_Options = nil, 
	label_names:  ^map[rexcode_isa.Label_Offset]string = nil, 
) -> string {…}

bprintln ¶
Source

bprintln :: proc(
	buf:          []u8, 
	instructions: []Instruction, 
	inst_info:    []Instruction_Info, 
	label_defs:   []rexcode_isa.Label_Definition, 
	tokens:       ^[dynamic]rexcode_isa.Token = nil, 
	options:      ^rexcode_isa.Print_Options = nil, 
	label_names:  ^map[rexcode_isa.Label_Offset]string = nil, 
) -> string {…}

d_reg ¶
Source

@(require_results)
d_reg :: proc "contextless" (n: u8) -> Register {…}

decode ¶
Source

decode :: proc(
	data:         []u8, 
	relocs:       []Relocation, 
	instructions: ^[dynamic]Instruction, 
	inst_info:    ^[dynamic]Instruction_Info, 
	label_defs:   ^[dynamic]rexcode_isa.Label_Definition, 
	errors:       ^[dynamic]rexcode_isa.Error, 
	endianness:   Endianness = .LITTLE, 
) -> (byte_count: u32, ok: bool) {…}

decode_bitmask_imm ¶
Source

decode_bitmask_imm :: proc "contextless" (n, immr, imms: u8, is_64: bool) -> (value: u64, ok: bool) {…}

decode_bitmask_imm reconstructs the logical bitmask value from N:immr:imms, at the given width (32 or 64). Returns ok=false if the encoding is invalid.

decode_estimate_instruction_count ¶
Source

@(require_results)
decode_estimate_instruction_count :: proc "contextless" (data: []u8) -> int {…}

Typical-case estimate (AArch64 is fixed 4 bytes/instruction, so this is exact).

decode_max_instruction_count ¶
Source

@(require_results)
decode_max_instruction_count :: proc "contextless" (data: []u8) -> int {…}

Exact instruction-count ceiling for data (AArch64 instructions are 4 bytes).

decode_reserve ¶
Source

decode_reserve :: proc(instructions: ^[dynamic]Instruction, inst_info: ^[dynamic]Instruction_Info, label_defs: ^[dynamic]rexcode_isa.Label_Definition, data: []u8, exact: bool = false) {…}

Pre-size the caller's decode output arrays for data (reserves on top of any existing elements; nil to skip; exact=true for the ceiling, else the estimate).

emit_abs_v16b_v16b ¶
Source

emit_abs_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_abs_v2d_v2d ¶
Source

emit_abs_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_abs_v2s_v2s ¶
Source

emit_abs_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_abs_v4h_v4h ¶
Source

emit_abs_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_abs_v4s_v4s ¶
Source

emit_abs_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_abs_v8b_v8b ¶
Source

emit_abs_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_abs

emit_abs_v8h_v8h ¶
Source

emit_abs_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_abs_zb_p_zb ¶
Source

emit_abs_zb_p_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_abs

emit_abs_zd_p_zd ¶
Source

emit_abs_zd_p_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_abs_zh_p_zh ¶
Source

emit_abs_zh_p_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_abs_zs_p_zs ¶
Source

emit_abs_zs_p_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_adc ¶
Source

emit_adc :: emit_adc_r_r_r

emit_adc_r_r_r ¶
Source

emit_adc_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_adclb ¶
Source

emit_adclb :: emit_adclb_zs_zs_zs

emit_adclb_zd_zd_zd ¶
Source

emit_adclb_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_adclb_zs_zs_zs ¶
Source

emit_adclb_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_adclt ¶
Source

emit_adclt :: emit_adclt_zs_zs_zs

emit_adclt_zd_zd_zd ¶
Source

emit_adclt_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_adclt_zs_zs_zs ¶
Source

emit_adclt_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_adcs ¶
Source

emit_adcs :: emit_adcs_r_r_r

emit_adcs_r_r_r ¶
Source

emit_adcs_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_add_r_r_ex ¶
Source

emit_add_r_r_ex :: proc(
	instructions: ^[dynamic]Instruction, 
	dst:          Register, 
	src:          Register, 
	src2:         Register, 
	src2_ext:     Extend, 
	src2_amount:  u8, 
) {…}

Related Procedure Groups

emit_add

emit_add_r_r_i ¶
Source

emit_add_r_r_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

Related Procedure Groups

emit_add

emit_add_r_r_sh ¶
Source

emit_add_r_r_sh :: proc(
	instructions: ^[dynamic]Instruction, 
	dst:          Register, 
	src:          Register, 
	src2:         Register, 
	src2_shift:   Shift_Type, 
	src2_amount:  u8, 
) {…}

Related Procedure Groups

emit_add

emit_add_v16b_v16b_v16b ¶
Source

emit_add_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_add

emit_add_v2d_v2d_v2d ¶
Source

emit_add_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_add_v2s_v2s_v2s ¶
Source

emit_add_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_add_v4h_v4h_v4h ¶
Source

emit_add_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_add_v4s_v4s_v4s ¶
Source

emit_add_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_add_v8b_v8b_v8b ¶
Source

emit_add_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_add_v8h_v8h_v8h ¶
Source

emit_add_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_add_zb_p_zb_zb ¶
Source

emit_add_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_add

emit_add_zb_zb_zb ¶
Source

emit_add_zb_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_add

emit_add_zd_p_zd_zd ¶
Source

emit_add_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_add_zd_zd_zd ¶
Source

emit_add_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_add_zh_p_zh_zh ¶
Source

emit_add_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_add_zh_zh_zh ¶
Source

emit_add_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_add_zs_p_zs_zs ¶
Source

emit_add_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_add_zs_zs_zs ¶
Source

emit_add_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_addg ¶
Source

emit_addg :: emit_addg_r_r_i_i

emit_addg_r_r_i_i ¶
Source

emit_addg_r_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) {…}

emit_addha ¶
Source

emit_addha :: emit_addha_i_p_p_zs

emit_addha_i_p_p_zs ¶
Source

emit_addha_i_p_p_zs :: proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8) {…}

emit_addhn ¶
Source

emit_addhn :: emit_addhn_v8b_v8h_v8h

emit_addhn2 ¶
Source

emit_addhn2 :: emit_addhn2_v16b_v8h_v8h

emit_addhn2_v16b_v8h_v8h ¶
Source

emit_addhn2_v16b_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_addhn2_v4s_v2d_v2d ¶
Source

emit_addhn2_v4s_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_addhn2_v8h_v4s_v4s ¶
Source

emit_addhn2_v8h_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_addhn_v2s_v2d_v2d ¶
Source

emit_addhn_v2s_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_addhn_v4h_v4s_v4s ¶
Source

emit_addhn_v4h_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_addhn_v8b_v8h_v8h ¶
Source

emit_addhn_v8b_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_addp ¶
Source

emit_addp :: emit_addp_v8b_v8b_v8b

emit_addp_v16b_v16b_v16b ¶
Source

emit_addp_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_addp_v2d_v2d_v2d ¶
Source

emit_addp_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_addp_v2s_v2s_v2s ¶
Source

emit_addp_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_addp_v4h_v4h_v4h ¶
Source

emit_addp_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_addp_v4s_v4s_v4s ¶
Source

emit_addp_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_addp_v8b_v8b_v8b ¶
Source

emit_addp_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_addp_v8h_v8h_v8h ¶
Source

emit_addp_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_adds_r_r_ex ¶
Source

emit_adds_r_r_ex :: proc(
	instructions: ^[dynamic]Instruction, 
	dst:          Register, 
	src:          Register, 
	src2:         Register, 
	src2_ext:     Extend, 
	src2_amount:  u8, 
) {…}

Related Procedure Groups

emit_adds

emit_adds_r_r_i ¶
Source

emit_adds_r_r_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

Related Procedure Groups

emit_adds

emit_adds_r_r_sh ¶
Source

emit_adds_r_r_sh :: proc(
	instructions: ^[dynamic]Instruction, 
	dst:          Register, 
	src:          Register, 
	src2:         Register, 
	src2_shift:   Shift_Type, 
	src2_amount:  u8, 
) {…}

Related Procedure Groups

emit_adds

emit_addv ¶
Source

emit_addv :: emit_addv_r_v8b

emit_addv_r_v16b ¶
Source

emit_addv_r_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_addv_r_v4h ¶
Source

emit_addv_r_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_addv_r_v4s ¶
Source

emit_addv_r_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_addv_r_v8b ¶
Source

emit_addv_r_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_addv_r_v8h ¶
Source

emit_addv_r_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_addva ¶
Source

emit_addva :: emit_addva_i_p_p_zs

emit_addva_i_p_p_zs ¶
Source

emit_addva_i_p_p_zs :: proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8, rz3: u8) {…}

emit_adr ¶
Source

emit_adr :: emit_adr_r_l

emit_adr_r_l ¶
Source

emit_adr_r_l :: proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) {…}

emit_adrp ¶
Source

emit_adrp :: emit_adrp_r_l

emit_adrp_r_l ¶
Source

emit_adrp_r_l :: proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) {…}

emit_aesd_v16b_v16b ¶
Source

emit_aesd_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_aesd

emit_aesd_zb_zb_zb ¶
Source

emit_aesd_zb_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_aesd

emit_aese_v16b_v16b ¶
Source

emit_aese_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_aese

emit_aese_zb_zb_zb ¶
Source

emit_aese_zb_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_aese

emit_aesimc_v16b_v16b ¶
Source

emit_aesimc_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_aesimc

emit_aesimc_zb_zb ¶
Source

emit_aesimc_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

Related Procedure Groups

emit_aesimc

emit_aesmc_v16b_v16b ¶
Source

emit_aesmc_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_aesmc

emit_aesmc_zb_zb ¶
Source

emit_aesmc_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

Related Procedure Groups

emit_aesmc

emit_amx_clr ¶
Source

emit_amx_clr :: emit_amx_clr_none

emit_amx_clr_none ¶
Source

emit_amx_clr_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_amx_extrx ¶
Source

emit_amx_extrx :: emit_amx_extrx_r

emit_amx_extrx_r ¶
Source

emit_amx_extrx_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_amx_extry ¶
Source

emit_amx_extry :: emit_amx_extry_r

emit_amx_extry_r ¶
Source

emit_amx_extry_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_amx_fma16 ¶
Source

emit_amx_fma16 :: emit_amx_fma16_r

emit_amx_fma16_r ¶
Source

emit_amx_fma16_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_amx_fma32 ¶
Source

emit_amx_fma32 :: emit_amx_fma32_r

emit_amx_fma32_r ¶
Source

emit_amx_fma32_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_amx_fma64 ¶
Source

emit_amx_fma64 :: emit_amx_fma64_r

emit_amx_fma64_r ¶
Source

emit_amx_fma64_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_amx_fms16 ¶
Source

emit_amx_fms16 :: emit_amx_fms16_r

emit_amx_fms16_r ¶
Source

emit_amx_fms16_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_amx_fms32 ¶
Source

emit_amx_fms32 :: emit_amx_fms32_r

emit_amx_fms32_r ¶
Source

emit_amx_fms32_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_amx_fms64 ¶
Source

emit_amx_fms64 :: emit_amx_fms64_r

emit_amx_fms64_r ¶
Source

emit_amx_fms64_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_amx_genlut ¶
Source

emit_amx_genlut :: emit_amx_genlut_r

emit_amx_genlut_r ¶
Source

emit_amx_genlut_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_amx_ldx ¶
Source

emit_amx_ldx :: emit_amx_ldx_r

emit_amx_ldx_r ¶
Source

emit_amx_ldx_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_amx_ldy ¶
Source

emit_amx_ldy :: emit_amx_ldy_r

emit_amx_ldy_r ¶
Source

emit_amx_ldy_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_amx_ldz ¶
Source

emit_amx_ldz :: emit_amx_ldz_r

emit_amx_ldz_r ¶
Source

emit_amx_ldz_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_amx_ldzi ¶
Source

emit_amx_ldzi :: emit_amx_ldzi_r

emit_amx_ldzi_r ¶
Source

emit_amx_ldzi_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_amx_mac16 ¶
Source

emit_amx_mac16 :: emit_amx_mac16_r

emit_amx_mac16_r ¶
Source

emit_amx_mac16_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_amx_matfp ¶
Source

emit_amx_matfp :: emit_amx_matfp_r

emit_amx_matfp_r ¶
Source

emit_amx_matfp_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_amx_matint ¶
Source

emit_amx_matint :: emit_amx_matint_r

emit_amx_matint_r ¶
Source

emit_amx_matint_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_amx_set ¶
Source

emit_amx_set :: emit_amx_set_none

emit_amx_set_none ¶
Source

emit_amx_set_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_amx_stx ¶
Source

emit_amx_stx :: emit_amx_stx_r

emit_amx_stx_r ¶
Source

emit_amx_stx_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_amx_sty ¶
Source

emit_amx_sty :: emit_amx_sty_r

emit_amx_sty_r ¶
Source

emit_amx_sty_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_amx_stz ¶
Source

emit_amx_stz :: emit_amx_stz_r

emit_amx_stz_r ¶
Source

emit_amx_stz_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_amx_stzi ¶
Source

emit_amx_stzi :: emit_amx_stzi_r

emit_amx_stzi_r ¶
Source

emit_amx_stzi_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_amx_vecfp ¶
Source

emit_amx_vecfp :: emit_amx_vecfp_r

emit_amx_vecfp_r ¶
Source

emit_amx_vecfp_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_amx_vecint ¶
Source

emit_amx_vecint :: emit_amx_vecint_r

emit_amx_vecint_r ¶
Source

emit_amx_vecint_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_and_pb_p_pb_pb ¶
Source

emit_and_pb_p_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_and_r_r_i ¶
Source

emit_and_r_r_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

Related Procedure Groups

emit_and

emit_and_r_r_sh ¶
Source

emit_and_r_r_sh :: proc(
	instructions: ^[dynamic]Instruction, 
	dst:          Register, 
	src:          Register, 
	src2:         Register, 
	src2_shift:   Shift_Type, 
	src2_amount:  u8, 
) {…}

Related Procedure Groups

emit_and

emit_and_v16b_v16b_v16b ¶
Source

emit_and_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_and

emit_and_zb_p_zb_zb ¶
Source

emit_and_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_and

emit_and_zd_p_zd_zd ¶
Source

emit_and_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_and_zh_p_zh_zh ¶
Source

emit_and_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_and_zs_p_zs_zs ¶
Source

emit_and_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_ands_pb_p_pb_pb ¶
Source

emit_ands_pb_p_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_ands

emit_ands_r_r_i ¶
Source

emit_ands_r_r_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

Related Procedure Groups

emit_ands

emit_ands_r_r_sh ¶
Source

emit_ands_r_r_sh :: proc(
	instructions: ^[dynamic]Instruction, 
	dst:          Register, 
	src:          Register, 
	src2:         Register, 
	src2_shift:   Shift_Type, 
	src2_amount:  u8, 
) {…}

Related Procedure Groups

emit_ands

emit_asr_r_r_i ¶
Source

emit_asr_r_r_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

Related Procedure Groups

emit_asr

emit_asr_r_r_r ¶
Source

emit_asr_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_asr

emit_asr_zb_p_zb_zb ¶
Source

emit_asr_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_asr

emit_asr_zd_p_zd_zd ¶
Source

emit_asr_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_asr_zh_p_zh_zh ¶
Source

emit_asr_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_asr_zs_p_zs_zs ¶
Source

emit_asr_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_asrr ¶
Source

emit_asrr :: emit_asrr_zb_p_zb_zb

emit_asrr_zb_p_zb_zb ¶
Source

emit_asrr_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_asrr_zd_p_zd_zd ¶
Source

emit_asrr_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_asrr_zh_p_zh_zh ¶
Source

emit_asrr_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_asrr_zs_p_zs_zs ¶
Source

emit_asrr_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_at_s12e0r ¶
Source

emit_at_s12e0r :: emit_at_s12e0r_r

emit_at_s12e0r_r ¶
Source

emit_at_s12e0r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_at_s12e0w ¶
Source

emit_at_s12e0w :: emit_at_s12e0w_r

emit_at_s12e0w_r ¶
Source

emit_at_s12e0w_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_at_s12e1r ¶
Source

emit_at_s12e1r :: emit_at_s12e1r_r

emit_at_s12e1r_r ¶
Source

emit_at_s12e1r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_at_s12e1w ¶
Source

emit_at_s12e1w :: emit_at_s12e1w_r

emit_at_s12e1w_r ¶
Source

emit_at_s12e1w_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_at_s1e0r ¶
Source

emit_at_s1e0r :: emit_at_s1e0r_r

emit_at_s1e0r_r ¶
Source

emit_at_s1e0r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_at_s1e0w ¶
Source

emit_at_s1e0w :: emit_at_s1e0w_r

emit_at_s1e0w_r ¶
Source

emit_at_s1e0w_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_at_s1e1a ¶
Source

emit_at_s1e1a :: emit_at_s1e1a_r

emit_at_s1e1a_r ¶
Source

emit_at_s1e1a_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_at_s1e1r ¶
Source

emit_at_s1e1r :: emit_at_s1e1r_r

emit_at_s1e1r_r ¶
Source

emit_at_s1e1r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_at_s1e1w ¶
Source

emit_at_s1e1w :: emit_at_s1e1w_r

emit_at_s1e1w_r ¶
Source

emit_at_s1e1w_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_at_s1e2r ¶
Source

emit_at_s1e2r :: emit_at_s1e2r_r

emit_at_s1e2r_r ¶
Source

emit_at_s1e2r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_at_s1e2w ¶
Source

emit_at_s1e2w :: emit_at_s1e2w_r

emit_at_s1e2w_r ¶
Source

emit_at_s1e2w_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_at_s1e3r ¶
Source

emit_at_s1e3r :: emit_at_s1e3r_r

emit_at_s1e3r_r ¶
Source

emit_at_s1e3r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_at_s1e3w ¶
Source

emit_at_s1e3w :: emit_at_s1e3w_r

emit_at_s1e3w_r ¶
Source

emit_at_s1e3w_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_autda ¶
Source

emit_autda :: emit_autda_r_r

emit_autda_r_r ¶
Source

emit_autda_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_autdb ¶
Source

emit_autdb :: emit_autdb_r_r

emit_autdb_r_r ¶
Source

emit_autdb_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_autdza ¶
Source

emit_autdza :: emit_autdza_r

emit_autdza_r ¶
Source

emit_autdza_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_autdzb ¶
Source

emit_autdzb :: emit_autdzb_r

emit_autdzb_r ¶
Source

emit_autdzb_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_autia ¶
Source

emit_autia :: emit_autia_r_r

emit_autia1716 ¶
Source

emit_autia1716 :: emit_autia1716_none

emit_autia1716_none ¶
Source

emit_autia1716_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_autia_r_r ¶
Source

emit_autia_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_autiasp ¶
Source

emit_autiasp :: emit_autiasp_none

emit_autiasp_none ¶
Source

emit_autiasp_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_autib ¶
Source

emit_autib :: emit_autib_r_r

emit_autib1716 ¶
Source

emit_autib1716 :: emit_autib1716_none

emit_autib1716_none ¶
Source

emit_autib1716_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_autib_r_r ¶
Source

emit_autib_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_autibsp ¶
Source

emit_autibsp :: emit_autibsp_none

emit_autibsp_none ¶
Source

emit_autibsp_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_autiza ¶
Source

emit_autiza :: emit_autiza_r

emit_autiza_r ¶
Source

emit_autiza_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_autizb ¶
Source

emit_autizb :: emit_autizb_r

emit_autizb_r ¶
Source

emit_autizb_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_b ¶
Source

emit_b :: emit_b_l

emit_b_al ¶
Source

emit_b_al :: emit_b_al_l

emit_b_al_l ¶
Source

emit_b_al_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_b_cc ¶
Source

emit_b_cc :: emit_b_cc_l

emit_b_cc_l ¶
Source

emit_b_cc_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_b_cs ¶
Source

emit_b_cs :: emit_b_cs_l

emit_b_cs_l ¶
Source

emit_b_cs_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_b_eq ¶
Source

emit_b_eq :: emit_b_eq_l

emit_b_eq_l ¶
Source

emit_b_eq_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_b_ge ¶
Source

emit_b_ge :: emit_b_ge_l

emit_b_ge_l ¶
Source

emit_b_ge_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_b_gt ¶
Source

emit_b_gt :: emit_b_gt_l

emit_b_gt_l ¶
Source

emit_b_gt_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_b_hi ¶
Source

emit_b_hi :: emit_b_hi_l

emit_b_hi_l ¶
Source

emit_b_hi_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_b_l ¶
Source

emit_b_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_b_le ¶
Source

emit_b_le :: emit_b_le_l

emit_b_le_l ¶
Source

emit_b_le_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_b_ls ¶
Source

emit_b_ls :: emit_b_ls_l

emit_b_ls_l ¶
Source

emit_b_ls_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_b_lt ¶
Source

emit_b_lt :: emit_b_lt_l

emit_b_lt_l ¶
Source

emit_b_lt_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_b_mi ¶
Source

emit_b_mi :: emit_b_mi_l

emit_b_mi_l ¶
Source

emit_b_mi_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_b_ne ¶
Source

emit_b_ne :: emit_b_ne_l

emit_b_ne_l ¶
Source

emit_b_ne_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_b_nv ¶
Source

emit_b_nv :: emit_b_nv_l

emit_b_nv_l ¶
Source

emit_b_nv_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_b_pl ¶
Source

emit_b_pl :: emit_b_pl_l

emit_b_pl_l ¶
Source

emit_b_pl_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_b_vc ¶
Source

emit_b_vc :: emit_b_vc_l

emit_b_vc_l ¶
Source

emit_b_vc_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_b_vs ¶
Source

emit_b_vs :: emit_b_vs_l

emit_b_vs_l ¶
Source

emit_b_vs_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_bc_al ¶
Source

emit_bc_al :: emit_bc_al_l

emit_bc_al_l ¶
Source

emit_bc_al_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_bc_cc ¶
Source

emit_bc_cc :: emit_bc_cc_l

emit_bc_cc_l ¶
Source

emit_bc_cc_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_bc_cs ¶
Source

emit_bc_cs :: emit_bc_cs_l

emit_bc_cs_l ¶
Source

emit_bc_cs_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_bc_eq ¶
Source

emit_bc_eq :: emit_bc_eq_l

emit_bc_eq_l ¶
Source

emit_bc_eq_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_bc_ge ¶
Source

emit_bc_ge :: emit_bc_ge_l

emit_bc_ge_l ¶
Source

emit_bc_ge_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_bc_gt ¶
Source

emit_bc_gt :: emit_bc_gt_l

emit_bc_gt_l ¶
Source

emit_bc_gt_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_bc_hi ¶
Source

emit_bc_hi :: emit_bc_hi_l

emit_bc_hi_l ¶
Source

emit_bc_hi_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_bc_le ¶
Source

emit_bc_le :: emit_bc_le_l

emit_bc_le_l ¶
Source

emit_bc_le_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_bc_ls ¶
Source

emit_bc_ls :: emit_bc_ls_l

emit_bc_ls_l ¶
Source

emit_bc_ls_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_bc_lt ¶
Source

emit_bc_lt :: emit_bc_lt_l

emit_bc_lt_l ¶
Source

emit_bc_lt_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_bc_mi ¶
Source

emit_bc_mi :: emit_bc_mi_l

emit_bc_mi_l ¶
Source

emit_bc_mi_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_bc_ne ¶
Source

emit_bc_ne :: emit_bc_ne_l

emit_bc_ne_l ¶
Source

emit_bc_ne_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_bc_nv ¶
Source

emit_bc_nv :: emit_bc_nv_l

emit_bc_nv_l ¶
Source

emit_bc_nv_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_bc_pl ¶
Source

emit_bc_pl :: emit_bc_pl_l

emit_bc_pl_l ¶
Source

emit_bc_pl_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_bc_vc ¶
Source

emit_bc_vc :: emit_bc_vc_l

emit_bc_vc_l ¶
Source

emit_bc_vc_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_bc_vs ¶
Source

emit_bc_vs :: emit_bc_vs_l

emit_bc_vs_l ¶
Source

emit_bc_vs_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_bcax_v16b_v16b_v16b_v16b ¶
Source

emit_bcax_v16b_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) {…}

Related Procedure Groups

emit_bcax

emit_bcax_zd_zd_zd_zd ¶
Source

emit_bcax_zd_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_bcax

emit_bfadd_zh_p_zh_zh ¶
Source

emit_bfadd_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_bfadd

emit_bfadd_zh_zh_zh ¶
Source

emit_bfadd_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_bfadd

emit_bfclamp ¶
Source

emit_bfclamp :: emit_bfclamp_zh_zh_zh

emit_bfclamp_zh_zh_zh ¶
Source

emit_bfclamp_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_bfcvt_r_r ¶
Source

emit_bfcvt_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_bfcvt

emit_bfcvt_zh_p_zs ¶
Source

emit_bfcvt_zh_p_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_bfcvt

emit_bfcvtn ¶
Source

emit_bfcvtn :: emit_bfcvtn_v4h_v4s

emit_bfcvtn2 ¶
Source

emit_bfcvtn2 :: emit_bfcvtn2_v8h_v4s

emit_bfcvtn2_v8h_v4s ¶
Source

emit_bfcvtn2_v8h_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_bfcvtn_v4h_v4s ¶
Source

emit_bfcvtn_v4h_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_bfcvtnt ¶
Source

emit_bfcvtnt :: emit_bfcvtnt_zh_p_zs

emit_bfcvtnt_zh_p_zs ¶
Source

emit_bfcvtnt_zh_p_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_bfdot ¶
Source

emit_bfdot :: emit_bfdot_v4s_v8h_v8h

emit_bfdot_v4s_v8h_v8h ¶
Source

emit_bfdot_v4s_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_bfmaxnm ¶
Source

emit_bfmaxnm :: emit_bfmaxnm_zh_p_zh_zh

emit_bfmaxnm_zh_p_zh_zh ¶
Source

emit_bfmaxnm_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_bfminnm ¶
Source

emit_bfminnm :: emit_bfminnm_zh_p_zh_zh

emit_bfminnm_zh_p_zh_zh ¶
Source

emit_bfminnm_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_bfmla ¶
Source

emit_bfmla :: emit_bfmla_zh_p_zh_zh

emit_bfmla_zh_p_zh_zh ¶
Source

emit_bfmla_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_bfmlalb ¶
Source

emit_bfmlalb :: emit_bfmlalb_v4s_v8h_v8h

emit_bfmlalb_v4s_v8h_v8h ¶
Source

emit_bfmlalb_v4s_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_bfmlalt ¶
Source

emit_bfmlalt :: emit_bfmlalt_v4s_v8h_v8h

emit_bfmlalt_v4s_v8h_v8h ¶
Source

emit_bfmlalt_v4s_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_bfmls ¶
Source

emit_bfmls :: emit_bfmls_zh_p_zh_zh

emit_bfmls_zh_p_zh_zh ¶
Source

emit_bfmls_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_bfmmla ¶
Source

emit_bfmmla :: emit_bfmmla_v4s_v8h_v8h

emit_bfmmla_v4s_v8h_v8h ¶
Source

emit_bfmmla_v4s_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_bfmopa ¶
Source

emit_bfmopa :: emit_bfmopa_i_p_p_zh_zh

emit_bfmopa_i_p_p_zh_zh ¶
Source

emit_bfmopa_i_p_p_zh_zh :: proc(
	instructions: ^[dynamic]Instruction, 
	imm:          i64, 
	rz1:          u8, 
	rz2:          u8, 
	rz3:          u8, 
	rz4:          u8, 
) {…}

emit_bfmops ¶
Source

emit_bfmops :: emit_bfmops_i_p_p_zh_zh

emit_bfmops_i_p_p_zh_zh ¶
Source

emit_bfmops_i_p_p_zh_zh :: proc(
	instructions: ^[dynamic]Instruction, 
	imm:          i64, 
	rz1:          u8, 
	rz2:          u8, 
	rz3:          u8, 
	rz4:          u8, 
) {…}

emit_bfmul_zh_p_zh_zh ¶
Source

emit_bfmul_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_bfmul

emit_bfmul_zh_zh_zh ¶
Source

emit_bfmul_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_bfmul

emit_bfsub_zh_p_zh_zh ¶
Source

emit_bfsub_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_bfsub

emit_bfsub_zh_zh_zh ¶
Source

emit_bfsub_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_bfsub

emit_bic_pb_p_pb_pb ¶
Source

emit_bic_pb_p_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_bic_r_r_sh ¶
Source

emit_bic_r_r_sh :: proc(
	instructions: ^[dynamic]Instruction, 
	dst:          Register, 
	src:          Register, 
	src2:         Register, 
	src2_shift:   Shift_Type, 
	src2_amount:  u8, 
) {…}

Related Procedure Groups

emit_bic

emit_bic_v16b_v16b_v16b ¶
Source

emit_bic_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_bic

emit_bic_zb_p_zb_zb ¶
Source

emit_bic_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_bic

emit_bic_zd_p_zd_zd ¶
Source

emit_bic_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_bic_zh_p_zh_zh ¶
Source

emit_bic_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_bic_zs_p_zs_zs ¶
Source

emit_bic_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_bics_pb_p_pb_pb ¶
Source

emit_bics_pb_p_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_bics

emit_bics_r_r_sh ¶
Source

emit_bics_r_r_sh :: proc(
	instructions: ^[dynamic]Instruction, 
	dst:          Register, 
	src:          Register, 
	src2:         Register, 
	src2_shift:   Shift_Type, 
	src2_amount:  u8, 
) {…}

Related Procedure Groups

emit_bics

emit_bif ¶
Source

emit_bif :: emit_bif_v16b_v16b_v16b

emit_bif_v16b_v16b_v16b ¶
Source

emit_bif_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_bit ¶
Source

emit_bit :: emit_bit_v16b_v16b_v16b

emit_bit_v16b_v16b_v16b ¶
Source

emit_bit_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_bl ¶
Source

emit_bl :: emit_bl_l

emit_bl_l ¶
Source

emit_bl_l :: proc(instructions: ^[dynamic]Instruction, label: u32) {…}

emit_blr ¶
Source

emit_blr :: emit_blr_r

emit_blr_r ¶
Source

emit_blr_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_blraa ¶
Source

emit_blraa :: emit_blraa_r_r

emit_blraa_r_r ¶
Source

emit_blraa_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_blraaz ¶
Source

emit_blraaz :: emit_blraaz_r

emit_blraaz_r ¶
Source

emit_blraaz_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_blrab ¶
Source

emit_blrab :: emit_blrab_r_r

emit_blrab_r_r ¶
Source

emit_blrab_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_blrabz ¶
Source

emit_blrabz :: emit_blrabz_r

emit_blrabz_r ¶
Source

emit_blrabz_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_br ¶
Source

emit_br :: emit_br_r

emit_br_r ¶
Source

emit_br_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_braa ¶
Source

emit_braa :: emit_braa_r_r

emit_braa_r_r ¶
Source

emit_braa_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_braaz ¶
Source

emit_braaz :: emit_braaz_r

emit_braaz_r ¶
Source

emit_braaz_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_brab ¶
Source

emit_brab :: emit_brab_r_r

emit_brab_r_r ¶
Source

emit_brab_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_brabz ¶
Source

emit_brabz :: emit_brabz_r

emit_brabz_r ¶
Source

emit_brabz_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_brk ¶
Source

emit_brk :: emit_brk_i

emit_brk_i ¶
Source

emit_brk_i :: proc(instructions: ^[dynamic]Instruction, imm: i64) {…}

emit_brka ¶
Source

emit_brka :: emit_brka_pb_p_pb

emit_brka_pb_p_pb ¶
Source

emit_brka_pb_p_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_brkas ¶
Source

emit_brkas :: emit_brkas_pb_p_pb

emit_brkas_pb_p_pb ¶
Source

emit_brkas_pb_p_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_brkb ¶
Source

emit_brkb :: emit_brkb_pb_p_pb

emit_brkb_pb_p_pb ¶
Source

emit_brkb_pb_p_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_brkbs ¶
Source

emit_brkbs :: emit_brkbs_pb_p_pb

emit_brkbs_pb_p_pb ¶
Source

emit_brkbs_pb_p_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_brkn ¶
Source

emit_brkn :: emit_brkn_pb_p_pb_pb

emit_brkn_pb_p_pb_pb ¶
Source

emit_brkn_pb_p_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_brkpa ¶
Source

emit_brkpa :: emit_brkpa_pb_p_pb_pb

emit_brkpa_pb_p_pb_pb ¶
Source

emit_brkpa_pb_p_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_brkpb ¶
Source

emit_brkpb :: emit_brkpb_pb_p_pb_pb

emit_brkpb_pb_p_pb_pb ¶
Source

emit_brkpb_pb_p_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_bsl1n ¶
Source

emit_bsl1n :: emit_bsl1n_zd_zd_zd_zd

emit_bsl1n_zd_zd_zd_zd ¶
Source

emit_bsl1n_zd_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_bsl2n ¶
Source

emit_bsl2n :: emit_bsl2n_zd_zd_zd_zd

emit_bsl2n_zd_zd_zd_zd ¶
Source

emit_bsl2n_zd_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_bsl_v16b_v16b_v16b ¶
Source

emit_bsl_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_bsl

emit_bsl_zd_zd_zd_zd ¶
Source

emit_bsl_zd_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_bsl

emit_bti ¶
Source

emit_bti :: emit_bti_none

emit_bti_c ¶
Source

emit_bti_c :: emit_bti_c_none

emit_bti_c_none ¶
Source

emit_bti_c_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_bti_j ¶
Source

emit_bti_j :: emit_bti_j_none

emit_bti_j_none ¶
Source

emit_bti_j_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_bti_jc ¶
Source

emit_bti_jc :: emit_bti_jc_none

emit_bti_jc_none ¶
Source

emit_bti_jc_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_bti_none ¶
Source

emit_bti_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_cas ¶
Source

emit_cas :: emit_cas_r_r_m

emit_cas_r_r_m ¶
Source

emit_cas_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_casa ¶
Source

emit_casa :: emit_casa_r_r_m

emit_casa_r_r_m ¶
Source

emit_casa_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_casab ¶
Source

emit_casab :: emit_casab_r_r_m

emit_casab_r_r_m ¶
Source

emit_casab_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_casah ¶
Source

emit_casah :: emit_casah_r_r_m

emit_casah_r_r_m ¶
Source

emit_casah_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_casal ¶
Source

emit_casal :: emit_casal_r_r_m

emit_casal_r_r_m ¶
Source

emit_casal_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_casalb ¶
Source

emit_casalb :: emit_casalb_r_r_m

emit_casalb_r_r_m ¶
Source

emit_casalb_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_casalh ¶
Source

emit_casalh :: emit_casalh_r_r_m

emit_casalh_r_r_m ¶
Source

emit_casalh_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_casb ¶
Source

emit_casb :: emit_casb_r_r_m

emit_casb_r_r_m ¶
Source

emit_casb_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_cash ¶
Source

emit_cash :: emit_cash_r_r_m

emit_cash_r_r_m ¶
Source

emit_cash_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_casl ¶
Source

emit_casl :: emit_casl_r_r_m

emit_casl_r_r_m ¶
Source

emit_casl_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_caslb ¶
Source

emit_caslb :: emit_caslb_r_r_m

emit_caslb_r_r_m ¶
Source

emit_caslb_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_caslh ¶
Source

emit_caslh :: emit_caslh_r_r_m

emit_caslh_r_r_m ¶
Source

emit_caslh_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_casp ¶
Source

emit_casp :: emit_casp_r_r_m

emit_casp_r_r_m ¶
Source

emit_casp_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_caspa ¶
Source

emit_caspa :: emit_caspa_r_r_m

emit_caspa_r_r_m ¶
Source

emit_caspa_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_caspal ¶
Source

emit_caspal :: emit_caspal_r_r_m

emit_caspal_r_r_m ¶
Source

emit_caspal_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_caspl ¶
Source

emit_caspl :: emit_caspl_r_r_m

emit_caspl_r_r_m ¶
Source

emit_caspl_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_cbnz ¶
Source

emit_cbnz :: emit_cbnz_r_l

emit_cbnz_r_l ¶
Source

emit_cbnz_r_l :: proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) {…}

emit_cbz ¶
Source

emit_cbz :: emit_cbz_r_l

emit_cbz_r_l ¶
Source

emit_cbz_r_l :: proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) {…}

emit_ccmn_r_i_i_c ¶
Source

emit_ccmn_r_i_i_c :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64, cond: Cond) {…}

Related Procedure Groups

emit_ccmn

emit_ccmn_r_r_i_c ¶
Source

emit_ccmn_r_r_i_c :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, cond: Cond) {…}

Related Procedure Groups

emit_ccmn

emit_ccmp_r_i_i_c ¶
Source

emit_ccmp_r_i_i_c :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64, cond: Cond) {…}

Related Procedure Groups

emit_ccmp

emit_ccmp_r_r_i_c ¶
Source

emit_ccmp_r_r_i_c :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, cond: Cond) {…}

Related Procedure Groups

emit_ccmp

emit_cinc ¶
Source

emit_cinc :: emit_cinc_r_r_c

emit_cinc_r_r_c ¶
Source

emit_cinc_r_r_c :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, cond: Cond) {…}

emit_cinv ¶
Source

emit_cinv :: emit_cinv_r_r_c

emit_cinv_r_r_c ¶
Source

emit_cinv_r_r_c :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, cond: Cond) {…}

emit_cls_r_r ¶
Source

emit_cls_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_cls

emit_cls_v16b_v16b ¶
Source

emit_cls_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_cls_v2s_v2s ¶
Source

emit_cls_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_cls_v4h_v4h ¶
Source

emit_cls_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_cls_v4s_v4s ¶
Source

emit_cls_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_cls_v8b_v8b ¶
Source

emit_cls_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_cls_v8h_v8h ¶
Source

emit_cls_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_cls_zb_p_zb ¶
Source

emit_cls_zb_p_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_cls

emit_cls_zd_p_zd ¶
Source

emit_cls_zd_p_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_cls_zh_p_zh ¶
Source

emit_cls_zh_p_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_cls_zs_p_zs ¶
Source

emit_cls_zs_p_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_clz_r_r ¶
Source

emit_clz_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_clz

emit_clz_v16b_v16b ¶
Source

emit_clz_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_clz_v2s_v2s ¶
Source

emit_clz_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_clz_v4h_v4h ¶
Source

emit_clz_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_clz_v4s_v4s ¶
Source

emit_clz_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_clz_v8b_v8b ¶
Source

emit_clz_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_clz_v8h_v8h ¶
Source

emit_clz_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_clz_zb_p_zb ¶
Source

emit_clz_zb_p_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_clz

emit_clz_zd_p_zd ¶
Source

emit_clz_zd_p_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_clz_zh_p_zh ¶
Source

emit_clz_zh_p_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_clz_zs_p_zs ¶
Source

emit_clz_zs_p_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_cmeq ¶
Source

emit_cmeq :: emit_cmeq_v16b_v16b_v16b

emit_cmeq_v16b_v16b_v16b ¶
Source

emit_cmeq_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmeq_v2d_v2d_v2d ¶
Source

emit_cmeq_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmeq_v4s_v4s_v4s ¶
Source

emit_cmeq_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmeq_v8h_v8h_v8h ¶
Source

emit_cmeq_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmge ¶
Source

emit_cmge :: emit_cmge_v8b_v8b_v8b

emit_cmge_v16b_v16b_v16b ¶
Source

emit_cmge_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmge_v2d_v2d_v2d ¶
Source

emit_cmge_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmge_v2s_v2s_v2s ¶
Source

emit_cmge_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmge_v4h_v4h_v4h ¶
Source

emit_cmge_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmge_v4s_v4s_v4s ¶
Source

emit_cmge_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmge_v8b_v8b_v8b ¶
Source

emit_cmge_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmge_v8h_v8h_v8h ¶
Source

emit_cmge_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmgt ¶
Source

emit_cmgt :: emit_cmgt_v16b_v16b_v16b

emit_cmgt_v16b_v16b_v16b ¶
Source

emit_cmgt_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmgt_v2d_v2d_v2d ¶
Source

emit_cmgt_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmhi ¶
Source

emit_cmhi :: emit_cmhi_v16b_v16b_v16b

emit_cmhi_v16b_v16b_v16b ¶
Source

emit_cmhi_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmhi_v2d_v2d_v2d ¶
Source

emit_cmhi_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmhs ¶
Source

emit_cmhs :: emit_cmhs_v8b_v8b_v8b

emit_cmhs_v16b_v16b_v16b ¶
Source

emit_cmhs_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmhs_v2d_v2d_v2d ¶
Source

emit_cmhs_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmhs_v2s_v2s_v2s ¶
Source

emit_cmhs_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmhs_v4h_v4h_v4h ¶
Source

emit_cmhs_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmhs_v4s_v4s_v4s ¶
Source

emit_cmhs_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmhs_v8b_v8b_v8b ¶
Source

emit_cmhs_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmhs_v8h_v8h_v8h ¶
Source

emit_cmhs_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmle ¶
Source

emit_cmle :: emit_cmle_v8b_v8b

emit_cmle_v16b_v16b ¶
Source

emit_cmle_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_cmle_v2d_v2d ¶
Source

emit_cmle_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_cmle_v2s_v2s ¶
Source

emit_cmle_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_cmle_v4h_v4h ¶
Source

emit_cmle_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_cmle_v4s_v4s ¶
Source

emit_cmle_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_cmle_v8b_v8b ¶
Source

emit_cmle_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_cmle_v8h_v8h ¶
Source

emit_cmle_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_cmlt ¶
Source

emit_cmlt :: emit_cmlt_v8b_v8b

emit_cmlt_v16b_v16b ¶
Source

emit_cmlt_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_cmlt_v2d_v2d ¶
Source

emit_cmlt_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_cmlt_v2s_v2s ¶
Source

emit_cmlt_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_cmlt_v4h_v4h ¶
Source

emit_cmlt_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_cmlt_v4s_v4s ¶
Source

emit_cmlt_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_cmlt_v8b_v8b ¶
Source

emit_cmlt_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_cmlt_v8h_v8h ¶
Source

emit_cmlt_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_cmn_r_ex ¶
Source

emit_cmn_r_ex :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src_ext: Extend, src_amount: u8) {…}

Related Procedure Groups

emit_cmn

emit_cmn_r_i ¶
Source

emit_cmn_r_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) {…}

Related Procedure Groups

emit_cmn

emit_cmn_r_sh ¶
Source

emit_cmn_r_sh :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) {…}

Related Procedure Groups

emit_cmn

emit_cmp_r_ex ¶
Source

emit_cmp_r_ex :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src_ext: Extend, src_amount: u8) {…}

Related Procedure Groups

emit_cmp

emit_cmp_r_i ¶
Source

emit_cmp_r_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) {…}

Related Procedure Groups

emit_cmp

emit_cmp_r_sh ¶
Source

emit_cmp_r_sh :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) {…}

Related Procedure Groups

emit_cmp

emit_cmpeq ¶
Source

emit_cmpeq :: emit_cmpeq_pb_p_zb_zb

emit_cmpeq_pb_p_zb_zb ¶
Source

emit_cmpeq_pb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmpeq_pd_p_zd_zd ¶
Source

emit_cmpeq_pd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmpeq_ph_p_zh_zh ¶
Source

emit_cmpeq_ph_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmpeq_ps_p_zs_zs ¶
Source

emit_cmpeq_ps_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmpge ¶
Source

emit_cmpge :: emit_cmpge_pb_p_zb_zb

emit_cmpge_pb_p_zb_zb ¶
Source

emit_cmpge_pb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmpge_pd_p_zd_zd ¶
Source

emit_cmpge_pd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmpge_ph_p_zh_zh ¶
Source

emit_cmpge_ph_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmpge_ps_p_zs_zs ¶
Source

emit_cmpge_ps_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmpgt ¶
Source

emit_cmpgt :: emit_cmpgt_pb_p_zb_zb

emit_cmpgt_pb_p_zb_zb ¶
Source

emit_cmpgt_pb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmpgt_pd_p_zd_zd ¶
Source

emit_cmpgt_pd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmpgt_ph_p_zh_zh ¶
Source

emit_cmpgt_ph_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmpgt_ps_p_zs_zs ¶
Source

emit_cmpgt_ps_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmphi ¶
Source

emit_cmphi :: emit_cmphi_pb_p_zb_zb

emit_cmphi_pb_p_zb_zb ¶
Source

emit_cmphi_pb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmphi_pd_p_zd_zd ¶
Source

emit_cmphi_pd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmphi_ph_p_zh_zh ¶
Source

emit_cmphi_ph_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmphi_ps_p_zs_zs ¶
Source

emit_cmphi_ps_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmphs ¶
Source

emit_cmphs :: emit_cmphs_pb_p_zb_zb

emit_cmphs_pb_p_zb_zb ¶
Source

emit_cmphs_pb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmphs_pd_p_zd_zd ¶
Source

emit_cmphs_pd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmphs_ph_p_zh_zh ¶
Source

emit_cmphs_ph_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmphs_ps_p_zs_zs ¶
Source

emit_cmphs_ps_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmple ¶
Source

emit_cmple :: emit_cmple_pb_p_zb_zb

emit_cmple_pb_p_zb_zb ¶
Source

emit_cmple_pb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmple_pd_p_zd_zd ¶
Source

emit_cmple_pd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmple_ph_p_zh_zh ¶
Source

emit_cmple_ph_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmple_ps_p_zs_zs ¶
Source

emit_cmple_ps_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmplo ¶
Source

emit_cmplo :: emit_cmplo_pb_p_zb_zb

emit_cmplo_pb_p_zb_zb ¶
Source

emit_cmplo_pb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmplo_pd_p_zd_zd ¶
Source

emit_cmplo_pd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmplo_ph_p_zh_zh ¶
Source

emit_cmplo_ph_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmplo_ps_p_zs_zs ¶
Source

emit_cmplo_ps_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmpls ¶
Source

emit_cmpls :: emit_cmpls_pb_p_zb_zb

emit_cmpls_pb_p_zb_zb ¶
Source

emit_cmpls_pb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmpls_pd_p_zd_zd ¶
Source

emit_cmpls_pd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmpls_ph_p_zh_zh ¶
Source

emit_cmpls_ph_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmpls_ps_p_zs_zs ¶
Source

emit_cmpls_ps_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmplt ¶
Source

emit_cmplt :: emit_cmplt_pb_p_zb_zb

emit_cmplt_pb_p_zb_zb ¶
Source

emit_cmplt_pb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmplt_pd_p_zd_zd ¶
Source

emit_cmplt_pd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmplt_ph_p_zh_zh ¶
Source

emit_cmplt_ph_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmplt_ps_p_zs_zs ¶
Source

emit_cmplt_ps_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmpne ¶
Source

emit_cmpne :: emit_cmpne_pb_p_zb_zb

emit_cmpne_pb_p_zb_zb ¶
Source

emit_cmpne_pb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmpne_pd_p_zd_zd ¶
Source

emit_cmpne_pd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmpne_ph_p_zh_zh ¶
Source

emit_cmpne_ph_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmpne_ps_p_zs_zs ¶
Source

emit_cmpne_ps_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_cmtst ¶
Source

emit_cmtst :: emit_cmtst_v8b_v8b_v8b

emit_cmtst_v16b_v16b_v16b ¶
Source

emit_cmtst_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmtst_v2d_v2d_v2d ¶
Source

emit_cmtst_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmtst_v2s_v2s_v2s ¶
Source

emit_cmtst_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmtst_v4h_v4h_v4h ¶
Source

emit_cmtst_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmtst_v4s_v4s_v4s ¶
Source

emit_cmtst_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmtst_v8b_v8b_v8b ¶
Source

emit_cmtst_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cmtst_v8h_v8h_v8h ¶
Source

emit_cmtst_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cneg ¶
Source

emit_cneg :: emit_cneg_r_r_c

emit_cneg_r_r_c ¶
Source

emit_cneg_r_r_c :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, cond: Cond) {…}

emit_cnt_v16b_v16b ¶
Source

emit_cnt_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_cnt_v8b_v8b ¶
Source

emit_cnt_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_cnt

emit_cnt_zb_p_zb ¶
Source

emit_cnt_zb_p_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_cnt

emit_cnt_zd_p_zd ¶
Source

emit_cnt_zd_p_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_cnt_zh_p_zh ¶
Source

emit_cnt_zh_p_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_cnt_zs_p_zs ¶
Source

emit_cnt_zs_p_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_cntb ¶
Source

emit_cntb :: emit_cntb_r_i_i

emit_cntb_r_i_i ¶
Source

emit_cntb_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

emit_cntd ¶
Source

emit_cntd :: emit_cntd_r_i_i

emit_cntd_r_i_i ¶
Source

emit_cntd_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

emit_cnth ¶
Source

emit_cnth :: emit_cnth_r_i_i

emit_cnth_r_i_i ¶
Source

emit_cnth_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

emit_cntp ¶
Source

emit_cntp :: emit_cntp_r_p_pb

emit_cntp_r_p_pb ¶
Source

emit_cntp_r_p_pb :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, rz2: u8) {…}

emit_cntp_r_p_pd ¶
Source

emit_cntp_r_p_pd :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, rz2: u8) {…}

emit_cntp_r_p_ph ¶
Source

emit_cntp_r_p_ph :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, rz2: u8) {…}

emit_cntp_r_p_ps ¶
Source

emit_cntp_r_p_ps :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, rz2: u8) {…}

emit_cntw ¶
Source

emit_cntw :: emit_cntw_r_i_i

emit_cntw_r_i_i ¶
Source

emit_cntw_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

emit_compact ¶
Source

emit_compact :: emit_compact_zs_p_zs

emit_compact_zd_p_zd ¶
Source

emit_compact_zd_p_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_compact_zs_p_zs ¶
Source

emit_compact_zs_p_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_cpy ¶
Source

emit_cpy :: emit_cpy_zb_p_r

emit_cpy_zb_p_r ¶
Source

emit_cpy_zb_p_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, src: Register) {…}

emit_cpy_zd_p_r ¶
Source

emit_cpy_zd_p_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, src: Register) {…}

emit_cpy_zh_p_r ¶
Source

emit_cpy_zh_p_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, src: Register) {…}

emit_cpy_zs_p_r ¶
Source

emit_cpy_zs_p_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, src: Register) {…}

emit_cpye ¶
Source

emit_cpye :: emit_cpye_r_r_r

emit_cpye_r_r_r ¶
Source

emit_cpye_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cpyfe ¶
Source

emit_cpyfe :: emit_cpyfe_r_r_r

emit_cpyfe_r_r_r ¶
Source

emit_cpyfe_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cpyfm ¶
Source

emit_cpyfm :: emit_cpyfm_r_r_r

emit_cpyfm_r_r_r ¶
Source

emit_cpyfm_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cpyfp ¶
Source

emit_cpyfp :: emit_cpyfp_r_r_r

emit_cpyfp_r_r_r ¶
Source

emit_cpyfp_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cpym ¶
Source

emit_cpym :: emit_cpym_r_r_r

emit_cpym_r_r_r ¶
Source

emit_cpym_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_cpyp ¶
Source

emit_cpyp :: emit_cpyp_r_r_r

emit_cpyp_r_r_r ¶
Source

emit_cpyp_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_crc32b ¶
Source

emit_crc32b :: emit_crc32b_r_r_r

emit_crc32b_r_r_r ¶
Source

emit_crc32b_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_crc32cb ¶
Source

emit_crc32cb :: emit_crc32cb_r_r_r

emit_crc32cb_r_r_r ¶
Source

emit_crc32cb_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_crc32ch ¶
Source

emit_crc32ch :: emit_crc32ch_r_r_r

emit_crc32ch_r_r_r ¶
Source

emit_crc32ch_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_crc32cw ¶
Source

emit_crc32cw :: emit_crc32cw_r_r_r

emit_crc32cw_r_r_r ¶
Source

emit_crc32cw_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_crc32cx ¶
Source

emit_crc32cx :: emit_crc32cx_r_r_r

emit_crc32cx_r_r_r ¶
Source

emit_crc32cx_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_crc32h ¶
Source

emit_crc32h :: emit_crc32h_r_r_r

emit_crc32h_r_r_r ¶
Source

emit_crc32h_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_crc32w ¶
Source

emit_crc32w :: emit_crc32w_r_r_r

emit_crc32w_r_r_r ¶
Source

emit_crc32w_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_crc32x ¶
Source

emit_crc32x :: emit_crc32x_r_r_r

emit_crc32x_r_r_r ¶
Source

emit_crc32x_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_csdb ¶
Source

emit_csdb :: emit_csdb_none

emit_csdb_none ¶
Source

emit_csdb_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_csel ¶
Source

emit_csel :: emit_csel_r_r_r_c

emit_csel_r_r_r_c ¶
Source

emit_csel_r_r_r_c :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, cond: Cond) {…}

emit_cset ¶
Source

emit_cset :: emit_cset_r_c

emit_cset_r_c ¶
Source

emit_cset_r_c :: proc(instructions: ^[dynamic]Instruction, dst: Register, cond: Cond) {…}

emit_csetm ¶
Source

emit_csetm :: emit_csetm_r_c

emit_csetm_r_c ¶
Source

emit_csetm_r_c :: proc(instructions: ^[dynamic]Instruction, dst: Register, cond: Cond) {…}

emit_csinc ¶
Source

emit_csinc :: emit_csinc_r_r_r_c

emit_csinc_r_r_r_c ¶
Source

emit_csinc_r_r_r_c :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, cond: Cond) {…}

emit_csinv ¶
Source

emit_csinv :: emit_csinv_r_r_r_c

emit_csinv_r_r_r_c ¶
Source

emit_csinv_r_r_r_c :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, cond: Cond) {…}

emit_csneg ¶
Source

emit_csneg :: emit_csneg_r_r_r_c

emit_csneg_r_r_r_c ¶
Source

emit_csneg_r_r_r_c :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, cond: Cond) {…}

emit_dc_cigdpapa ¶
Source

emit_dc_cigdpapa :: emit_dc_cigdpapa_r

emit_dc_cigdpapa_r ¶
Source

emit_dc_cigdpapa_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_dc_cipapa ¶
Source

emit_dc_cipapa :: emit_dc_cipapa_r

emit_dc_cipapa_r ¶
Source

emit_dc_cipapa_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_dc_cisw ¶
Source

emit_dc_cisw :: emit_dc_cisw_r

emit_dc_cisw_r ¶
Source

emit_dc_cisw_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_dc_civac ¶
Source

emit_dc_civac :: emit_dc_civac_r

emit_dc_civac_r ¶
Source

emit_dc_civac_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_dc_csw ¶
Source

emit_dc_csw :: emit_dc_csw_r

emit_dc_csw_r ¶
Source

emit_dc_csw_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_dc_cvac ¶
Source

emit_dc_cvac :: emit_dc_cvac_r

emit_dc_cvac_r ¶
Source

emit_dc_cvac_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_dc_cvau ¶
Source

emit_dc_cvau :: emit_dc_cvau_r

emit_dc_cvau_r ¶
Source

emit_dc_cvau_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_dc_isw ¶
Source

emit_dc_isw :: emit_dc_isw_r

emit_dc_isw_r ¶
Source

emit_dc_isw_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_dc_ivac ¶
Source

emit_dc_ivac :: emit_dc_ivac_r

emit_dc_ivac_r ¶
Source

emit_dc_ivac_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_dc_zva ¶
Source

emit_dc_zva :: emit_dc_zva_r

emit_dc_zva_r ¶
Source

emit_dc_zva_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_decb ¶
Source

emit_decb :: emit_decb_r_i_i

emit_decb_r_i_i ¶
Source

emit_decb_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

emit_decd_r_i_i ¶
Source

emit_decd_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_decd

emit_decd_zd_i_i ¶
Source

emit_decd_zd_i_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_decd

emit_dech_r_i_i ¶
Source

emit_dech_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_dech

emit_dech_zh_i_i ¶
Source

emit_dech_zh_i_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_dech

emit_decp_r_pb ¶
Source

emit_decp_r_pb :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

Related Procedure Groups

emit_decp

emit_decp_r_pd ¶
Source

emit_decp_r_pd :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

emit_decp_r_ph ¶
Source

emit_decp_r_ph :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

emit_decp_r_ps ¶
Source

emit_decp_r_ps :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

emit_decp_zd_pd ¶
Source

emit_decp_zd_pd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

emit_decp_zh_ph ¶
Source

emit_decp_zh_ph :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

Related Procedure Groups

emit_decp

emit_decp_zs_ps ¶
Source

emit_decp_zs_ps :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

emit_decw_r_i_i ¶
Source

emit_decw_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_decw

emit_decw_zs_i_i ¶
Source

emit_decw_zs_i_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_decw

emit_dgh ¶
Source

emit_dgh :: emit_dgh_none

emit_dgh_none ¶
Source

emit_dgh_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_dmb ¶
Source

emit_dmb :: emit_dmb_i

emit_dmb_i ¶
Source

emit_dmb_i :: proc(instructions: ^[dynamic]Instruction, imm: i64) {…}

emit_dsb ¶
Source

emit_dsb :: emit_dsb_i

emit_dsb_i ¶
Source

emit_dsb_i :: proc(instructions: ^[dynamic]Instruction, imm: i64) {…}

emit_dup_v16b_r ¶
Source

emit_dup_v16b_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_dup_v16b_veb_i ¶
Source

emit_dup_v16b_veb_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_dup_v2d_r ¶
Source

emit_dup_v2d_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_dup_v2d_ved_i ¶
Source

emit_dup_v2d_ved_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_dup_v2s_r ¶
Source

emit_dup_v2s_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_dup_v2s_ves_i ¶
Source

emit_dup_v2s_ves_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_dup_v4h_r ¶
Source

emit_dup_v4h_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_dup_v4h_veh_i ¶
Source

emit_dup_v4h_veh_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_dup_v4s_r ¶
Source

emit_dup_v4s_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_dup_v4s_ves_i ¶
Source

emit_dup_v4s_ves_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_dup_v8b_r ¶
Source

emit_dup_v8b_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_dup

emit_dup_v8b_veb_i ¶
Source

emit_dup_v8b_veb_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

Related Procedure Groups

emit_dup

emit_dup_v8h_r ¶
Source

emit_dup_v8h_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_dup_v8h_veh_i ¶
Source

emit_dup_v8h_veh_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_dup_zb_r ¶
Source

emit_dup_zb_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) {…}

Related Procedure Groups

emit_dup

emit_dup_zd_r ¶
Source

emit_dup_zd_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) {…}

emit_dup_zh_r ¶
Source

emit_dup_zh_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) {…}

emit_dup_zs_r ¶
Source

emit_dup_zs_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) {…}

emit_eon ¶
Source

emit_eon :: emit_eon_r_r_sh

emit_eon_r_r_sh ¶
Source

emit_eon_r_r_sh :: proc(
	instructions: ^[dynamic]Instruction, 
	dst:          Register, 
	src:          Register, 
	src2:         Register, 
	src2_shift:   Shift_Type, 
	src2_amount:  u8, 
) {…}

emit_eor3_v16b_v16b_v16b_v16b ¶
Source

emit_eor3_v16b_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) {…}

Related Procedure Groups

emit_eor3

emit_eor3_zd_zd_zd_zd ¶
Source

emit_eor3_zd_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_eor3

emit_eor_pb_p_pb_pb ¶
Source

emit_eor_pb_p_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_eor_r_r_i ¶
Source

emit_eor_r_r_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

Related Procedure Groups

emit_eor

emit_eor_r_r_sh ¶
Source

emit_eor_r_r_sh :: proc(
	instructions: ^[dynamic]Instruction, 
	dst:          Register, 
	src:          Register, 
	src2:         Register, 
	src2_shift:   Shift_Type, 
	src2_amount:  u8, 
) {…}

Related Procedure Groups

emit_eor

emit_eor_v16b_v16b_v16b ¶
Source

emit_eor_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_eor

emit_eor_zb_p_zb_zb ¶
Source

emit_eor_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_eor

emit_eor_zd_p_zd_zd ¶
Source

emit_eor_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_eor_zh_p_zh_zh ¶
Source

emit_eor_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_eor_zs_p_zs_zs ¶
Source

emit_eor_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_eors ¶
Source

emit_eors :: emit_eors_pb_p_pb_pb

emit_eors_pb_p_pb_pb ¶
Source

emit_eors_pb_p_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_eret ¶
Source

emit_eret :: emit_eret_none

emit_eret_none ¶
Source

emit_eret_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_eretaa ¶
Source

emit_eretaa :: emit_eretaa_none

emit_eretaa_none ¶
Source

emit_eretaa_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_eretab ¶
Source

emit_eretab :: emit_eretab_none

emit_eretab_none ¶
Source

emit_eretab_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_ext_v16b_v16b_v16b_i ¶
Source

emit_ext_v16b_v16b_v16b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) {…}

emit_ext_v8b_v8b_v8b_i ¶
Source

emit_ext_v8b_v8b_v8b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) {…}

Related Procedure Groups

emit_ext

emit_ext_zb_zb_zb_i ¶
Source

emit_ext_zb_zb_zb_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) {…}

Related Procedure Groups

emit_ext

emit_extr ¶
Source

emit_extr :: emit_extr_r_r_r_i

emit_extr_r_r_r_i ¶
Source

emit_extr_r_r_r_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) {…}

emit_fabs_r_r ¶
Source

emit_fabs_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_fabs

emit_fabs_v2d_v2d ¶
Source

emit_fabs_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fabs_v2s_v2s ¶
Source

emit_fabs_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fabs_v4h_v4h ¶
Source

emit_fabs_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fabs_v4s_v4s ¶
Source

emit_fabs_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fabs_v8h_v8h ¶
Source

emit_fabs_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fabs_zd_p_zd ¶
Source

emit_fabs_zd_p_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_fabs_zh_p_zh ¶
Source

emit_fabs_zh_p_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_fabs

emit_fabs_zs_p_zs ¶
Source

emit_fabs_zs_p_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_facge ¶
Source

emit_facge :: emit_facge_v2s_v2s_v2s

emit_facge_v2d_v2d_v2d ¶
Source

emit_facge_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_facge_v2s_v2s_v2s ¶
Source

emit_facge_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_facge_v4h_v4h_v4h ¶
Source

emit_facge_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_facge_v4s_v4s_v4s ¶
Source

emit_facge_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_facge_v8h_v8h_v8h ¶
Source

emit_facge_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_facgt ¶
Source

emit_facgt :: emit_facgt_v2s_v2s_v2s

emit_facgt_v2d_v2d_v2d ¶
Source

emit_facgt_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_facgt_v2s_v2s_v2s ¶
Source

emit_facgt_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_facgt_v4h_v4h_v4h ¶
Source

emit_facgt_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_facgt_v4s_v4s_v4s ¶
Source

emit_facgt_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_facgt_v8h_v8h_v8h ¶
Source

emit_facgt_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fadd_r_r_r ¶
Source

emit_fadd_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_fadd

emit_fadd_v2d_v2d_v2d ¶
Source

emit_fadd_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fadd_v2s_v2s_v2s ¶
Source

emit_fadd_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fadd_v4s_v4s_v4s ¶
Source

emit_fadd_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fadd_zd_p_zd_zd ¶
Source

emit_fadd_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fadd_zd_zd_zd ¶
Source

emit_fadd_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_fadd_zh_p_zh_zh ¶
Source

emit_fadd_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_fadd

emit_fadd_zh_zh_zh ¶
Source

emit_fadd_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_fadd

emit_fadd_zs_p_zs_zs ¶
Source

emit_fadd_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fadd_zs_zs_zs ¶
Source

emit_fadd_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_faddp ¶
Source

emit_faddp :: emit_faddp_v2s_v2s_v2s

emit_faddp_v2d_v2d_v2d ¶
Source

emit_faddp_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_faddp_v2s_v2s_v2s ¶
Source

emit_faddp_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_faddp_v4h_v4h_v4h ¶
Source

emit_faddp_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_faddp_v4s_v4s_v4s ¶
Source

emit_faddp_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_faddp_v8h_v8h_v8h ¶
Source

emit_faddp_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fcadd ¶
Source

emit_fcadd :: emit_fcadd_v4h_v4h_v4h_i

emit_fcadd_v2d_v2d_v2d_i ¶
Source

emit_fcadd_v2d_v2d_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) {…}

emit_fcadd_v4h_v4h_v4h_i ¶
Source

emit_fcadd_v4h_v4h_v4h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) {…}

emit_fcadd_v4s_v4s_v4s_i ¶
Source

emit_fcadd_v4s_v4s_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) {…}

emit_fcadd_v8h_v8h_v8h_i ¶
Source

emit_fcadd_v8h_v8h_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) {…}

emit_fcmeq_pd_p_zd_zd ¶
Source

emit_fcmeq_pd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fcmeq_ph_p_zh_zh ¶
Source

emit_fcmeq_ph_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_fcmeq

emit_fcmeq_ps_p_zs_zs ¶
Source

emit_fcmeq_ps_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fcmeq_v2d_v2d_v2d ¶
Source

emit_fcmeq_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fcmeq_v2s_v2s_v2s ¶
Source

emit_fcmeq_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_fcmeq

emit_fcmeq_v4h_v4h_v4h ¶
Source

emit_fcmeq_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fcmeq_v4s_v4s_v4s ¶
Source

emit_fcmeq_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fcmeq_v8h_v8h_v8h ¶
Source

emit_fcmeq_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fcmge_pd_p_zd_zd ¶
Source

emit_fcmge_pd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fcmge_ph_p_zh_zh ¶
Source

emit_fcmge_ph_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_fcmge

emit_fcmge_ps_p_zs_zs ¶
Source

emit_fcmge_ps_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fcmge_v2d_v2d_v2d ¶
Source

emit_fcmge_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fcmge_v2s_v2s_v2s ¶
Source

emit_fcmge_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_fcmge

emit_fcmge_v4h_v4h_v4h ¶
Source

emit_fcmge_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fcmge_v4s_v4s_v4s ¶
Source

emit_fcmge_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fcmge_v8h_v8h_v8h ¶
Source

emit_fcmge_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fcmgt_pd_p_zd_zd ¶
Source

emit_fcmgt_pd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fcmgt_ph_p_zh_zh ¶
Source

emit_fcmgt_ph_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_fcmgt

emit_fcmgt_ps_p_zs_zs ¶
Source

emit_fcmgt_ps_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fcmgt_v2d_v2d_v2d ¶
Source

emit_fcmgt_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fcmgt_v2s_v2s_v2s ¶
Source

emit_fcmgt_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_fcmgt

emit_fcmgt_v4h_v4h_v4h ¶
Source

emit_fcmgt_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fcmgt_v4s_v4s_v4s ¶
Source

emit_fcmgt_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fcmgt_v8h_v8h_v8h ¶
Source

emit_fcmgt_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fcmla ¶
Source

emit_fcmla :: emit_fcmla_v4h_v4h_v4h_i

emit_fcmla_v2d_v2d_v2d_i ¶
Source

emit_fcmla_v2d_v2d_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) {…}

emit_fcmla_v4h_v4h_v4h_i ¶
Source

emit_fcmla_v4h_v4h_v4h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) {…}

emit_fcmla_v4s_v4s_v4s_i ¶
Source

emit_fcmla_v4s_v4s_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) {…}

emit_fcmla_v8h_v8h_v8h_i ¶
Source

emit_fcmla_v8h_v8h_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) {…}

emit_fcmle_pd_p_zd ¶
Source

emit_fcmle_pd_p_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_fcmle_ph_p_zh ¶
Source

emit_fcmle_ph_p_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_fcmle

emit_fcmle_ps_p_zs ¶
Source

emit_fcmle_ps_p_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_fcmle_v2d_v2d ¶
Source

emit_fcmle_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcmle_v2s_v2s ¶
Source

emit_fcmle_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_fcmle

emit_fcmle_v4h_v4h ¶
Source

emit_fcmle_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcmle_v4s_v4s ¶
Source

emit_fcmle_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcmle_v8h_v8h ¶
Source

emit_fcmle_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcmlt_pd_p_zd ¶
Source

emit_fcmlt_pd_p_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_fcmlt_ph_p_zh ¶
Source

emit_fcmlt_ph_p_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_fcmlt

emit_fcmlt_ps_p_zs ¶
Source

emit_fcmlt_ps_p_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_fcmlt_v2d_v2d ¶
Source

emit_fcmlt_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcmlt_v2s_v2s ¶
Source

emit_fcmlt_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_fcmlt

emit_fcmlt_v4h_v4h ¶
Source

emit_fcmlt_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcmlt_v4s_v4s ¶
Source

emit_fcmlt_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcmlt_v8h_v8h ¶
Source

emit_fcmlt_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcmne ¶
Source

emit_fcmne :: emit_fcmne_ph_p_zh_zh

emit_fcmne_pd_p_zd_zd ¶
Source

emit_fcmne_pd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fcmne_ph_p_zh_zh ¶
Source

emit_fcmne_ph_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fcmne_ps_p_zs_zs ¶
Source

emit_fcmne_ps_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fcmp ¶
Source

emit_fcmp :: emit_fcmp_r_r

emit_fcmp_r_r ¶
Source

emit_fcmp_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcmpe ¶
Source

emit_fcmpe :: emit_fcmpe_r_r

emit_fcmpe_r_r ¶
Source

emit_fcmpe_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcmuo ¶
Source

emit_fcmuo :: emit_fcmuo_ph_p_zh_zh

emit_fcmuo_pd_p_zd_zd ¶
Source

emit_fcmuo_pd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fcmuo_ph_p_zh_zh ¶
Source

emit_fcmuo_ph_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fcmuo_ps_p_zs_zs ¶
Source

emit_fcmuo_ps_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fcsel ¶
Source

emit_fcsel :: emit_fcsel_r_r_r_c

emit_fcsel_r_r_r_c ¶
Source

emit_fcsel_r_r_r_c :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, cond: Cond) {…}

emit_fcvt ¶
Source

emit_fcvt :: emit_fcvt_r_r

emit_fcvt_r_r ¶
Source

emit_fcvt_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtas ¶
Source

emit_fcvtas :: emit_fcvtas_r_r

emit_fcvtas_r_r ¶
Source

emit_fcvtas_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtas_v2d_v2d ¶
Source

emit_fcvtas_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtas_v2s_v2s ¶
Source

emit_fcvtas_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtas_v4h_v4h ¶
Source

emit_fcvtas_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtas_v4s_v4s ¶
Source

emit_fcvtas_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtas_v8h_v8h ¶
Source

emit_fcvtas_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtau ¶
Source

emit_fcvtau :: emit_fcvtau_r_r

emit_fcvtau_r_r ¶
Source

emit_fcvtau_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtau_v2d_v2d ¶
Source

emit_fcvtau_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtau_v2s_v2s ¶
Source

emit_fcvtau_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtau_v4h_v4h ¶
Source

emit_fcvtau_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtau_v4s_v4s ¶
Source

emit_fcvtau_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtau_v8h_v8h ¶
Source

emit_fcvtau_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtl ¶
Source

emit_fcvtl :: emit_fcvtl_v4s_v4h

emit_fcvtl2 ¶
Source

emit_fcvtl2 :: emit_fcvtl2_v4s_v8h

emit_fcvtl2_v2d_v4s ¶
Source

emit_fcvtl2_v2d_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtl2_v4s_v8h ¶
Source

emit_fcvtl2_v4s_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtl_v2d_v2s ¶
Source

emit_fcvtl_v2d_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtl_v4s_v4h ¶
Source

emit_fcvtl_v4s_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtms ¶
Source

emit_fcvtms :: emit_fcvtms_r_r

emit_fcvtms_r_r ¶
Source

emit_fcvtms_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtms_v2d_v2d ¶
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emit_fcvtms_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtms_v2s_v2s ¶
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emit_fcvtms_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtms_v4h_v4h ¶
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emit_fcvtms_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtms_v4s_v4s ¶
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emit_fcvtms_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtms_v8h_v8h ¶
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emit_fcvtms_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtmu ¶
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emit_fcvtmu :: emit_fcvtmu_r_r

emit_fcvtmu_r_r ¶
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emit_fcvtmu_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtmu_v2d_v2d ¶
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emit_fcvtmu_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtmu_v2s_v2s ¶
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emit_fcvtmu_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtmu_v4h_v4h ¶
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emit_fcvtmu_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtmu_v4s_v4s ¶
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emit_fcvtmu_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtmu_v8h_v8h ¶
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emit_fcvtmu_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtn ¶
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emit_fcvtn :: emit_fcvtn_v4h_v4s

emit_fcvtn2 ¶
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emit_fcvtn2 :: emit_fcvtn2_v8h_v4s

emit_fcvtn2_v4s_v2d ¶
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emit_fcvtn2_v4s_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtn2_v8h_v4s ¶
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emit_fcvtn2_v8h_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtn_v2s_v2d ¶
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emit_fcvtn_v2s_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtn_v4h_v4s ¶
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emit_fcvtn_v4h_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtns ¶
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emit_fcvtns :: emit_fcvtns_r_r

emit_fcvtns_r_r ¶
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emit_fcvtns_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtns_v2d_v2d ¶
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emit_fcvtns_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtns_v2s_v2s ¶
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emit_fcvtns_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtns_v4h_v4h ¶
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emit_fcvtns_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtns_v4s_v4s ¶
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emit_fcvtns_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtns_v8h_v8h ¶
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emit_fcvtns_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtnu ¶
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emit_fcvtnu :: emit_fcvtnu_r_r

emit_fcvtnu_r_r ¶
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emit_fcvtnu_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtnu_v2d_v2d ¶
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emit_fcvtnu_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtnu_v2s_v2s ¶
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emit_fcvtnu_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtnu_v4h_v4h ¶
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emit_fcvtnu_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtnu_v4s_v4s ¶
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emit_fcvtnu_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtnu_v8h_v8h ¶
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emit_fcvtnu_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtps ¶
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emit_fcvtps :: emit_fcvtps_r_r

emit_fcvtps_r_r ¶
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emit_fcvtps_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtps_v2d_v2d ¶
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emit_fcvtps_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtps_v2s_v2s ¶
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emit_fcvtps_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtps_v4h_v4h ¶
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emit_fcvtps_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtps_v4s_v4s ¶
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emit_fcvtps_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtps_v8h_v8h ¶
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emit_fcvtps_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtpu ¶
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emit_fcvtpu :: emit_fcvtpu_r_r

emit_fcvtpu_r_r ¶
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emit_fcvtpu_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtpu_v2d_v2d ¶
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emit_fcvtpu_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtpu_v2s_v2s ¶
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emit_fcvtpu_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtpu_v4h_v4h ¶
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emit_fcvtpu_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtpu_v4s_v4s ¶
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emit_fcvtpu_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtpu_v8h_v8h ¶
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emit_fcvtpu_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtxn ¶
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emit_fcvtxn :: emit_fcvtxn_v2s_v2d

emit_fcvtxn2 ¶
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emit_fcvtxn2 :: emit_fcvtxn2_v4s_v2d

emit_fcvtxn2_v4s_v2d ¶
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emit_fcvtxn2_v4s_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtxn_v2s_v2d ¶
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emit_fcvtxn_v2s_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtzs ¶
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emit_fcvtzs :: emit_fcvtzs_r_r

emit_fcvtzs_r_r ¶
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emit_fcvtzs_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtzs_v2d_v2d ¶
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emit_fcvtzs_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtzs_v2s_v2s ¶
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emit_fcvtzs_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtzs_v4h_v4h ¶
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emit_fcvtzs_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtzs_v4s_v4s ¶
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emit_fcvtzs_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtzs_v8h_v8h ¶
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emit_fcvtzs_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtzu ¶
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emit_fcvtzu :: emit_fcvtzu_r_r

emit_fcvtzu_r_r ¶
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emit_fcvtzu_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtzu_v2d_v2d ¶
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emit_fcvtzu_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtzu_v2s_v2s ¶
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emit_fcvtzu_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtzu_v4h_v4h ¶
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emit_fcvtzu_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtzu_v4s_v4s ¶
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emit_fcvtzu_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fcvtzu_v8h_v8h ¶
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emit_fcvtzu_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fdiv_r_r_r ¶
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emit_fdiv_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_fdiv

emit_fdiv_v2d_v2d_v2d ¶
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emit_fdiv_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fdiv_v2s_v2s_v2s ¶
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emit_fdiv_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fdiv_v4s_v4s_v4s ¶
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emit_fdiv_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fdiv_zd_p_zd_zd ¶
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emit_fdiv_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fdiv_zh_p_zh_zh ¶
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emit_fdiv_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_fdiv

emit_fdiv_zs_p_zs_zs ¶
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emit_fdiv_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fdivr ¶
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emit_fdivr :: emit_fdivr_zh_p_zh_zh

emit_fdivr_zd_p_zd_zd ¶
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emit_fdivr_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fdivr_zh_p_zh_zh ¶
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emit_fdivr_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fdivr_zs_p_zs_zs ¶
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emit_fdivr_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fmadd ¶
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emit_fmadd :: emit_fmadd_r_r_r_r

emit_fmadd_r_r_r_r ¶
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emit_fmadd_r_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) {…}

emit_fmax_r_r_r ¶
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emit_fmax_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_fmax

emit_fmax_v2d_v2d_v2d ¶
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emit_fmax_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmax_v2s_v2s_v2s ¶
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emit_fmax_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmax_v4h_v4h_v4h ¶
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emit_fmax_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmax_v4s_v4s_v4s ¶
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emit_fmax_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmax_v8h_v8h_v8h ¶
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emit_fmax_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmax_zd_p_zd_zd ¶
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emit_fmax_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fmax_zh_p_zh_zh ¶
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emit_fmax_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_fmax

emit_fmax_zs_p_zs_zs ¶
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emit_fmax_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fmaxnm_r_r_r ¶
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emit_fmaxnm_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_fmaxnm

emit_fmaxnm_v2d_v2d_v2d ¶
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emit_fmaxnm_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmaxnm_v2s_v2s_v2s ¶
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emit_fmaxnm_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmaxnm_v4h_v4h_v4h ¶
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emit_fmaxnm_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmaxnm_v4s_v4s_v4s ¶
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emit_fmaxnm_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmaxnm_v8h_v8h_v8h ¶
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emit_fmaxnm_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmaxnm_zd_p_zd_zd ¶
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emit_fmaxnm_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fmaxnm_zh_p_zh_zh ¶
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emit_fmaxnm_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_fmaxnm

emit_fmaxnm_zs_p_zs_zs ¶
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emit_fmaxnm_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fmaxnmp ¶
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emit_fmaxnmp :: emit_fmaxnmp_v2s_v2s_v2s

emit_fmaxnmp_v2d_v2d_v2d ¶
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emit_fmaxnmp_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmaxnmp_v2s_v2s_v2s ¶
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emit_fmaxnmp_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmaxnmp_v4h_v4h_v4h ¶
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emit_fmaxnmp_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmaxnmp_v4s_v4s_v4s ¶
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emit_fmaxnmp_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmaxnmp_v8h_v8h_v8h ¶
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emit_fmaxnmp_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmaxnmv ¶
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emit_fmaxnmv :: emit_fmaxnmv_r_v4s

emit_fmaxnmv_r_v4h ¶
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emit_fmaxnmv_r_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fmaxnmv_r_v4s ¶
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emit_fmaxnmv_r_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fmaxnmv_r_v8h ¶
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emit_fmaxnmv_r_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fmaxp ¶
Source

emit_fmaxp :: emit_fmaxp_v2s_v2s_v2s

emit_fmaxp_v2d_v2d_v2d ¶
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emit_fmaxp_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmaxp_v2s_v2s_v2s ¶
Source

emit_fmaxp_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmaxp_v4h_v4h_v4h ¶
Source

emit_fmaxp_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmaxp_v4s_v4s_v4s ¶
Source

emit_fmaxp_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmaxp_v8h_v8h_v8h ¶
Source

emit_fmaxp_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmaxv ¶
Source

emit_fmaxv :: emit_fmaxv_r_v4s

emit_fmaxv_r_v4h ¶
Source

emit_fmaxv_r_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fmaxv_r_v4s ¶
Source

emit_fmaxv_r_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fmaxv_r_v8h ¶
Source

emit_fmaxv_r_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fmin_r_r_r ¶
Source

emit_fmin_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_fmin

emit_fmin_v2d_v2d_v2d ¶
Source

emit_fmin_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmin_v2s_v2s_v2s ¶
Source

emit_fmin_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmin_v4h_v4h_v4h ¶
Source

emit_fmin_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmin_v4s_v4s_v4s ¶
Source

emit_fmin_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmin_v8h_v8h_v8h ¶
Source

emit_fmin_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmin_zd_p_zd_zd ¶
Source

emit_fmin_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fmin_zh_p_zh_zh ¶
Source

emit_fmin_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_fmin

emit_fmin_zs_p_zs_zs ¶
Source

emit_fmin_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fminnm_r_r_r ¶
Source

emit_fminnm_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_fminnm

emit_fminnm_v2d_v2d_v2d ¶
Source

emit_fminnm_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fminnm_v2s_v2s_v2s ¶
Source

emit_fminnm_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fminnm_v4h_v4h_v4h ¶
Source

emit_fminnm_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fminnm_v4s_v4s_v4s ¶
Source

emit_fminnm_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fminnm_v8h_v8h_v8h ¶
Source

emit_fminnm_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fminnm_zd_p_zd_zd ¶
Source

emit_fminnm_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fminnm_zh_p_zh_zh ¶
Source

emit_fminnm_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_fminnm

emit_fminnm_zs_p_zs_zs ¶
Source

emit_fminnm_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fminnmp ¶
Source

emit_fminnmp :: emit_fminnmp_v2s_v2s_v2s

emit_fminnmp_v2d_v2d_v2d ¶
Source

emit_fminnmp_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fminnmp_v2s_v2s_v2s ¶
Source

emit_fminnmp_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fminnmp_v4h_v4h_v4h ¶
Source

emit_fminnmp_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fminnmp_v4s_v4s_v4s ¶
Source

emit_fminnmp_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fminnmp_v8h_v8h_v8h ¶
Source

emit_fminnmp_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fminnmv ¶
Source

emit_fminnmv :: emit_fminnmv_r_v4s

emit_fminnmv_r_v4h ¶
Source

emit_fminnmv_r_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fminnmv_r_v4s ¶
Source

emit_fminnmv_r_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fminnmv_r_v8h ¶
Source

emit_fminnmv_r_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fminp ¶
Source

emit_fminp :: emit_fminp_v2s_v2s_v2s

emit_fminp_v2d_v2d_v2d ¶
Source

emit_fminp_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fminp_v2s_v2s_v2s ¶
Source

emit_fminp_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fminp_v4h_v4h_v4h ¶
Source

emit_fminp_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fminp_v4s_v4s_v4s ¶
Source

emit_fminp_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fminp_v8h_v8h_v8h ¶
Source

emit_fminp_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fminv ¶
Source

emit_fminv :: emit_fminv_r_v4s

emit_fminv_r_v4h ¶
Source

emit_fminv_r_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fminv_r_v4s ¶
Source

emit_fminv_r_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fminv_r_v8h ¶
Source

emit_fminv_r_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fmla_v2d_v2d_v2d ¶
Source

emit_fmla_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmla_v4s_v4s_v4s ¶
Source

emit_fmla_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_fmla

emit_fmla_zd_p_zd_zd ¶
Source

emit_fmla_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fmla_zd_zd_zd_i ¶
Source

emit_fmla_zd_zd_zd_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) {…}

emit_fmla_zh_p_zh_zh ¶
Source

emit_fmla_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_fmla

emit_fmla_zh_zh_zh_i ¶
Source

emit_fmla_zh_zh_zh_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) {…}

Related Procedure Groups

emit_fmla

emit_fmla_zs_p_zs_zs ¶
Source

emit_fmla_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fmla_zs_zs_zs_i ¶
Source

emit_fmla_zs_zs_zs_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) {…}

emit_fmls_v2d_v2d_v2d ¶
Source

emit_fmls_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmls_v4s_v4s_v4s ¶
Source

emit_fmls_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_fmls

emit_fmls_zd_p_zd_zd ¶
Source

emit_fmls_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fmls_zd_zd_zd_i ¶
Source

emit_fmls_zd_zd_zd_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) {…}

emit_fmls_zh_p_zh_zh ¶
Source

emit_fmls_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_fmls

emit_fmls_zh_zh_zh_i ¶
Source

emit_fmls_zh_zh_zh_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) {…}

Related Procedure Groups

emit_fmls

emit_fmls_zs_p_zs_zs ¶
Source

emit_fmls_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fmls_zs_zs_zs_i ¶
Source

emit_fmls_zs_zs_zs_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) {…}

emit_fmopa ¶
Source

emit_fmopa :: emit_fmopa_i_p_p_zs_zs

emit_fmopa_i_p_p_zs_zs ¶
Source

emit_fmopa_i_p_p_zs_zs :: proc(
	instructions: ^[dynamic]Instruction, 
	imm:          i64, 
	rz1:          u8, 
	rz2:          u8, 
	rz3:          u8, 
	rz4:          u8, 
) {…}

emit_fmops ¶
Source

emit_fmops :: emit_fmops_i_p_p_zs_zs

emit_fmops_i_p_p_zs_zs ¶
Source

emit_fmops_i_p_p_zs_zs :: proc(
	instructions: ^[dynamic]Instruction, 
	imm:          i64, 
	rz1:          u8, 
	rz2:          u8, 
	rz3:          u8, 
	rz4:          u8, 
) {…}

emit_fmov_r_i ¶
Source

emit_fmov_r_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) {…}

Related Procedure Groups

emit_fmov

emit_fmov_r_r ¶
Source

emit_fmov_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_fmov

emit_fmov_v2d_i ¶
Source

emit_fmov_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) {…}

emit_fmov_v2s_i ¶
Source

emit_fmov_v2s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) {…}

emit_fmov_v4h_i ¶
Source

emit_fmov_v4h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) {…}

emit_fmov_v4s_i ¶
Source

emit_fmov_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) {…}

emit_fmov_v8h_i ¶
Source

emit_fmov_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) {…}

emit_fmsub ¶
Source

emit_fmsub :: emit_fmsub_r_r_r_r

emit_fmsub_r_r_r_r ¶
Source

emit_fmsub_r_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) {…}

emit_fmul_r_r_r ¶
Source

emit_fmul_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_fmul

emit_fmul_v2d_v2d_v2d ¶
Source

emit_fmul_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmul_v2s_v2s_v2s ¶
Source

emit_fmul_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmul_v4s_v4s_v4s ¶
Source

emit_fmul_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmul_zd_p_zd_zd ¶
Source

emit_fmul_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fmul_zd_zd_zd ¶
Source

emit_fmul_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_fmul_zh_p_zh_zh ¶
Source

emit_fmul_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_fmul

emit_fmul_zh_zh_zh ¶
Source

emit_fmul_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_fmul

emit_fmul_zs_p_zs_zs ¶
Source

emit_fmul_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fmul_zs_zs_zs ¶
Source

emit_fmul_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_fmulx ¶
Source

emit_fmulx :: emit_fmulx_v2s_v2s_v2s

emit_fmulx_v2d_v2d_v2d ¶
Source

emit_fmulx_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmulx_v2s_v2s_v2s ¶
Source

emit_fmulx_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmulx_v4h_v4h_v4h ¶
Source

emit_fmulx_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmulx_v4s_v4s_v4s ¶
Source

emit_fmulx_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fmulx_v8h_v8h_v8h ¶
Source

emit_fmulx_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fneg_r_r ¶
Source

emit_fneg_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_fneg

emit_fneg_v2d_v2d ¶
Source

emit_fneg_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fneg_v2s_v2s ¶
Source

emit_fneg_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fneg_v4h_v4h ¶
Source

emit_fneg_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fneg_v4s_v4s ¶
Source

emit_fneg_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fneg_v8h_v8h ¶
Source

emit_fneg_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fneg_zd_p_zd ¶
Source

emit_fneg_zd_p_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_fneg_zh_p_zh ¶
Source

emit_fneg_zh_p_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_fneg

emit_fneg_zs_p_zs ¶
Source

emit_fneg_zs_p_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_fnmadd ¶
Source

emit_fnmadd :: emit_fnmadd_r_r_r_r

emit_fnmadd_r_r_r_r ¶
Source

emit_fnmadd_r_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) {…}

emit_fnmla ¶
Source

emit_fnmla :: emit_fnmla_zh_p_zh_zh

emit_fnmla_zd_p_zd_zd ¶
Source

emit_fnmla_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fnmla_zh_p_zh_zh ¶
Source

emit_fnmla_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fnmla_zs_p_zs_zs ¶
Source

emit_fnmla_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fnmls ¶
Source

emit_fnmls :: emit_fnmls_zh_p_zh_zh

emit_fnmls_zd_p_zd_zd ¶
Source

emit_fnmls_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fnmls_zh_p_zh_zh ¶
Source

emit_fnmls_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fnmls_zs_p_zs_zs ¶
Source

emit_fnmls_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fnmsub ¶
Source

emit_fnmsub :: emit_fnmsub_r_r_r_r

emit_fnmsub_r_r_r_r ¶
Source

emit_fnmsub_r_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) {…}

emit_fnmul ¶
Source

emit_fnmul :: emit_fnmul_r_r_r

emit_fnmul_r_r_r ¶
Source

emit_fnmul_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_frecpe ¶
Source

emit_frecpe :: emit_frecpe_v2s_v2s

emit_frecpe_v2d_v2d ¶
Source

emit_frecpe_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frecpe_v2s_v2s ¶
Source

emit_frecpe_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frecpe_v4h_v4h ¶
Source

emit_frecpe_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frecpe_v4s_v4s ¶
Source

emit_frecpe_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frecpe_v8h_v8h ¶
Source

emit_frecpe_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frecps_v2d_v2d_v2d ¶
Source

emit_frecps_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_frecps_v2s_v2s_v2s ¶
Source

emit_frecps_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_frecps

emit_frecps_v4h_v4h_v4h ¶
Source

emit_frecps_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_frecps_v4s_v4s_v4s ¶
Source

emit_frecps_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_frecps_v8h_v8h_v8h ¶
Source

emit_frecps_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_frecps_zd_zd_zd ¶
Source

emit_frecps_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_frecps_zh_zh_zh ¶
Source

emit_frecps_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_frecps

emit_frecps_zs_zs_zs ¶
Source

emit_frecps_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_frecpx_r_r ¶
Source

emit_frecpx_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_frecpx

emit_frecpx_zd_p_zd ¶
Source

emit_frecpx_zd_p_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_frecpx_zh_p_zh ¶
Source

emit_frecpx_zh_p_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_frecpx

emit_frecpx_zs_p_zs ¶
Source

emit_frecpx_zs_p_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_frinta_r_r ¶
Source

emit_frinta_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_frinta

emit_frinta_v2d_v2d ¶
Source

emit_frinta_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frinta_v2s_v2s ¶
Source

emit_frinta_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frinta_v4h_v4h ¶
Source

emit_frinta_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frinta_v4s_v4s ¶
Source

emit_frinta_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frinta_v8h_v8h ¶
Source

emit_frinta_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frinta_zd_p_zd ¶
Source

emit_frinta_zd_p_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_frinta_zh_p_zh ¶
Source

emit_frinta_zh_p_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_frinta

emit_frinta_zs_p_zs ¶
Source

emit_frinta_zs_p_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_frinti_r_r ¶
Source

emit_frinti_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_frinti

emit_frinti_v2d_v2d ¶
Source

emit_frinti_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frinti_v2s_v2s ¶
Source

emit_frinti_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frinti_v4h_v4h ¶
Source

emit_frinti_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frinti_v4s_v4s ¶
Source

emit_frinti_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frinti_v8h_v8h ¶
Source

emit_frinti_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frinti_zd_p_zd ¶
Source

emit_frinti_zd_p_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_frinti_zh_p_zh ¶
Source

emit_frinti_zh_p_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_frinti

emit_frinti_zs_p_zs ¶
Source

emit_frinti_zs_p_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_frintm_r_r ¶
Source

emit_frintm_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_frintm

emit_frintm_v2d_v2d ¶
Source

emit_frintm_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintm_v2s_v2s ¶
Source

emit_frintm_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintm_v4h_v4h ¶
Source

emit_frintm_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintm_v4s_v4s ¶
Source

emit_frintm_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintm_v8h_v8h ¶
Source

emit_frintm_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintm_zd_p_zd ¶
Source

emit_frintm_zd_p_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_frintm_zh_p_zh ¶
Source

emit_frintm_zh_p_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_frintm

emit_frintm_zs_p_zs ¶
Source

emit_frintm_zs_p_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_frintn_r_r ¶
Source

emit_frintn_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_frintn

emit_frintn_v2d_v2d ¶
Source

emit_frintn_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintn_v2s_v2s ¶
Source

emit_frintn_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintn_v4h_v4h ¶
Source

emit_frintn_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintn_v4s_v4s ¶
Source

emit_frintn_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintn_v8h_v8h ¶
Source

emit_frintn_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintn_zd_p_zd ¶
Source

emit_frintn_zd_p_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_frintn_zh_p_zh ¶
Source

emit_frintn_zh_p_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_frintn

emit_frintn_zs_p_zs ¶
Source

emit_frintn_zs_p_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_frintp_r_r ¶
Source

emit_frintp_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_frintp

emit_frintp_v2d_v2d ¶
Source

emit_frintp_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintp_v2s_v2s ¶
Source

emit_frintp_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintp_v4h_v4h ¶
Source

emit_frintp_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintp_v4s_v4s ¶
Source

emit_frintp_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintp_v8h_v8h ¶
Source

emit_frintp_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintp_zd_p_zd ¶
Source

emit_frintp_zd_p_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_frintp_zh_p_zh ¶
Source

emit_frintp_zh_p_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_frintp

emit_frintp_zs_p_zs ¶
Source

emit_frintp_zs_p_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_frintx_r_r ¶
Source

emit_frintx_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_frintx

emit_frintx_v2d_v2d ¶
Source

emit_frintx_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintx_v2s_v2s ¶
Source

emit_frintx_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintx_v4h_v4h ¶
Source

emit_frintx_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintx_v4s_v4s ¶
Source

emit_frintx_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintx_v8h_v8h ¶
Source

emit_frintx_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintx_zd_p_zd ¶
Source

emit_frintx_zd_p_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_frintx_zh_p_zh ¶
Source

emit_frintx_zh_p_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_frintx

emit_frintx_zs_p_zs ¶
Source

emit_frintx_zs_p_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_frintz_r_r ¶
Source

emit_frintz_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_frintz

emit_frintz_v2d_v2d ¶
Source

emit_frintz_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintz_v2s_v2s ¶
Source

emit_frintz_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintz_v4h_v4h ¶
Source

emit_frintz_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintz_v4s_v4s ¶
Source

emit_frintz_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintz_v8h_v8h ¶
Source

emit_frintz_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frintz_zd_p_zd ¶
Source

emit_frintz_zd_p_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_frintz_zh_p_zh ¶
Source

emit_frintz_zh_p_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_frintz

emit_frintz_zs_p_zs ¶
Source

emit_frintz_zs_p_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_frsqrte ¶
Source

emit_frsqrte :: emit_frsqrte_v2s_v2s

emit_frsqrte_v2d_v2d ¶
Source

emit_frsqrte_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frsqrte_v2s_v2s ¶
Source

emit_frsqrte_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frsqrte_v4h_v4h ¶
Source

emit_frsqrte_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frsqrte_v4s_v4s ¶
Source

emit_frsqrte_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frsqrte_v8h_v8h ¶
Source

emit_frsqrte_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_frsqrts_v2d_v2d_v2d ¶
Source

emit_frsqrts_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_frsqrts_v2s_v2s_v2s ¶
Source

emit_frsqrts_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_frsqrts

emit_frsqrts_v4h_v4h_v4h ¶
Source

emit_frsqrts_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_frsqrts_v4s_v4s_v4s ¶
Source

emit_frsqrts_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_frsqrts_v8h_v8h_v8h ¶
Source

emit_frsqrts_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_frsqrts_zd_zd_zd ¶
Source

emit_frsqrts_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_frsqrts_zh_zh_zh ¶
Source

emit_frsqrts_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_frsqrts

emit_frsqrts_zs_zs_zs ¶
Source

emit_frsqrts_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_fsqrt_r_r ¶
Source

emit_fsqrt_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_fsqrt

emit_fsqrt_v2d_v2d ¶
Source

emit_fsqrt_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fsqrt_v2s_v2s ¶
Source

emit_fsqrt_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fsqrt_v4h_v4h ¶
Source

emit_fsqrt_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fsqrt_v4s_v4s ¶
Source

emit_fsqrt_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fsqrt_v8h_v8h ¶
Source

emit_fsqrt_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_fsqrt_zd_p_zd ¶
Source

emit_fsqrt_zd_p_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_fsqrt_zh_p_zh ¶
Source

emit_fsqrt_zh_p_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_fsqrt

emit_fsqrt_zs_p_zs ¶
Source

emit_fsqrt_zs_p_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_fsub_r_r_r ¶
Source

emit_fsub_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_fsub

emit_fsub_v2d_v2d_v2d ¶
Source

emit_fsub_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fsub_v2s_v2s_v2s ¶
Source

emit_fsub_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fsub_v4s_v4s_v4s ¶
Source

emit_fsub_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_fsub_zd_p_zd_zd ¶
Source

emit_fsub_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fsub_zd_zd_zd ¶
Source

emit_fsub_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_fsub_zh_p_zh_zh ¶
Source

emit_fsub_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_fsub

emit_fsub_zh_zh_zh ¶
Source

emit_fsub_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_fsub

emit_fsub_zs_p_zs_zs ¶
Source

emit_fsub_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fsub_zs_zs_zs ¶
Source

emit_fsub_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_fsubr ¶
Source

emit_fsubr :: emit_fsubr_zh_p_zh_zh

emit_fsubr_zd_p_zd_zd ¶
Source

emit_fsubr_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fsubr_zh_p_zh_zh ¶
Source

emit_fsubr_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_fsubr_zs_p_zs_zs ¶
Source

emit_fsubr_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_ftsmul ¶
Source

emit_ftsmul :: emit_ftsmul_zh_zh_zh

emit_ftsmul_zd_zd_zd ¶
Source

emit_ftsmul_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_ftsmul_zh_zh_zh ¶
Source

emit_ftsmul_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_ftsmul_zs_zs_zs ¶
Source

emit_ftsmul_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_gmi ¶
Source

emit_gmi :: emit_gmi_r_r_r

emit_gmi_r_r_r ¶
Source

emit_gmi_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_hint ¶
Source

emit_hint :: emit_hint_i

emit_hint_i ¶
Source

emit_hint_i :: proc(instructions: ^[dynamic]Instruction, imm: i64) {…}

emit_histcnt ¶
Source

emit_histcnt :: emit_histcnt_zs_p_zs_zs

emit_histcnt_zd_p_zd_zd ¶
Source

emit_histcnt_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_histcnt_zs_p_zs_zs ¶
Source

emit_histcnt_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_histseg ¶
Source

emit_histseg :: emit_histseg_zb_zb_zb

emit_histseg_zb_zb_zb ¶
Source

emit_histseg_zb_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_hlt ¶
Source

emit_hlt :: emit_hlt_i

emit_hlt_i ¶
Source

emit_hlt_i :: proc(instructions: ^[dynamic]Instruction, imm: i64) {…}

emit_hvc ¶
Source

emit_hvc :: emit_hvc_i

emit_hvc_i ¶
Source

emit_hvc_i :: proc(instructions: ^[dynamic]Instruction, imm: i64) {…}

emit_ic_iallu ¶
Source

emit_ic_iallu :: emit_ic_iallu_none

emit_ic_iallu_none ¶
Source

emit_ic_iallu_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_ic_ialluis ¶
Source

emit_ic_ialluis :: emit_ic_ialluis_none

emit_ic_ialluis_none ¶
Source

emit_ic_ialluis_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_ic_ivau ¶
Source

emit_ic_ivau :: emit_ic_ivau_r

emit_ic_ivau_r ¶
Source

emit_ic_ivau_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_incb ¶
Source

emit_incb :: emit_incb_r_i_i

emit_incb_r_i_i ¶
Source

emit_incb_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

emit_incd_r_i_i ¶
Source

emit_incd_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_incd

emit_incd_zd_i_i ¶
Source

emit_incd_zd_i_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_incd

emit_inch_r_i_i ¶
Source

emit_inch_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_inch

emit_inch_zh_i_i ¶
Source

emit_inch_zh_i_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_inch

emit_incp_r_pb ¶
Source

emit_incp_r_pb :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

Related Procedure Groups

emit_incp

emit_incp_r_pd ¶
Source

emit_incp_r_pd :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

emit_incp_r_ph ¶
Source

emit_incp_r_ph :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

emit_incp_r_ps ¶
Source

emit_incp_r_ps :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

emit_incp_zd_pd ¶
Source

emit_incp_zd_pd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

emit_incp_zh_ph ¶
Source

emit_incp_zh_ph :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

Related Procedure Groups

emit_incp

emit_incp_zs_ps ¶
Source

emit_incp_zs_ps :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

emit_incw_r_i_i ¶
Source

emit_incw_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_incw

emit_incw_zs_i_i ¶
Source

emit_incw_zs_i_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_incw

emit_index_zb_i_i ¶
Source

emit_index_zb_i_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_index

emit_index_zb_i_r ¶
Source

emit_index_zb_i_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, src: Register) {…}

Related Procedure Groups

emit_index

emit_index_zb_r_i ¶
Source

emit_index_zb_r_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, imm: i64) {…}

Related Procedure Groups

emit_index

emit_index_zb_r_r ¶
Source

emit_index_zb_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

Related Procedure Groups

emit_index

emit_index_zd_i_i ¶
Source

emit_index_zd_i_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) {…}

emit_index_zd_i_r ¶
Source

emit_index_zd_i_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, src: Register) {…}

emit_index_zd_r_i ¶
Source

emit_index_zd_r_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, imm: i64) {…}

emit_index_zd_r_r ¶
Source

emit_index_zd_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_index_zh_i_i ¶
Source

emit_index_zh_i_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) {…}

emit_index_zh_i_r ¶
Source

emit_index_zh_i_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, src: Register) {…}

emit_index_zh_r_i ¶
Source

emit_index_zh_r_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, imm: i64) {…}

emit_index_zh_r_r ¶
Source

emit_index_zh_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_index_zs_i_i ¶
Source

emit_index_zs_i_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) {…}

emit_index_zs_i_r ¶
Source

emit_index_zs_i_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, src: Register) {…}

emit_index_zs_r_i ¶
Source

emit_index_zs_r_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, imm: i64) {…}

emit_index_zs_r_r ¶
Source

emit_index_zs_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_ins_veb_i_r ¶
Source

emit_ins_veb_i_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register) {…}

Related Procedure Groups

emit_ins

emit_ins_veb_i_veb_i ¶
Source

emit_ins_veb_i_veb_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, imm2: i64) {…}

Related Procedure Groups

emit_ins

emit_ins_ved_i_r ¶
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emit_ins_ved_i_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register) {…}

emit_ins_ved_i_ved_i ¶
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emit_ins_ved_i_ved_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, imm2: i64) {…}

emit_ins_veh_i_r ¶
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emit_ins_veh_i_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register) {…}

emit_ins_veh_i_veh_i ¶
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emit_ins_veh_i_veh_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, imm2: i64) {…}

emit_ins_ves_i_r ¶
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emit_ins_ves_i_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register) {…}

emit_ins_ves_i_ves_i ¶
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emit_ins_ves_i_ves_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, src: Register, imm2: i64) {…}

emit_insr ¶
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emit_insr :: emit_insr_zb_r

emit_insr_zb_r ¶
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emit_insr_zb_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) {…}

emit_insr_zd_r ¶
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emit_insr_zd_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) {…}

emit_insr_zh_r ¶
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emit_insr_zh_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) {…}

emit_insr_zs_r ¶
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emit_insr_zs_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register) {…}

emit_irg ¶
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emit_irg :: emit_irg_r_r_r

emit_irg_r_r_r ¶
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emit_irg_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_isb ¶
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emit_isb :: emit_isb_i

emit_isb_i ¶
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emit_isb_i :: proc(instructions: ^[dynamic]Instruction, imm: i64) {…}

emit_ld1_v16b_m ¶
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emit_ld1_v16b_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

Related Procedure Groups

emit_ld1

emit_ld1_v2d_m ¶
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emit_ld1_v2d_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ld1_v4s_m ¶
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emit_ld1_v4s_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ld1_v8h_m ¶
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emit_ld1_v8h_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ld1_veb_i_m ¶
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emit_ld1_veb_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

Related Procedure Groups

emit_ld1

emit_ld1_ved_i_m ¶
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emit_ld1_ved_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_ld1_veh_i_m ¶
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emit_ld1_veh_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_ld1_ves_i_m ¶
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emit_ld1_ves_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_ld1b_i_p_m ¶
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emit_ld1b_i_p_m :: proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) {…}

Related Procedure Groups

emit_ld1b

emit_ld1b_zb_p_m ¶
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emit_ld1b_zb_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

Related Procedure Groups

emit_ld1b

emit_ld1b_zd_p_m ¶
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emit_ld1b_zd_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ld1b_zpb_pnz_m ¶
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emit_ld1b_zpb_pnz_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ld1b_zqb_pnz_m ¶
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emit_ld1b_zqb_pnz_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ld1b_zs_p_m ¶
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emit_ld1b_zs_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ld1d_i_p_m ¶
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emit_ld1d_i_p_m :: proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) {…}

Related Procedure Groups

emit_ld1d

emit_ld1d_zd_p_m ¶
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emit_ld1d_zd_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

Related Procedure Groups

emit_ld1d

emit_ld1d_zpd_pnz_m ¶
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emit_ld1d_zpd_pnz_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ld1d_zqd_pnz_m ¶
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emit_ld1d_zqd_pnz_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ld1h_i_p_m ¶
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emit_ld1h_i_p_m :: proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) {…}

Related Procedure Groups

emit_ld1h

emit_ld1h_zd_p_m ¶
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emit_ld1h_zd_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ld1h_zh_p_m ¶
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emit_ld1h_zh_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

Related Procedure Groups

emit_ld1h

emit_ld1h_zph_pnz_m ¶
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emit_ld1h_zph_pnz_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ld1h_zqh_pnz_m ¶
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emit_ld1h_zqh_pnz_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ld1h_zs_p_m ¶
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emit_ld1h_zs_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ld1q ¶
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emit_ld1q :: emit_ld1q_i_p_m

emit_ld1q_i_p_m ¶
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emit_ld1q_i_p_m :: proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) {…}

emit_ld1r ¶
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emit_ld1r :: emit_ld1r_v16b_m

emit_ld1r_v16b_m ¶
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emit_ld1r_v16b_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ld1sb ¶
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emit_ld1sb :: emit_ld1sb_zh_p_m

emit_ld1sb_zd_p_m ¶
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emit_ld1sb_zd_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ld1sb_zh_p_m ¶
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emit_ld1sb_zh_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ld1sb_zs_p_m ¶
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emit_ld1sb_zs_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ld1sh ¶
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emit_ld1sh :: emit_ld1sh_zd_p_m

emit_ld1sh_zd_p_m ¶
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emit_ld1sh_zd_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ld1sh_zs_p_m ¶
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emit_ld1sh_zs_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ld1sw ¶
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emit_ld1sw :: emit_ld1sw_zd_p_m

emit_ld1sw_zd_p_m ¶
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emit_ld1sw_zd_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ld1w_i_p_m ¶
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emit_ld1w_i_p_m :: proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) {…}

Related Procedure Groups

emit_ld1w

emit_ld1w_zd_p_m ¶
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emit_ld1w_zd_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ld1w_zps_pnz_m ¶
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emit_ld1w_zps_pnz_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ld1w_zqs_pnz_m ¶
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emit_ld1w_zqs_pnz_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ld1w_zs_p_m ¶
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emit_ld1w_zs_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

Related Procedure Groups

emit_ld1w

emit_ld2_v16b_m ¶
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emit_ld2_v16b_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

Related Procedure Groups

emit_ld2

emit_ld2_veb_i_m ¶
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emit_ld2_veb_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

Related Procedure Groups

emit_ld2

emit_ld2_ved_i_m ¶
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emit_ld2_ved_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_ld2_veh_i_m ¶
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emit_ld2_veh_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_ld2_ves_i_m ¶
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emit_ld2_ves_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_ld2r ¶
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emit_ld2r :: emit_ld2r_v16b_m

emit_ld2r_v16b_m ¶
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emit_ld2r_v16b_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ld3_v16b_m ¶
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emit_ld3_v16b_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

Related Procedure Groups

emit_ld3

emit_ld3_veb_i_m ¶
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emit_ld3_veb_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

Related Procedure Groups

emit_ld3

emit_ld3_ved_i_m ¶
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emit_ld3_ved_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_ld3_veh_i_m ¶
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emit_ld3_veh_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_ld3_ves_i_m ¶
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emit_ld3_ves_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_ld3r ¶
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emit_ld3r :: emit_ld3r_v16b_m

emit_ld3r_v16b_m ¶
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emit_ld3r_v16b_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ld4_v16b_m ¶
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emit_ld4_v16b_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

Related Procedure Groups

emit_ld4

emit_ld4_veb_i_m ¶
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emit_ld4_veb_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

Related Procedure Groups

emit_ld4

emit_ld4_ved_i_m ¶
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emit_ld4_ved_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_ld4_veh_i_m ¶
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emit_ld4_veh_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_ld4_ves_i_m ¶
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emit_ld4_ves_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_ld4r ¶
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emit_ld4r :: emit_ld4r_v16b_m

emit_ld4r_v16b_m ¶
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emit_ld4r_v16b_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldadd ¶
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emit_ldadd :: emit_ldadd_r_r_m

emit_ldadd_r_r_m ¶
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emit_ldadd_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldadda ¶
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emit_ldadda :: emit_ldadda_r_r_m

emit_ldadda_r_r_m ¶
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emit_ldadda_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldaddal ¶
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emit_ldaddal :: emit_ldaddal_r_r_m

emit_ldaddal_r_r_m ¶
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emit_ldaddal_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldaddl ¶
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emit_ldaddl :: emit_ldaddl_r_r_m

emit_ldaddl_r_r_m ¶
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emit_ldaddl_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldapr ¶
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emit_ldapr :: emit_ldapr_r_m

emit_ldapr_r_m ¶
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emit_ldapr_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldaprb ¶
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emit_ldaprb :: emit_ldaprb_r_m

emit_ldaprb_r_m ¶
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emit_ldaprb_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldaprh ¶
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emit_ldaprh :: emit_ldaprh_r_m

emit_ldaprh_r_m ¶
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emit_ldaprh_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldapur ¶
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emit_ldapur :: emit_ldapur_r_m

emit_ldapur_r_m ¶
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emit_ldapur_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldapurb ¶
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emit_ldapurb :: emit_ldapurb_r_m

emit_ldapurb_r_m ¶
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emit_ldapurb_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldapurh ¶
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emit_ldapurh :: emit_ldapurh_r_m

emit_ldapurh_r_m ¶
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emit_ldapurh_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldapursb ¶
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emit_ldapursb :: emit_ldapursb_r_m

emit_ldapursb_r_m ¶
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emit_ldapursb_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldapursh ¶
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emit_ldapursh :: emit_ldapursh_r_m

emit_ldapursh_r_m ¶
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emit_ldapursh_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldapursw ¶
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emit_ldapursw :: emit_ldapursw_r_m

emit_ldapursw_r_m ¶
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emit_ldapursw_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldar ¶
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emit_ldar :: emit_ldar_r_m

emit_ldar_r_m ¶
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emit_ldar_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldarb ¶
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emit_ldarb :: emit_ldarb_r_m

emit_ldarb_r_m ¶
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emit_ldarb_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldarh ¶
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emit_ldarh :: emit_ldarh_r_m

emit_ldarh_r_m ¶
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emit_ldarh_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldaxp ¶
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emit_ldaxp :: emit_ldaxp_r_r_m

emit_ldaxp_r_r_m ¶
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emit_ldaxp_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldaxr ¶
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emit_ldaxr :: emit_ldaxr_r_m

emit_ldaxr_r_m ¶
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emit_ldaxr_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldaxrb ¶
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emit_ldaxrb :: emit_ldaxrb_r_m

emit_ldaxrb_r_m ¶
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emit_ldaxrb_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldaxrh ¶
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emit_ldaxrh :: emit_ldaxrh_r_m

emit_ldaxrh_r_m ¶
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emit_ldaxrh_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldclr ¶
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emit_ldclr :: emit_ldclr_r_r_m

emit_ldclr_r_r_m ¶
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emit_ldclr_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldclra ¶
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emit_ldclra :: emit_ldclra_r_r_m

emit_ldclra_r_r_m ¶
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emit_ldclra_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldclral ¶
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emit_ldclral :: emit_ldclral_r_r_m

emit_ldclral_r_r_m ¶
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emit_ldclral_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldclrl ¶
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emit_ldclrl :: emit_ldclrl_r_r_m

emit_ldclrl_r_r_m ¶
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emit_ldclrl_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldeor ¶
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emit_ldeor :: emit_ldeor_r_r_m

emit_ldeor_r_r_m ¶
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emit_ldeor_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldeora ¶
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emit_ldeora :: emit_ldeora_r_r_m

emit_ldeora_r_r_m ¶
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emit_ldeora_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldeoral ¶
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emit_ldeoral :: emit_ldeoral_r_r_m

emit_ldeoral_r_r_m ¶
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emit_ldeoral_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldeorl ¶
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emit_ldeorl :: emit_ldeorl_r_r_m

emit_ldeorl_r_r_m ¶
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emit_ldeorl_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldff1b ¶
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emit_ldff1b :: emit_ldff1b_zb_p_m

emit_ldff1b_zb_p_m ¶
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emit_ldff1b_zb_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ldff1d ¶
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emit_ldff1d :: emit_ldff1d_zd_p_m

emit_ldff1d_zd_p_m ¶
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emit_ldff1d_zd_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ldff1h ¶
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emit_ldff1h :: emit_ldff1h_zh_p_m

emit_ldff1h_zh_p_m ¶
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emit_ldff1h_zh_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ldff1w ¶
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emit_ldff1w :: emit_ldff1w_zs_p_m

emit_ldff1w_zs_p_m ¶
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emit_ldff1w_zs_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ldg ¶
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emit_ldg :: emit_ldg_r_m

emit_ldg_r_m ¶
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emit_ldg_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldgm ¶
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emit_ldgm :: emit_ldgm_r_m

emit_ldgm_r_m ¶
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emit_ldgm_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldnp ¶
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emit_ldnp :: emit_ldnp_r_r_m

emit_ldnp_r_r_m ¶
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emit_ldnp_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldnt1b ¶
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emit_ldnt1b :: emit_ldnt1b_zb_p_m

emit_ldnt1b_zb_p_m ¶
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emit_ldnt1b_zb_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ldnt1d ¶
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emit_ldnt1d :: emit_ldnt1d_zd_p_m

emit_ldnt1d_zd_p_m ¶
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emit_ldnt1d_zd_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ldnt1h ¶
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emit_ldnt1h :: emit_ldnt1h_zh_p_m

emit_ldnt1h_zh_p_m ¶
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emit_ldnt1h_zh_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ldnt1w ¶
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emit_ldnt1w :: emit_ldnt1w_zs_p_m

emit_ldnt1w_zs_p_m ¶
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emit_ldnt1w_zs_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_ldp ¶
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emit_ldp :: emit_ldp_r_r_m

emit_ldp_r_r_m ¶
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emit_ldp_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldpsw ¶
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emit_ldpsw :: emit_ldpsw_r_r_m

emit_ldpsw_r_r_m ¶
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emit_ldpsw_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldr_i_m ¶
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emit_ldr_i_m :: proc(instructions: ^[dynamic]Instruction, imm: i64, mem: Memory) {…}

Related Procedure Groups

emit_ldr

emit_ldr_p_m ¶
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emit_ldr_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, mem: Memory) {…}

emit_ldr_r_l ¶
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emit_ldr_r_l :: proc(instructions: ^[dynamic]Instruction, dst: Register, label: u32) {…}

Related Procedure Groups

emit_ldr

emit_ldr_r_m ¶
Source

emit_ldr_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

Related Procedure Groups

emit_ldr

emit_ldr_z_m ¶
Source

emit_ldr_z_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, mem: Memory) {…}

Related Procedure Groups

emit_ldr

emit_ldraa ¶
Source

emit_ldraa :: emit_ldraa_r_m

emit_ldraa_r_m ¶
Source

emit_ldraa_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldrab ¶
Source

emit_ldrab :: emit_ldrab_r_m

emit_ldrab_r_m ¶
Source

emit_ldrab_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldrb ¶
Source

emit_ldrb :: emit_ldrb_r_m

emit_ldrb_r_m ¶
Source

emit_ldrb_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldrh ¶
Source

emit_ldrh :: emit_ldrh_r_m

emit_ldrh_r_m ¶
Source

emit_ldrh_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldrsb ¶
Source

emit_ldrsb :: emit_ldrsb_r_m

emit_ldrsb_r_m ¶
Source

emit_ldrsb_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldrsh ¶
Source

emit_ldrsh :: emit_ldrsh_r_m

emit_ldrsh_r_m ¶
Source

emit_ldrsh_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldrsw ¶
Source

emit_ldrsw :: emit_ldrsw_r_m

emit_ldrsw_r_m ¶
Source

emit_ldrsw_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldset ¶
Source

emit_ldset :: emit_ldset_r_r_m

emit_ldset_r_r_m ¶
Source

emit_ldset_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldseta ¶
Source

emit_ldseta :: emit_ldseta_r_r_m

emit_ldseta_r_r_m ¶
Source

emit_ldseta_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldsetal ¶
Source

emit_ldsetal :: emit_ldsetal_r_r_m

emit_ldsetal_r_r_m ¶
Source

emit_ldsetal_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldsetl ¶
Source

emit_ldsetl :: emit_ldsetl_r_r_m

emit_ldsetl_r_r_m ¶
Source

emit_ldsetl_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldsmax ¶
Source

emit_ldsmax :: emit_ldsmax_r_r_m

emit_ldsmax_r_r_m ¶
Source

emit_ldsmax_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldsmaxa ¶
Source

emit_ldsmaxa :: emit_ldsmaxa_r_r_m

emit_ldsmaxa_r_r_m ¶
Source

emit_ldsmaxa_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldsmaxal ¶
Source

emit_ldsmaxal :: emit_ldsmaxal_r_r_m

emit_ldsmaxal_r_r_m ¶
Source

emit_ldsmaxal_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldsmaxl ¶
Source

emit_ldsmaxl :: emit_ldsmaxl_r_r_m

emit_ldsmaxl_r_r_m ¶
Source

emit_ldsmaxl_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldsmin ¶
Source

emit_ldsmin :: emit_ldsmin_r_r_m

emit_ldsmin_r_r_m ¶
Source

emit_ldsmin_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldsmina ¶
Source

emit_ldsmina :: emit_ldsmina_r_r_m

emit_ldsmina_r_r_m ¶
Source

emit_ldsmina_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldsminal ¶
Source

emit_ldsminal :: emit_ldsminal_r_r_m

emit_ldsminal_r_r_m ¶
Source

emit_ldsminal_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldsminl ¶
Source

emit_ldsminl :: emit_ldsminl_r_r_m

emit_ldsminl_r_r_m ¶
Source

emit_ldsminl_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldumax ¶
Source

emit_ldumax :: emit_ldumax_r_r_m

emit_ldumax_r_r_m ¶
Source

emit_ldumax_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldumaxa ¶
Source

emit_ldumaxa :: emit_ldumaxa_r_r_m

emit_ldumaxa_r_r_m ¶
Source

emit_ldumaxa_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldumaxal ¶
Source

emit_ldumaxal :: emit_ldumaxal_r_r_m

emit_ldumaxal_r_r_m ¶
Source

emit_ldumaxal_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldumaxl ¶
Source

emit_ldumaxl :: emit_ldumaxl_r_r_m

emit_ldumaxl_r_r_m ¶
Source

emit_ldumaxl_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldumin ¶
Source

emit_ldumin :: emit_ldumin_r_r_m

emit_ldumin_r_r_m ¶
Source

emit_ldumin_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldumina ¶
Source

emit_ldumina :: emit_ldumina_r_r_m

emit_ldumina_r_r_m ¶
Source

emit_ldumina_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_lduminal ¶
Source

emit_lduminal :: emit_lduminal_r_r_m

emit_lduminal_r_r_m ¶
Source

emit_lduminal_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_lduminl ¶
Source

emit_lduminl :: emit_lduminl_r_r_m

emit_lduminl_r_r_m ¶
Source

emit_lduminl_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldur ¶
Source

emit_ldur :: emit_ldur_r_m

emit_ldur_r_m ¶
Source

emit_ldur_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldurb ¶
Source

emit_ldurb :: emit_ldurb_r_m

emit_ldurb_r_m ¶
Source

emit_ldurb_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldurh ¶
Source

emit_ldurh :: emit_ldurh_r_m

emit_ldurh_r_m ¶
Source

emit_ldurh_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldursb ¶
Source

emit_ldursb :: emit_ldursb_r_m

emit_ldursb_r_m ¶
Source

emit_ldursb_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldursh ¶
Source

emit_ldursh :: emit_ldursh_r_m

emit_ldursh_r_m ¶
Source

emit_ldursh_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldursw ¶
Source

emit_ldursw :: emit_ldursw_r_m

emit_ldursw_r_m ¶
Source

emit_ldursw_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldxp ¶
Source

emit_ldxp :: emit_ldxp_r_r_m

emit_ldxp_r_r_m ¶
Source

emit_ldxp_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_ldxr ¶
Source

emit_ldxr :: emit_ldxr_r_m

emit_ldxr_r_m ¶
Source

emit_ldxr_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldxrb ¶
Source

emit_ldxrb :: emit_ldxrb_r_m

emit_ldxrb_r_m ¶
Source

emit_ldxrb_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_ldxrh ¶
Source

emit_ldxrh :: emit_ldxrh_r_m

emit_ldxrh_r_m ¶
Source

emit_ldxrh_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_lsl_r_r_i ¶
Source

emit_lsl_r_r_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

Related Procedure Groups

emit_lsl

emit_lsl_r_r_r ¶
Source

emit_lsl_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_lsl

emit_lsl_zb_p_zb_zb ¶
Source

emit_lsl_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_lsl

emit_lsl_zd_p_zd_zd ¶
Source

emit_lsl_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_lsl_zh_p_zh_zh ¶
Source

emit_lsl_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_lsl_zs_p_zs_zs ¶
Source

emit_lsl_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_lslr ¶
Source

emit_lslr :: emit_lslr_zb_p_zb_zb

emit_lslr_zb_p_zb_zb ¶
Source

emit_lslr_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_lslr_zd_p_zd_zd ¶
Source

emit_lslr_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_lslr_zh_p_zh_zh ¶
Source

emit_lslr_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_lslr_zs_p_zs_zs ¶
Source

emit_lslr_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_lsr_r_r_i ¶
Source

emit_lsr_r_r_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

Related Procedure Groups

emit_lsr

emit_lsr_r_r_r ¶
Source

emit_lsr_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_lsr

emit_lsr_zb_p_zb_zb ¶
Source

emit_lsr_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_lsr

emit_lsr_zd_p_zd_zd ¶
Source

emit_lsr_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_lsr_zh_p_zh_zh ¶
Source

emit_lsr_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_lsr_zs_p_zs_zs ¶
Source

emit_lsr_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_lsrr ¶
Source

emit_lsrr :: emit_lsrr_zb_p_zb_zb

emit_lsrr_zb_p_zb_zb ¶
Source

emit_lsrr_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_lsrr_zd_p_zd_zd ¶
Source

emit_lsrr_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_lsrr_zh_p_zh_zh ¶
Source

emit_lsrr_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_lsrr_zs_p_zs_zs ¶
Source

emit_lsrr_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_luti2 ¶
Source

emit_luti2 :: emit_luti2_zpb_zt_z_i

emit_luti2_zpb_zt_z_i ¶
Source

emit_luti2_zpb_zt_z_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, imm: i64) {…}

emit_luti2_zph_zt_z_i ¶
Source

emit_luti2_zph_zt_z_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, imm: i64) {…}

emit_luti2_zps_zt_z_i ¶
Source

emit_luti2_zps_zt_z_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, imm: i64) {…}

emit_luti4 ¶
Source

emit_luti4 :: emit_luti4_zpb_zt_z_i

emit_luti4_zpb_zt_z_i ¶
Source

emit_luti4_zpb_zt_z_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, imm: i64) {…}

emit_luti4_zph_zt_z_i ¶
Source

emit_luti4_zph_zt_z_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, imm: i64) {…}

emit_luti4_zps_zt_z_i ¶
Source

emit_luti4_zps_zt_z_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, imm: i64) {…}

emit_madd ¶
Source

emit_madd :: emit_madd_r_r_r_r

emit_madd_r_r_r_r ¶
Source

emit_madd_r_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) {…}

emit_match ¶
Source

emit_match :: emit_match_pb_p_zb_zb

emit_match_pb_p_zb_zb ¶
Source

emit_match_pb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_match_ph_p_zh_zh ¶
Source

emit_match_ph_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_mla ¶
Source

emit_mla :: emit_mla_v8b_v8b_v8b

emit_mla_v16b_v16b_v16b ¶
Source

emit_mla_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_mla_v2s_v2s_v2s ¶
Source

emit_mla_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_mla_v4h_v4h_v4h ¶
Source

emit_mla_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_mla_v4s_v4s_v4s ¶
Source

emit_mla_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_mla_v8b_v8b_v8b ¶
Source

emit_mla_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_mla_v8h_v8h_v8h ¶
Source

emit_mla_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_mls ¶
Source

emit_mls :: emit_mls_v8b_v8b_v8b

emit_mls_v16b_v16b_v16b ¶
Source

emit_mls_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_mls_v2s_v2s_v2s ¶
Source

emit_mls_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_mls_v4h_v4h_v4h ¶
Source

emit_mls_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_mls_v4s_v4s_v4s ¶
Source

emit_mls_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_mls_v8b_v8b_v8b ¶
Source

emit_mls_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_mls_v8h_v8h_v8h ¶
Source

emit_mls_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_mov_pb_p ¶
Source

emit_mov_pb_p :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

Related Procedure Groups

emit_mov

emit_mov_pb_p_p ¶
Source

emit_mov_pb_p_p :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_mov_r_i ¶
Source

emit_mov_r_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) {…}

Related Procedure Groups

emit_mov

emit_mov_r_r ¶
Source

emit_mov_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_mov_v16b_v16b ¶
Source

emit_mov_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_mov_v8b_v8b ¶
Source

emit_mov_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_mov

emit_mov_zb_p_zb ¶
Source

emit_mov_zb_p_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_mov

emit_mov_zd_p_zd ¶
Source

emit_mov_zd_p_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_mov_zh_p_zh ¶
Source

emit_mov_zh_p_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_mov_zs_p_zs ¶
Source

emit_mov_zs_p_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_mova_i_p_zb ¶
Source

emit_mova_i_p_zb :: proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, rz2: u8) {…}

Related Procedure Groups

emit_mova

emit_mova_zb_p_i ¶
Source

emit_mova_zb_p_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, imm: i64) {…}

Related Procedure Groups

emit_mova

emit_movi ¶
Source

emit_movi :: emit_movi_v8b_i

emit_movi_v16b_i ¶
Source

emit_movi_v16b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) {…}

emit_movi_v2d_i ¶
Source

emit_movi_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) {…}

emit_movi_v2s_i ¶
Source

emit_movi_v2s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) {…}

emit_movi_v4h_i ¶
Source

emit_movi_v4h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) {…}

emit_movi_v4s_i ¶
Source

emit_movi_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) {…}

emit_movi_v8b_i ¶
Source

emit_movi_v8b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) {…}

emit_movi_v8h_i ¶
Source

emit_movi_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) {…}

emit_movk ¶
Source

emit_movk :: emit_movk_r_i_i

emit_movk_r_i_i ¶
Source

emit_movk_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

emit_movn ¶
Source

emit_movn :: emit_movn_r_i_i

emit_movn_r_i_i ¶
Source

emit_movn_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

emit_movs ¶
Source

emit_movs :: emit_movs_pb_p_p

emit_movs_pb_p_p ¶
Source

emit_movs_pb_p_p :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_movz ¶
Source

emit_movz :: emit_movz_r_i_i

emit_movz_r_i_i ¶
Source

emit_movz_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

emit_mrs ¶
Source

emit_mrs :: emit_mrs_r_s

emit_mrs_r_s ¶
Source

emit_mrs_r_s :: proc(instructions: ^[dynamic]Instruction, dst: Register, sysreg: Register) {…}

emit_msr_i_i ¶
Source

emit_msr_i_i :: proc(instructions: ^[dynamic]Instruction, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_msr

emit_msr_s_r ¶
Source

emit_msr_s_r :: proc(instructions: ^[dynamic]Instruction, sysreg: Register, src: Register) {…}

Related Procedure Groups

emit_msr

emit_msub ¶
Source

emit_msub :: emit_msub_r_r_r_r

emit_msub_r_r_r_r ¶
Source

emit_msub_r_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) {…}

emit_mul_v16b_v16b_v16b ¶
Source

emit_mul_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_mul

emit_mul_v4s_v4s_v4s ¶
Source

emit_mul_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_mul_v8h_v8h_v8h ¶
Source

emit_mul_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_mul_zb_p_zb_zb ¶
Source

emit_mul_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_mul

emit_mul_zd_p_zd_zd ¶
Source

emit_mul_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_mul_zh_p_zh_zh ¶
Source

emit_mul_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_mul_zs_p_zs_zs ¶
Source

emit_mul_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_mvn ¶
Source

emit_mvn :: emit_mvn_v8b_v8b

emit_mvn_r_r ¶
Source

emit_mvn_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_mvn_v16b_v16b ¶
Source

emit_mvn_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_mvn_v8b_v8b ¶
Source

emit_mvn_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_mvni ¶
Source

emit_mvni :: emit_mvni_v4h_i

emit_mvni_v2s_i ¶
Source

emit_mvni_v2s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) {…}

emit_mvni_v4h_i ¶
Source

emit_mvni_v4h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) {…}

emit_mvni_v4s_i ¶
Source

emit_mvni_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) {…}

emit_mvni_v8h_i ¶
Source

emit_mvni_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) {…}

emit_nand ¶
Source

emit_nand :: emit_nand_pb_p_pb_pb

emit_nand_pb_p_pb_pb ¶
Source

emit_nand_pb_p_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_nands ¶
Source

emit_nands :: emit_nands_pb_p_pb_pb

emit_nands_pb_p_pb_pb ¶
Source

emit_nands_pb_p_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_nbsl ¶
Source

emit_nbsl :: emit_nbsl_zd_zd_zd_zd

emit_nbsl_zd_zd_zd_zd ¶
Source

emit_nbsl_zd_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_neg_r_sh ¶
Source

emit_neg_r_sh :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) {…}

Related Procedure Groups

emit_neg

emit_neg_v16b_v16b ¶
Source

emit_neg_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_neg_v2d_v2d ¶
Source

emit_neg_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_neg_v2s_v2s ¶
Source

emit_neg_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_neg_v4h_v4h ¶
Source

emit_neg_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_neg_v4s_v4s ¶
Source

emit_neg_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_neg_v8b_v8b ¶
Source

emit_neg_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_neg

emit_neg_v8h_v8h ¶
Source

emit_neg_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_neg_zb_p_zb ¶
Source

emit_neg_zb_p_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_neg

emit_neg_zd_p_zd ¶
Source

emit_neg_zd_p_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_neg_zh_p_zh ¶
Source

emit_neg_zh_p_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_neg_zs_p_zs ¶
Source

emit_neg_zs_p_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_negs ¶
Source

emit_negs :: emit_negs_r_sh

emit_negs_r_sh ¶
Source

emit_negs_r_sh :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) {…}

emit_ngc ¶
Source

emit_ngc :: emit_ngc_r_r

emit_ngc_r_r ¶
Source

emit_ngc_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_ngcs ¶
Source

emit_ngcs :: emit_ngcs_r_r

emit_ngcs_r_r ¶
Source

emit_ngcs_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_nmatch ¶
Source

emit_nmatch :: emit_nmatch_pb_p_zb_zb

emit_nmatch_pb_p_zb_zb ¶
Source

emit_nmatch_pb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_nmatch_ph_p_zh_zh ¶
Source

emit_nmatch_ph_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_nop ¶
Source

emit_nop :: emit_nop_none

emit_nop_none ¶
Source

emit_nop_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_nor ¶
Source

emit_nor :: emit_nor_pb_p_pb_pb

emit_nor_pb_p_pb_pb ¶
Source

emit_nor_pb_p_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_nors ¶
Source

emit_nors :: emit_nors_pb_p_pb_pb

emit_nors_pb_p_pb_pb ¶
Source

emit_nors_pb_p_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_not_pb_p_pb ¶
Source

emit_not_pb_p_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_not

emit_not_v16b_v16b ¶
Source

emit_not_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_not_v8b_v8b ¶
Source

emit_not_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_not

emit_orn_pb_p_pb_pb ¶
Source

emit_orn_pb_p_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_orn

emit_orn_r_r_sh ¶
Source

emit_orn_r_r_sh :: proc(
	instructions: ^[dynamic]Instruction, 
	dst:          Register, 
	src:          Register, 
	src2:         Register, 
	src2_shift:   Shift_Type, 
	src2_amount:  u8, 
) {…}

Related Procedure Groups

emit_orn

emit_orn_v16b_v16b_v16b ¶
Source

emit_orn_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_orn

emit_orns ¶
Source

emit_orns :: emit_orns_pb_p_pb_pb

emit_orns_pb_p_pb_pb ¶
Source

emit_orns_pb_p_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_orr_pb_p_pb_pb ¶
Source

emit_orr_pb_p_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_orr_r_r_i ¶
Source

emit_orr_r_r_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

Related Procedure Groups

emit_orr

emit_orr_r_r_sh ¶
Source

emit_orr_r_r_sh :: proc(
	instructions: ^[dynamic]Instruction, 
	dst:          Register, 
	src:          Register, 
	src2:         Register, 
	src2_shift:   Shift_Type, 
	src2_amount:  u8, 
) {…}

Related Procedure Groups

emit_orr

emit_orr_v16b_v16b_v16b ¶
Source

emit_orr_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_orr

emit_orr_zb_p_zb_zb ¶
Source

emit_orr_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_orr

emit_orr_zd_p_zd_zd ¶
Source

emit_orr_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_orr_zh_p_zh_zh ¶
Source

emit_orr_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_orr_zs_p_zs_zs ¶
Source

emit_orr_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_orrs ¶
Source

emit_orrs :: emit_orrs_pb_p_pb_pb

emit_orrs_pb_p_pb_pb ¶
Source

emit_orrs_pb_p_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_pacda ¶
Source

emit_pacda :: emit_pacda_r_r

emit_pacda_r_r ¶
Source

emit_pacda_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_pacdb ¶
Source

emit_pacdb :: emit_pacdb_r_r

emit_pacdb_r_r ¶
Source

emit_pacdb_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_pacdza ¶
Source

emit_pacdza :: emit_pacdza_r

emit_pacdza_r ¶
Source

emit_pacdza_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_pacdzb ¶
Source

emit_pacdzb :: emit_pacdzb_r

emit_pacdzb_r ¶
Source

emit_pacdzb_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_pacga ¶
Source

emit_pacga :: emit_pacga_r_r_r

emit_pacga_r_r_r ¶
Source

emit_pacga_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_pacia ¶
Source

emit_pacia :: emit_pacia_r_r

emit_pacia1716 ¶
Source

emit_pacia1716 :: emit_pacia1716_none

emit_pacia1716_none ¶
Source

emit_pacia1716_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_pacia_r_r ¶
Source

emit_pacia_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_paciasp ¶
Source

emit_paciasp :: emit_paciasp_none

emit_paciasp_none ¶
Source

emit_paciasp_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_pacib ¶
Source

emit_pacib :: emit_pacib_r_r

emit_pacib1716 ¶
Source

emit_pacib1716 :: emit_pacib1716_none

emit_pacib1716_none ¶
Source

emit_pacib1716_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_pacib_r_r ¶
Source

emit_pacib_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_pacibsp ¶
Source

emit_pacibsp :: emit_pacibsp_none

emit_pacibsp_none ¶
Source

emit_pacibsp_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_paciza ¶
Source

emit_paciza :: emit_paciza_r

emit_paciza_r ¶
Source

emit_paciza_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_pacizb ¶
Source

emit_pacizb :: emit_pacizb_r

emit_pacizb_r ¶
Source

emit_pacizb_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_pfalse ¶
Source

emit_pfalse :: emit_pfalse_pb

emit_pfalse_pb ¶
Source

emit_pfalse_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8) {…}

emit_pfirst ¶
Source

emit_pfirst :: emit_pfirst_pb_p_pb

emit_pfirst_pb_p_pb ¶
Source

emit_pfirst_pb_p_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_pmul ¶
Source

emit_pmul :: emit_pmul_zb_zb_zb

emit_pmul_zb_zb_zb ¶
Source

emit_pmul_zb_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_pmull ¶
Source

emit_pmull :: emit_pmull_v8h_v8b_v8b

emit_pmull2 ¶
Source

emit_pmull2 :: emit_pmull2_v8h_v16b_v16b

emit_pmull2_v1q_v2d_v2d ¶
Source

emit_pmull2_v1q_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_pmull2_v8h_v16b_v16b ¶
Source

emit_pmull2_v8h_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_pmull_v1q_v1d_v1d ¶
Source

emit_pmull_v1q_v1d_v1d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_pmull_v8h_v8b_v8b ¶
Source

emit_pmull_v8h_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_pmullb ¶
Source

emit_pmullb :: emit_pmullb_zd_zs_zs

emit_pmullb_zd_zs_zs ¶
Source

emit_pmullb_zd_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_pmullt ¶
Source

emit_pmullt :: emit_pmullt_zd_zs_zs

emit_pmullt_zd_zs_zs ¶
Source

emit_pmullt_zd_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_pnext ¶
Source

emit_pnext :: emit_pnext_pb_p_pb

emit_pnext_pb_p_pb ¶
Source

emit_pnext_pb_p_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_prfb ¶
Source

emit_prfb :: emit_prfb_i_p_m

emit_prfb_i_p_m ¶
Source

emit_prfb_i_p_m :: proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) {…}

emit_prfd ¶
Source

emit_prfd :: emit_prfd_i_p_m

emit_prfd_i_p_m ¶
Source

emit_prfd_i_p_m :: proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) {…}

emit_prfh ¶
Source

emit_prfh :: emit_prfh_i_p_m

emit_prfh_i_p_m ¶
Source

emit_prfh_i_p_m :: proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) {…}

emit_prfm_i_l ¶
Source

emit_prfm_i_l :: proc(instructions: ^[dynamic]Instruction, imm: i64, label: u32) {…}

Related Procedure Groups

emit_prfm

emit_prfm_i_m ¶
Source

emit_prfm_i_m :: proc(instructions: ^[dynamic]Instruction, imm: i64, mem: Memory) {…}

Related Procedure Groups

emit_prfm

emit_prfum ¶
Source

emit_prfum :: emit_prfum_i_m

emit_prfum_i_m ¶
Source

emit_prfum_i_m :: proc(instructions: ^[dynamic]Instruction, imm: i64, mem: Memory) {…}

emit_prfw ¶
Source

emit_prfw :: emit_prfw_i_p_m

emit_prfw_i_p_m ¶
Source

emit_prfw_i_p_m :: proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) {…}

emit_psb_csync ¶
Source

emit_psb_csync :: emit_psb_csync_none

emit_psb_csync_none ¶
Source

emit_psb_csync_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_ptrue ¶
Source

emit_ptrue :: emit_ptrue_pb_i

emit_ptrue_pb_i ¶
Source

emit_ptrue_pb_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64) {…}

emit_ptrues ¶
Source

emit_ptrues :: emit_ptrues_pb_i

emit_ptrues_pb_i ¶
Source

emit_ptrues_pb_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64) {…}

emit_raddhn ¶
Source

emit_raddhn :: emit_raddhn_v8b_v8h_v8h

emit_raddhn2 ¶
Source

emit_raddhn2 :: emit_raddhn2_v16b_v8h_v8h

emit_raddhn2_v16b_v8h_v8h ¶
Source

emit_raddhn2_v16b_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_raddhn2_v4s_v2d_v2d ¶
Source

emit_raddhn2_v4s_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_raddhn2_v8h_v4s_v4s ¶
Source

emit_raddhn2_v8h_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_raddhn_v2s_v2d_v2d ¶
Source

emit_raddhn_v2s_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_raddhn_v4h_v4s_v4s ¶
Source

emit_raddhn_v4h_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_raddhn_v8b_v8h_v8h ¶
Source

emit_raddhn_v8b_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_rax1 ¶
Source

emit_rax1 :: emit_rax1_v2d_v2d_v2d

emit_rax1_v2d_v2d_v2d ¶
Source

emit_rax1_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_rbit ¶
Source

emit_rbit :: emit_rbit_r_r

emit_rbit_r_r ¶
Source

emit_rbit_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_rbit_v16b_v16b ¶
Source

emit_rbit_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_rbit_v8b_v8b ¶
Source

emit_rbit_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_rdffr ¶
Source

emit_rdffr :: emit_rdffr_pb

emit_rdffr_pb ¶
Source

emit_rdffr_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8) {…}

emit_rdsvl ¶
Source

emit_rdsvl :: emit_rdsvl_r_i

emit_rdsvl_r_i ¶
Source

emit_rdsvl_r_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) {…}

emit_ret_none ¶
Source

emit_ret_none :: proc(instructions: ^[dynamic]Instruction) {…}

Related Procedure Groups

emit_ret

emit_ret_r ¶
Source

emit_ret_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

Related Procedure Groups

emit_ret

emit_retaa ¶
Source

emit_retaa :: emit_retaa_none

emit_retaa_none ¶
Source

emit_retaa_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_retab ¶
Source

emit_retab :: emit_retab_none

emit_retab_none ¶
Source

emit_retab_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_rev16 ¶
Source

emit_rev16 :: emit_rev16_r_r

emit_rev16_r_r ¶
Source

emit_rev16_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_rev16_v16b_v16b ¶
Source

emit_rev16_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_rev16_v8b_v8b ¶
Source

emit_rev16_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_rev32 ¶
Source

emit_rev32 :: emit_rev32_r_r

emit_rev32_r_r ¶
Source

emit_rev32_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_rev32_v16b_v16b ¶
Source

emit_rev32_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_rev32_v4h_v4h ¶
Source

emit_rev32_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_rev32_v8b_v8b ¶
Source

emit_rev32_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_rev32_v8h_v8h ¶
Source

emit_rev32_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_rev64 ¶
Source

emit_rev64 :: emit_rev64_v8b_v8b

emit_rev64_v16b_v16b ¶
Source

emit_rev64_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_rev64_v2s_v2s ¶
Source

emit_rev64_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_rev64_v4h_v4h ¶
Source

emit_rev64_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_rev64_v4s_v4s ¶
Source

emit_rev64_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_rev64_v8b_v8b ¶
Source

emit_rev64_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_rev64_v8h_v8h ¶
Source

emit_rev64_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_rev_pb_pb ¶
Source

emit_rev_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

emit_rev_r_r ¶
Source

emit_rev_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

Related Procedure Groups

emit_rev

emit_rev_zb_zb ¶
Source

emit_rev_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

Related Procedure Groups

emit_rev

emit_rev_zd_zd ¶
Source

emit_rev_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

emit_rev_zh_zh ¶
Source

emit_rev_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

emit_rev_zs_zs ¶
Source

emit_rev_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

emit_ror_r_r_i ¶
Source

emit_ror_r_r_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

Related Procedure Groups

emit_ror

emit_ror_r_r_r ¶
Source

emit_ror_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_ror

emit_rshrn ¶
Source

emit_rshrn :: emit_rshrn_v8b_v8h_i

emit_rshrn2 ¶
Source

emit_rshrn2 :: emit_rshrn2_v16b_v8h_i

emit_rshrn2_v16b_v8h_i ¶
Source

emit_rshrn2_v16b_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_rshrn2_v4s_v2d_i ¶
Source

emit_rshrn2_v4s_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_rshrn2_v8h_v4s_i ¶
Source

emit_rshrn2_v8h_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_rshrn_v2s_v2d_i ¶
Source

emit_rshrn_v2s_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_rshrn_v4h_v4s_i ¶
Source

emit_rshrn_v4h_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_rshrn_v8b_v8h_i ¶
Source

emit_rshrn_v8b_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_rsubhn ¶
Source

emit_rsubhn :: emit_rsubhn_v8b_v8h_v8h

emit_rsubhn2 ¶
Source

emit_rsubhn2 :: emit_rsubhn2_v16b_v8h_v8h

emit_rsubhn2_v16b_v8h_v8h ¶
Source

emit_rsubhn2_v16b_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_rsubhn2_v4s_v2d_v2d ¶
Source

emit_rsubhn2_v4s_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_rsubhn2_v8h_v4s_v4s ¶
Source

emit_rsubhn2_v8h_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_rsubhn_v2s_v2d_v2d ¶
Source

emit_rsubhn_v2s_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_rsubhn_v4h_v4s_v4s ¶
Source

emit_rsubhn_v4h_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_rsubhn_v8b_v8h_v8h ¶
Source

emit_rsubhn_v8b_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_saba ¶
Source

emit_saba :: emit_saba_v8b_v8b_v8b

emit_saba_v16b_v16b_v16b ¶
Source

emit_saba_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_saba_v2s_v2s_v2s ¶
Source

emit_saba_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_saba_v4h_v4h_v4h ¶
Source

emit_saba_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_saba_v4s_v4s_v4s ¶
Source

emit_saba_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_saba_v8b_v8b_v8b ¶
Source

emit_saba_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_saba_v8h_v8h_v8h ¶
Source

emit_saba_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sabd_v16b_v16b_v16b ¶
Source

emit_sabd_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sabd_v2s_v2s_v2s ¶
Source

emit_sabd_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sabd_v4h_v4h_v4h ¶
Source

emit_sabd_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sabd_v4s_v4s_v4s ¶
Source

emit_sabd_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sabd_v8b_v8b_v8b ¶
Source

emit_sabd_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_sabd

emit_sabd_v8h_v8h_v8h ¶
Source

emit_sabd_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sabd_zb_p_zb_zb ¶
Source

emit_sabd_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_sabd

emit_sabd_zd_p_zd_zd ¶
Source

emit_sabd_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_sabd_zh_p_zh_zh ¶
Source

emit_sabd_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_sabd_zs_p_zs_zs ¶
Source

emit_sabd_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_sadalp ¶
Source

emit_sadalp :: emit_sadalp_v4h_v8b

emit_sadalp_v1d_v2s ¶
Source

emit_sadalp_v1d_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sadalp_v2d_v4s ¶
Source

emit_sadalp_v2d_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sadalp_v2s_v4h ¶
Source

emit_sadalp_v2s_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sadalp_v4h_v8b ¶
Source

emit_sadalp_v4h_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sadalp_v4s_v8h ¶
Source

emit_sadalp_v4s_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sadalp_v8h_v16b ¶
Source

emit_sadalp_v8h_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_saddl ¶
Source

emit_saddl :: emit_saddl_v8h_v8b_v8b

emit_saddl2 ¶
Source

emit_saddl2 :: emit_saddl2_v8h_v16b_v16b

emit_saddl2_v2d_v4s_v4s ¶
Source

emit_saddl2_v2d_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_saddl2_v4s_v8h_v8h ¶
Source

emit_saddl2_v4s_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_saddl2_v8h_v16b_v16b ¶
Source

emit_saddl2_v8h_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_saddl_v2d_v2s_v2s ¶
Source

emit_saddl_v2d_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_saddl_v4s_v4h_v4h ¶
Source

emit_saddl_v4s_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_saddl_v8h_v8b_v8b ¶
Source

emit_saddl_v8h_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_saddlp ¶
Source

emit_saddlp :: emit_saddlp_v4h_v8b

emit_saddlp_v1d_v2s ¶
Source

emit_saddlp_v1d_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_saddlp_v2d_v4s ¶
Source

emit_saddlp_v2d_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_saddlp_v2s_v4h ¶
Source

emit_saddlp_v2s_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_saddlp_v4h_v8b ¶
Source

emit_saddlp_v4h_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_saddlp_v4s_v8h ¶
Source

emit_saddlp_v4s_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_saddlp_v8h_v16b ¶
Source

emit_saddlp_v8h_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_saddlv ¶
Source

emit_saddlv :: emit_saddlv_r_v8b

emit_saddlv_r_v16b ¶
Source

emit_saddlv_r_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_saddlv_r_v4h ¶
Source

emit_saddlv_r_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_saddlv_r_v4s ¶
Source

emit_saddlv_r_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_saddlv_r_v8b ¶
Source

emit_saddlv_r_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_saddlv_r_v8h ¶
Source

emit_saddlv_r_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_saddw ¶
Source

emit_saddw :: emit_saddw_v8h_v8h_v8b

emit_saddw2 ¶
Source

emit_saddw2 :: emit_saddw2_v8h_v8h_v16b

emit_saddw2_v2d_v2d_v4s ¶
Source

emit_saddw2_v2d_v2d_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_saddw2_v4s_v4s_v8h ¶
Source

emit_saddw2_v4s_v4s_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_saddw2_v8h_v8h_v16b ¶
Source

emit_saddw2_v8h_v8h_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_saddw_v2d_v2d_v2s ¶
Source

emit_saddw_v2d_v2d_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_saddw_v4s_v4s_v4h ¶
Source

emit_saddw_v4s_v4s_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_saddw_v8h_v8h_v8b ¶
Source

emit_saddw_v8h_v8h_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sb ¶
Source

emit_sb :: emit_sb_none

emit_sb_none ¶
Source

emit_sb_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_sbc ¶
Source

emit_sbc :: emit_sbc_r_r_r

emit_sbc_r_r_r ¶
Source

emit_sbc_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sbclb ¶
Source

emit_sbclb :: emit_sbclb_zs_zs_zs

emit_sbclb_zd_zd_zd ¶
Source

emit_sbclb_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_sbclb_zs_zs_zs ¶
Source

emit_sbclb_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_sbclt ¶
Source

emit_sbclt :: emit_sbclt_zs_zs_zs

emit_sbclt_zd_zd_zd ¶
Source

emit_sbclt_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_sbclt_zs_zs_zs ¶
Source

emit_sbclt_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_sbcs ¶
Source

emit_sbcs :: emit_sbcs_r_r_r

emit_sbcs_r_r_r ¶
Source

emit_sbcs_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_scvtf ¶
Source

emit_scvtf :: emit_scvtf_r_r

emit_scvtf_r_r ¶
Source

emit_scvtf_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_scvtf_v2d_v2d ¶
Source

emit_scvtf_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_scvtf_v2s_v2s ¶
Source

emit_scvtf_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_scvtf_v4h_v4h ¶
Source

emit_scvtf_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_scvtf_v4s_v4s ¶
Source

emit_scvtf_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_scvtf_v8h_v8h ¶
Source

emit_scvtf_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sdiv_r_r_r ¶
Source

emit_sdiv_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_sdiv

emit_sdiv_zd_p_zd_zd ¶
Source

emit_sdiv_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_sdiv_zs_p_zs_zs ¶
Source

emit_sdiv_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_sdiv

emit_sdot ¶
Source

emit_sdot :: emit_sdot_v2s_v8b_v8b

emit_sdot_v2s_v8b_v8b ¶
Source

emit_sdot_v2s_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sdot_v4s_v16b_v16b ¶
Source

emit_sdot_v4s_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sel ¶
Source

emit_sel :: emit_sel_pb_p_pb_pb

emit_sel_pb_p_pb_pb ¶
Source

emit_sel_pb_p_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_sete ¶
Source

emit_sete :: emit_sete_r_r_r

emit_sete_r_r_r ¶
Source

emit_sete_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_setffr ¶
Source

emit_setffr :: emit_setffr_none

emit_setffr_none ¶
Source

emit_setffr_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_setm ¶
Source

emit_setm :: emit_setm_r_r_r

emit_setm_r_r_r ¶
Source

emit_setm_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_setp ¶
Source

emit_setp :: emit_setp_r_r_r

emit_setp_r_r_r ¶
Source

emit_setp_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sev ¶
Source

emit_sev :: emit_sev_none

emit_sev_none ¶
Source

emit_sev_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_sevl ¶
Source

emit_sevl :: emit_sevl_none

emit_sevl_none ¶
Source

emit_sevl_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_sha1c ¶
Source

emit_sha1c :: emit_sha1c_r_r_v4s

emit_sha1c_r_r_v4s ¶
Source

emit_sha1c_r_r_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sha1h ¶
Source

emit_sha1h :: emit_sha1h_r_r

emit_sha1h_r_r ¶
Source

emit_sha1h_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sha1m ¶
Source

emit_sha1m :: emit_sha1m_r_r_v4s

emit_sha1m_r_r_v4s ¶
Source

emit_sha1m_r_r_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sha1p ¶
Source

emit_sha1p :: emit_sha1p_r_r_v4s

emit_sha1p_r_r_v4s ¶
Source

emit_sha1p_r_r_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sha1su0 ¶
Source

emit_sha1su0 :: emit_sha1su0_v4s_v4s_v4s

emit_sha1su0_v4s_v4s_v4s ¶
Source

emit_sha1su0_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sha1su1 ¶
Source

emit_sha1su1 :: emit_sha1su1_v4s_v4s

emit_sha1su1_v4s_v4s ¶
Source

emit_sha1su1_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sha256h ¶
Source

emit_sha256h :: emit_sha256h_r_r_v4s

emit_sha256h2 ¶
Source

emit_sha256h2 :: emit_sha256h2_r_r_v4s

emit_sha256h2_r_r_v4s ¶
Source

emit_sha256h2_r_r_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sha256h_r_r_v4s ¶
Source

emit_sha256h_r_r_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sha256su0 ¶
Source

emit_sha256su0 :: emit_sha256su0_v4s_v4s

emit_sha256su0_v4s_v4s ¶
Source

emit_sha256su0_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sha256su1 ¶
Source

emit_sha256su1 :: emit_sha256su1_v4s_v4s_v4s

emit_sha256su1_v4s_v4s_v4s ¶
Source

emit_sha256su1_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sha512h ¶
Source

emit_sha512h :: emit_sha512h_r_r_v2d

emit_sha512h2 ¶
Source

emit_sha512h2 :: emit_sha512h2_r_r_v2d

emit_sha512h2_r_r_v2d ¶
Source

emit_sha512h2_r_r_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sha512h_r_r_v2d ¶
Source

emit_sha512h_r_r_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sha512su0 ¶
Source

emit_sha512su0 :: emit_sha512su0_v2d_v2d

emit_sha512su0_v2d_v2d ¶
Source

emit_sha512su0_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sha512su1 ¶
Source

emit_sha512su1 :: emit_sha512su1_v2d_v2d_v2d

emit_sha512su1_v2d_v2d_v2d ¶
Source

emit_sha512su1_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_shadd ¶
Source

emit_shadd :: emit_shadd_v8b_v8b_v8b

emit_shadd_v16b_v16b_v16b ¶
Source

emit_shadd_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_shadd_v2s_v2s_v2s ¶
Source

emit_shadd_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_shadd_v4h_v4h_v4h ¶
Source

emit_shadd_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_shadd_v4s_v4s_v4s ¶
Source

emit_shadd_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_shadd_v8b_v8b_v8b ¶
Source

emit_shadd_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_shadd_v8h_v8h_v8h ¶
Source

emit_shadd_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_shl ¶
Source

emit_shl :: emit_shl_v8b_v8b_i

emit_shl_v16b_v16b_i ¶
Source

emit_shl_v16b_v16b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_shl_v2d_v2d_i ¶
Source

emit_shl_v2d_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_shl_v2s_v2s_i ¶
Source

emit_shl_v2s_v2s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_shl_v4h_v4h_i ¶
Source

emit_shl_v4h_v4h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_shl_v4s_v4s_i ¶
Source

emit_shl_v4s_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_shl_v8b_v8b_i ¶
Source

emit_shl_v8b_v8b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_shl_v8h_v8h_i ¶
Source

emit_shl_v8h_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_shrn ¶
Source

emit_shrn :: emit_shrn_v8b_v8h_i

emit_shrn2 ¶
Source

emit_shrn2 :: emit_shrn2_v16b_v8h_i

emit_shrn2_v16b_v8h_i ¶
Source

emit_shrn2_v16b_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_shrn2_v4s_v2d_i ¶
Source

emit_shrn2_v4s_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_shrn2_v8h_v4s_i ¶
Source

emit_shrn2_v8h_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_shrn_v2s_v2d_i ¶
Source

emit_shrn_v2s_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_shrn_v4h_v4s_i ¶
Source

emit_shrn_v4h_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_shrn_v8b_v8h_i ¶
Source

emit_shrn_v8b_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_shsub ¶
Source

emit_shsub :: emit_shsub_v8b_v8b_v8b

emit_shsub_v16b_v16b_v16b ¶
Source

emit_shsub_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_shsub_v2s_v2s_v2s ¶
Source

emit_shsub_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_shsub_v4h_v4h_v4h ¶
Source

emit_shsub_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_shsub_v4s_v4s_v4s ¶
Source

emit_shsub_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_shsub_v8b_v8b_v8b ¶
Source

emit_shsub_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_shsub_v8h_v8h_v8h ¶
Source

emit_shsub_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sli ¶
Source

emit_sli :: emit_sli_v8b_v8b_i

emit_sli_v16b_v16b_i ¶
Source

emit_sli_v16b_v16b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sli_v2d_v2d_i ¶
Source

emit_sli_v2d_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sli_v2s_v2s_i ¶
Source

emit_sli_v2s_v2s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sli_v4h_v4h_i ¶
Source

emit_sli_v4h_v4h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sli_v4s_v4s_i ¶
Source

emit_sli_v4s_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sli_v8b_v8b_i ¶
Source

emit_sli_v8b_v8b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sli_v8h_v8h_i ¶
Source

emit_sli_v8h_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sm3partw1 ¶
Source

emit_sm3partw1 :: emit_sm3partw1_v4s_v4s_v4s

emit_sm3partw1_v4s_v4s_v4s ¶
Source

emit_sm3partw1_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sm3partw2 ¶
Source

emit_sm3partw2 :: emit_sm3partw2_v4s_v4s_v4s

emit_sm3partw2_v4s_v4s_v4s ¶
Source

emit_sm3partw2_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sm3ss1 ¶
Source

emit_sm3ss1 :: emit_sm3ss1_v4s_v4s_v4s_v4s

emit_sm3ss1_v4s_v4s_v4s_v4s ¶
Source

emit_sm3ss1_v4s_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) {…}

emit_sm3tt1a ¶
Source

emit_sm3tt1a :: emit_sm3tt1a_v4s_v4s_ves_i

emit_sm3tt1a_v4s_v4s_ves_i ¶
Source

emit_sm3tt1a_v4s_v4s_ves_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) {…}

emit_sm3tt1b ¶
Source

emit_sm3tt1b :: emit_sm3tt1b_v4s_v4s_ves_i

emit_sm3tt1b_v4s_v4s_ves_i ¶
Source

emit_sm3tt1b_v4s_v4s_ves_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) {…}

emit_sm3tt2a ¶
Source

emit_sm3tt2a :: emit_sm3tt2a_v4s_v4s_ves_i

emit_sm3tt2a_v4s_v4s_ves_i ¶
Source

emit_sm3tt2a_v4s_v4s_ves_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) {…}

emit_sm3tt2b ¶
Source

emit_sm3tt2b :: emit_sm3tt2b_v4s_v4s_ves_i

emit_sm3tt2b_v4s_v4s_ves_i ¶
Source

emit_sm3tt2b_v4s_v4s_ves_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) {…}

emit_sm4e ¶
Source

emit_sm4e :: emit_sm4e_v4s_v4s

emit_sm4e_v4s_v4s ¶
Source

emit_sm4e_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sm4ekey ¶
Source

emit_sm4ekey :: emit_sm4ekey_v4s_v4s_v4s

emit_sm4ekey_v4s_v4s_v4s ¶
Source

emit_sm4ekey_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smaddl ¶
Source

emit_smaddl :: emit_smaddl_r_r_r_r

emit_smaddl_r_r_r_r ¶
Source

emit_smaddl_r_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) {…}

emit_smax_v16b_v16b_v16b ¶
Source

emit_smax_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smax_v2s_v2s_v2s ¶
Source

emit_smax_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smax_v4h_v4h_v4h ¶
Source

emit_smax_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smax_v4s_v4s_v4s ¶
Source

emit_smax_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smax_v8b_v8b_v8b ¶
Source

emit_smax_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_smax

emit_smax_v8h_v8h_v8h ¶
Source

emit_smax_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smax_zb_p_zb_zb ¶
Source

emit_smax_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_smax

emit_smax_zd_p_zd_zd ¶
Source

emit_smax_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_smax_zh_p_zh_zh ¶
Source

emit_smax_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_smax_zs_p_zs_zs ¶
Source

emit_smax_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_smaxp ¶
Source

emit_smaxp :: emit_smaxp_v8b_v8b_v8b

emit_smaxp_v16b_v16b_v16b ¶
Source

emit_smaxp_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smaxp_v2s_v2s_v2s ¶
Source

emit_smaxp_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smaxp_v4h_v4h_v4h ¶
Source

emit_smaxp_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smaxp_v4s_v4s_v4s ¶
Source

emit_smaxp_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smaxp_v8b_v8b_v8b ¶
Source

emit_smaxp_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smaxp_v8h_v8h_v8h ¶
Source

emit_smaxp_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smaxv ¶
Source

emit_smaxv :: emit_smaxv_r_v8b

emit_smaxv_r_v16b ¶
Source

emit_smaxv_r_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_smaxv_r_v4h ¶
Source

emit_smaxv_r_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_smaxv_r_v4s ¶
Source

emit_smaxv_r_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_smaxv_r_v8b ¶
Source

emit_smaxv_r_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_smaxv_r_v8h ¶
Source

emit_smaxv_r_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_smc ¶
Source

emit_smc :: emit_smc_i

emit_smc_i ¶
Source

emit_smc_i :: proc(instructions: ^[dynamic]Instruction, imm: i64) {…}

emit_smin_v16b_v16b_v16b ¶
Source

emit_smin_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smin_v2s_v2s_v2s ¶
Source

emit_smin_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smin_v4h_v4h_v4h ¶
Source

emit_smin_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smin_v4s_v4s_v4s ¶
Source

emit_smin_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smin_v8b_v8b_v8b ¶
Source

emit_smin_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_smin

emit_smin_v8h_v8h_v8h ¶
Source

emit_smin_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smin_zb_p_zb_zb ¶
Source

emit_smin_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_smin

emit_smin_zd_p_zd_zd ¶
Source

emit_smin_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_smin_zh_p_zh_zh ¶
Source

emit_smin_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_smin_zs_p_zs_zs ¶
Source

emit_smin_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_sminp ¶
Source

emit_sminp :: emit_sminp_v8b_v8b_v8b

emit_sminp_v16b_v16b_v16b ¶
Source

emit_sminp_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sminp_v2s_v2s_v2s ¶
Source

emit_sminp_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sminp_v4h_v4h_v4h ¶
Source

emit_sminp_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sminp_v4s_v4s_v4s ¶
Source

emit_sminp_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sminp_v8b_v8b_v8b ¶
Source

emit_sminp_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sminp_v8h_v8h_v8h ¶
Source

emit_sminp_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sminv ¶
Source

emit_sminv :: emit_sminv_r_v8b

emit_sminv_r_v16b ¶
Source

emit_sminv_r_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sminv_r_v4h ¶
Source

emit_sminv_r_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sminv_r_v4s ¶
Source

emit_sminv_r_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sminv_r_v8b ¶
Source

emit_sminv_r_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sminv_r_v8h ¶
Source

emit_sminv_r_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_smlal ¶
Source

emit_smlal :: emit_smlal_v8h_v8b_v8b

emit_smlal2 ¶
Source

emit_smlal2 :: emit_smlal2_v8h_v16b_v16b

emit_smlal2_v2d_v4s_v4s ¶
Source

emit_smlal2_v2d_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smlal2_v4s_v8h_v8h ¶
Source

emit_smlal2_v4s_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smlal2_v8h_v16b_v16b ¶
Source

emit_smlal2_v8h_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smlal_v2d_v2s_v2s ¶
Source

emit_smlal_v2d_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smlal_v4s_v4h_v4h ¶
Source

emit_smlal_v4s_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smlal_v8h_v8b_v8b ¶
Source

emit_smlal_v8h_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smlsl ¶
Source

emit_smlsl :: emit_smlsl_v8h_v8b_v8b

emit_smlsl2 ¶
Source

emit_smlsl2 :: emit_smlsl2_v8h_v16b_v16b

emit_smlsl2_v2d_v4s_v4s ¶
Source

emit_smlsl2_v2d_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smlsl2_v4s_v8h_v8h ¶
Source

emit_smlsl2_v4s_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smlsl2_v8h_v16b_v16b ¶
Source

emit_smlsl2_v8h_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smlsl_v2d_v2s_v2s ¶
Source

emit_smlsl_v2d_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smlsl_v4s_v4h_v4h ¶
Source

emit_smlsl_v4s_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smlsl_v8h_v8b_v8b ¶
Source

emit_smlsl_v8h_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smopa ¶
Source

emit_smopa :: emit_smopa_i_p_p_zb_zb

emit_smopa_i_p_p_zb_zb ¶
Source

emit_smopa_i_p_p_zb_zb :: proc(
	instructions: ^[dynamic]Instruction, 
	imm:          i64, 
	rz1:          u8, 
	rz2:          u8, 
	rz3:          u8, 
	rz4:          u8, 
) {…}

emit_smopa_i_p_p_zh_zh ¶
Source

emit_smopa_i_p_p_zh_zh :: proc(
	instructions: ^[dynamic]Instruction, 
	imm:          i64, 
	rz1:          u8, 
	rz2:          u8, 
	rz3:          u8, 
	rz4:          u8, 
) {…}

emit_smops ¶
Source

emit_smops :: emit_smops_i_p_p_zb_zb

emit_smops_i_p_p_zb_zb ¶
Source

emit_smops_i_p_p_zb_zb :: proc(
	instructions: ^[dynamic]Instruction, 
	imm:          i64, 
	rz1:          u8, 
	rz2:          u8, 
	rz3:          u8, 
	rz4:          u8, 
) {…}

emit_smops_i_p_p_zh_zh ¶
Source

emit_smops_i_p_p_zh_zh :: proc(
	instructions: ^[dynamic]Instruction, 
	imm:          i64, 
	rz1:          u8, 
	rz2:          u8, 
	rz3:          u8, 
	rz4:          u8, 
) {…}

emit_smstart ¶
Source

emit_smstart :: emit_smstart_none

emit_smstart_none ¶
Source

emit_smstart_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_smstop ¶
Source

emit_smstop :: emit_smstop_none

emit_smstop_none ¶
Source

emit_smstop_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_smsubl ¶
Source

emit_smsubl :: emit_smsubl_r_r_r_r

emit_smsubl_r_r_r_r ¶
Source

emit_smsubl_r_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) {…}

emit_smulh_r_r_r ¶
Source

emit_smulh_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_smulh

emit_smulh_zb_p_zb_zb ¶
Source

emit_smulh_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_smulh

emit_smulh_zd_p_zd_zd ¶
Source

emit_smulh_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_smulh_zh_p_zh_zh ¶
Source

emit_smulh_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_smulh_zs_p_zs_zs ¶
Source

emit_smulh_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_smull ¶
Source

emit_smull :: emit_smull_v8h_v8b_v8b

emit_smull2 ¶
Source

emit_smull2 :: emit_smull2_v8h_v16b_v16b

emit_smull2_v2d_v4s_v4s ¶
Source

emit_smull2_v2d_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smull2_v4s_v8h_v8h ¶
Source

emit_smull2_v4s_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smull2_v8h_v16b_v16b ¶
Source

emit_smull2_v8h_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smull_v2d_v2s_v2s ¶
Source

emit_smull_v2d_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smull_v4s_v4h_v4h ¶
Source

emit_smull_v4s_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_smull_v8h_v8b_v8b ¶
Source

emit_smull_v8h_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_splice ¶
Source

emit_splice :: emit_splice_zb_p_zb_zb

emit_splice_zb_p_zb_zb ¶
Source

emit_splice_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_sqadd_v16b_v16b_v16b ¶
Source

emit_sqadd_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqadd_v2d_v2d_v2d ¶
Source

emit_sqadd_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqadd_v2s_v2s_v2s ¶
Source

emit_sqadd_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqadd_v4h_v4h_v4h ¶
Source

emit_sqadd_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqadd_v4s_v4s_v4s ¶
Source

emit_sqadd_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqadd_v8b_v8b_v8b ¶
Source

emit_sqadd_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_sqadd

emit_sqadd_v8h_v8h_v8h ¶
Source

emit_sqadd_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqadd_zb_zb_zb ¶
Source

emit_sqadd_zb_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_sqadd

emit_sqadd_zd_zd_zd ¶
Source

emit_sqadd_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_sqadd_zh_zh_zh ¶
Source

emit_sqadd_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_sqadd_zs_zs_zs ¶
Source

emit_sqadd_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_sqdecb_r_i_i ¶
Source

emit_sqdecb_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_sqdecb

emit_sqdecb_r_r_i_i ¶
Source

emit_sqdecb_r_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_sqdecb

emit_sqdecd_r_i_i ¶
Source

emit_sqdecd_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_sqdecd

emit_sqdecd_r_r_i_i ¶
Source

emit_sqdecd_r_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_sqdecd

emit_sqdecd_zd_i_i ¶
Source

emit_sqdecd_zd_i_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_sqdecd

emit_sqdech_r_i_i ¶
Source

emit_sqdech_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_sqdech

emit_sqdech_r_r_i_i ¶
Source

emit_sqdech_r_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_sqdech

emit_sqdech_zh_i_i ¶
Source

emit_sqdech_zh_i_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_sqdech

emit_sqdecp_r_pb ¶
Source

emit_sqdecp_r_pb :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

Related Procedure Groups

emit_sqdecp

emit_sqdecp_r_pb_r ¶
Source

emit_sqdecp_r_pb_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) {…}

Related Procedure Groups

emit_sqdecp

emit_sqdecp_r_pd ¶
Source

emit_sqdecp_r_pd :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

emit_sqdecp_r_pd_r ¶
Source

emit_sqdecp_r_pd_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) {…}

emit_sqdecp_r_ph ¶
Source

emit_sqdecp_r_ph :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

emit_sqdecp_r_ph_r ¶
Source

emit_sqdecp_r_ph_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) {…}

emit_sqdecp_r_ps ¶
Source

emit_sqdecp_r_ps :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

emit_sqdecp_r_ps_r ¶
Source

emit_sqdecp_r_ps_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) {…}

emit_sqdecp_zd_pd ¶
Source

emit_sqdecp_zd_pd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

emit_sqdecp_zh_ph ¶
Source

emit_sqdecp_zh_ph :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

Related Procedure Groups

emit_sqdecp

emit_sqdecp_zs_ps ¶
Source

emit_sqdecp_zs_ps :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

emit_sqdecw_r_i_i ¶
Source

emit_sqdecw_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_sqdecw

emit_sqdecw_r_r_i_i ¶
Source

emit_sqdecw_r_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_sqdecw

emit_sqdecw_zs_i_i ¶
Source

emit_sqdecw_zs_i_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_sqdecw

emit_sqdmlal ¶
Source

emit_sqdmlal :: emit_sqdmlal_v4s_v4h_v4h

emit_sqdmlal2 ¶
Source

emit_sqdmlal2 :: emit_sqdmlal2_v4s_v8h_v8h

emit_sqdmlal2_v2d_v4s_v4s ¶
Source

emit_sqdmlal2_v2d_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqdmlal2_v4s_v8h_v8h ¶
Source

emit_sqdmlal2_v4s_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqdmlal_v2d_v2s_v2s ¶
Source

emit_sqdmlal_v2d_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqdmlal_v4s_v4h_v4h ¶
Source

emit_sqdmlal_v4s_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqdmlsl ¶
Source

emit_sqdmlsl :: emit_sqdmlsl_v4s_v4h_v4h

emit_sqdmlsl2 ¶
Source

emit_sqdmlsl2 :: emit_sqdmlsl2_v4s_v8h_v8h

emit_sqdmlsl2_v2d_v4s_v4s ¶
Source

emit_sqdmlsl2_v2d_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqdmlsl2_v4s_v8h_v8h ¶
Source

emit_sqdmlsl2_v4s_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqdmlsl_v2d_v2s_v2s ¶
Source

emit_sqdmlsl_v2d_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqdmlsl_v4s_v4h_v4h ¶
Source

emit_sqdmlsl_v4s_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqdmulh ¶
Source

emit_sqdmulh :: emit_sqdmulh_v4h_v4h_v4h

emit_sqdmulh_v2s_v2s_v2s ¶
Source

emit_sqdmulh_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqdmulh_v4h_v4h_v4h ¶
Source

emit_sqdmulh_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqdmulh_v4s_v4s_v4s ¶
Source

emit_sqdmulh_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqdmulh_v8h_v8h_v8h ¶
Source

emit_sqdmulh_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqdmull ¶
Source

emit_sqdmull :: emit_sqdmull_v4s_v4h_v4h

emit_sqdmull2 ¶
Source

emit_sqdmull2 :: emit_sqdmull2_v4s_v8h_v8h

emit_sqdmull2_v2d_v4s_v4s ¶
Source

emit_sqdmull2_v2d_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqdmull2_v4s_v8h_v8h ¶
Source

emit_sqdmull2_v4s_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqdmull_v2d_v2s_v2s ¶
Source

emit_sqdmull_v2d_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqdmull_v4s_v4h_v4h ¶
Source

emit_sqdmull_v4s_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqincb_r_i_i ¶
Source

emit_sqincb_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_sqincb

emit_sqincb_r_r_i_i ¶
Source

emit_sqincb_r_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_sqincb

emit_sqincd_r_i_i ¶
Source

emit_sqincd_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_sqincd

emit_sqincd_r_r_i_i ¶
Source

emit_sqincd_r_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_sqincd

emit_sqincd_zd_i_i ¶
Source

emit_sqincd_zd_i_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_sqincd

emit_sqinch_r_i_i ¶
Source

emit_sqinch_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_sqinch

emit_sqinch_r_r_i_i ¶
Source

emit_sqinch_r_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_sqinch

emit_sqinch_zh_i_i ¶
Source

emit_sqinch_zh_i_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_sqinch

emit_sqincp_r_pb ¶
Source

emit_sqincp_r_pb :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

Related Procedure Groups

emit_sqincp

emit_sqincp_r_pb_r ¶
Source

emit_sqincp_r_pb_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) {…}

Related Procedure Groups

emit_sqincp

emit_sqincp_r_pd ¶
Source

emit_sqincp_r_pd :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

emit_sqincp_r_pd_r ¶
Source

emit_sqincp_r_pd_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) {…}

emit_sqincp_r_ph ¶
Source

emit_sqincp_r_ph :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

emit_sqincp_r_ph_r ¶
Source

emit_sqincp_r_ph_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) {…}

emit_sqincp_r_ps ¶
Source

emit_sqincp_r_ps :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

emit_sqincp_r_ps_r ¶
Source

emit_sqincp_r_ps_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8, src: Register) {…}

emit_sqincp_zd_pd ¶
Source

emit_sqincp_zd_pd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

emit_sqincp_zh_ph ¶
Source

emit_sqincp_zh_ph :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

Related Procedure Groups

emit_sqincp

emit_sqincp_zs_ps ¶
Source

emit_sqincp_zs_ps :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

emit_sqincw_r_i_i ¶
Source

emit_sqincw_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_sqincw

emit_sqincw_r_r_i_i ¶
Source

emit_sqincw_r_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_sqincw

emit_sqincw_zs_i_i ¶
Source

emit_sqincw_zs_i_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_sqincw

emit_sqrdmlah ¶
Source

emit_sqrdmlah :: emit_sqrdmlah_zb_zb_zb

emit_sqrdmlah_zb_zb_zb ¶
Source

emit_sqrdmlah_zb_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_sqrdmlah_zd_zd_zd ¶
Source

emit_sqrdmlah_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_sqrdmlah_zh_zh_zh ¶
Source

emit_sqrdmlah_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_sqrdmlah_zs_zs_zs ¶
Source

emit_sqrdmlah_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_sqrdmlsh ¶
Source

emit_sqrdmlsh :: emit_sqrdmlsh_zb_zb_zb

emit_sqrdmlsh_zb_zb_zb ¶
Source

emit_sqrdmlsh_zb_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_sqrdmlsh_zd_zd_zd ¶
Source

emit_sqrdmlsh_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_sqrdmlsh_zh_zh_zh ¶
Source

emit_sqrdmlsh_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_sqrdmlsh_zs_zs_zs ¶
Source

emit_sqrdmlsh_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_sqrdmulh ¶
Source

emit_sqrdmulh :: emit_sqrdmulh_v4h_v4h_v4h

emit_sqrdmulh_v2s_v2s_v2s ¶
Source

emit_sqrdmulh_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqrdmulh_v4h_v4h_v4h ¶
Source

emit_sqrdmulh_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqrdmulh_v4s_v4s_v4s ¶
Source

emit_sqrdmulh_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqrdmulh_v8h_v8h_v8h ¶
Source

emit_sqrdmulh_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqrshrn ¶
Source

emit_sqrshrn :: emit_sqrshrn_v8b_v8h_i

emit_sqrshrn2 ¶
Source

emit_sqrshrn2 :: emit_sqrshrn2_v16b_v8h_i

emit_sqrshrn2_v16b_v8h_i ¶
Source

emit_sqrshrn2_v16b_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqrshrn2_v4s_v2d_i ¶
Source

emit_sqrshrn2_v4s_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqrshrn2_v8h_v4s_i ¶
Source

emit_sqrshrn2_v8h_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqrshrn_v2s_v2d_i ¶
Source

emit_sqrshrn_v2s_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqrshrn_v4h_v4s_i ¶
Source

emit_sqrshrn_v4h_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqrshrn_v8b_v8h_i ¶
Source

emit_sqrshrn_v8b_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqrshrun ¶
Source

emit_sqrshrun :: emit_sqrshrun_v8b_v8h_i

emit_sqrshrun2 ¶
Source

emit_sqrshrun2 :: emit_sqrshrun2_v16b_v8h_i

emit_sqrshrun2_v16b_v8h_i ¶
Source

emit_sqrshrun2_v16b_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqrshrun2_v4s_v2d_i ¶
Source

emit_sqrshrun2_v4s_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqrshrun2_v8h_v4s_i ¶
Source

emit_sqrshrun2_v8h_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqrshrun_v2s_v2d_i ¶
Source

emit_sqrshrun_v2s_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqrshrun_v4h_v4s_i ¶
Source

emit_sqrshrun_v4h_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqrshrun_v8b_v8h_i ¶
Source

emit_sqrshrun_v8b_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshl ¶
Source

emit_sqshl :: emit_sqshl_v8b_v8b_i

emit_sqshl_v16b_v16b_i ¶
Source

emit_sqshl_v16b_v16b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshl_v2d_v2d_i ¶
Source

emit_sqshl_v2d_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshl_v2s_v2s_i ¶
Source

emit_sqshl_v2s_v2s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshl_v4h_v4h_i ¶
Source

emit_sqshl_v4h_v4h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshl_v4s_v4s_i ¶
Source

emit_sqshl_v4s_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshl_v8b_v8b_i ¶
Source

emit_sqshl_v8b_v8b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshl_v8h_v8h_i ¶
Source

emit_sqshl_v8h_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshlu ¶
Source

emit_sqshlu :: emit_sqshlu_v8b_v8b_i

emit_sqshlu_v16b_v16b_i ¶
Source

emit_sqshlu_v16b_v16b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshlu_v2d_v2d_i ¶
Source

emit_sqshlu_v2d_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshlu_v2s_v2s_i ¶
Source

emit_sqshlu_v2s_v2s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshlu_v4h_v4h_i ¶
Source

emit_sqshlu_v4h_v4h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshlu_v4s_v4s_i ¶
Source

emit_sqshlu_v4s_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshlu_v8b_v8b_i ¶
Source

emit_sqshlu_v8b_v8b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshlu_v8h_v8h_i ¶
Source

emit_sqshlu_v8h_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshrn ¶
Source

emit_sqshrn :: emit_sqshrn_v8b_v8h_i

emit_sqshrn2 ¶
Source

emit_sqshrn2 :: emit_sqshrn2_v16b_v8h_i

emit_sqshrn2_v16b_v8h_i ¶
Source

emit_sqshrn2_v16b_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshrn2_v4s_v2d_i ¶
Source

emit_sqshrn2_v4s_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshrn2_v8h_v4s_i ¶
Source

emit_sqshrn2_v8h_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshrn_v2s_v2d_i ¶
Source

emit_sqshrn_v2s_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshrn_v4h_v4s_i ¶
Source

emit_sqshrn_v4h_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshrn_v8b_v8h_i ¶
Source

emit_sqshrn_v8b_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshrun ¶
Source

emit_sqshrun :: emit_sqshrun_v8b_v8h_i

emit_sqshrun2 ¶
Source

emit_sqshrun2 :: emit_sqshrun2_v16b_v8h_i

emit_sqshrun2_v16b_v8h_i ¶
Source

emit_sqshrun2_v16b_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshrun2_v4s_v2d_i ¶
Source

emit_sqshrun2_v4s_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshrun2_v8h_v4s_i ¶
Source

emit_sqshrun2_v8h_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshrun_v2s_v2d_i ¶
Source

emit_sqshrun_v2s_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshrun_v4h_v4s_i ¶
Source

emit_sqshrun_v4h_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqshrun_v8b_v8h_i ¶
Source

emit_sqshrun_v8b_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sqsub_v16b_v16b_v16b ¶
Source

emit_sqsub_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqsub_v2d_v2d_v2d ¶
Source

emit_sqsub_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqsub_v2s_v2s_v2s ¶
Source

emit_sqsub_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqsub_v4h_v4h_v4h ¶
Source

emit_sqsub_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqsub_v4s_v4s_v4s ¶
Source

emit_sqsub_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqsub_v8b_v8b_v8b ¶
Source

emit_sqsub_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_sqsub

emit_sqsub_v8h_v8h_v8h ¶
Source

emit_sqsub_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sqsub_zb_zb_zb ¶
Source

emit_sqsub_zb_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_sqsub

emit_sqsub_zd_zd_zd ¶
Source

emit_sqsub_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_sqsub_zh_zh_zh ¶
Source

emit_sqsub_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_sqsub_zs_zs_zs ¶
Source

emit_sqsub_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_sqxtn ¶
Source

emit_sqxtn :: emit_sqxtn_v8b_v8h

emit_sqxtn2 ¶
Source

emit_sqxtn2 :: emit_sqxtn2_v16b_v8h

emit_sqxtn2_v16b_v8h ¶
Source

emit_sqxtn2_v16b_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sqxtn2_v4s_v2d ¶
Source

emit_sqxtn2_v4s_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sqxtn2_v8h_v4s ¶
Source

emit_sqxtn2_v8h_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sqxtn_v2s_v2d ¶
Source

emit_sqxtn_v2s_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sqxtn_v4h_v4s ¶
Source

emit_sqxtn_v4h_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sqxtn_v8b_v8h ¶
Source

emit_sqxtn_v8b_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sqxtun ¶
Source

emit_sqxtun :: emit_sqxtun_v8b_v8h

emit_sqxtun2 ¶
Source

emit_sqxtun2 :: emit_sqxtun2_v16b_v8h

emit_sqxtun2_v16b_v8h ¶
Source

emit_sqxtun2_v16b_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sqxtun2_v4s_v2d ¶
Source

emit_sqxtun2_v4s_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sqxtun2_v8h_v4s ¶
Source

emit_sqxtun2_v8h_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sqxtun_v2s_v2d ¶
Source

emit_sqxtun_v2s_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sqxtun_v4h_v4s ¶
Source

emit_sqxtun_v4h_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sqxtun_v8b_v8h ¶
Source

emit_sqxtun_v8b_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_srhadd ¶
Source

emit_srhadd :: emit_srhadd_v8b_v8b_v8b

emit_srhadd_v16b_v16b_v16b ¶
Source

emit_srhadd_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_srhadd_v2s_v2s_v2s ¶
Source

emit_srhadd_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_srhadd_v4h_v4h_v4h ¶
Source

emit_srhadd_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_srhadd_v4s_v4s_v4s ¶
Source

emit_srhadd_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_srhadd_v8b_v8b_v8b ¶
Source

emit_srhadd_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_srhadd_v8h_v8h_v8h ¶
Source

emit_srhadd_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sri ¶
Source

emit_sri :: emit_sri_v8b_v8b_i

emit_sri_v16b_v16b_i ¶
Source

emit_sri_v16b_v16b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sri_v2d_v2d_i ¶
Source

emit_sri_v2d_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sri_v2s_v2s_i ¶
Source

emit_sri_v2s_v2s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sri_v4h_v4h_i ¶
Source

emit_sri_v4h_v4h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sri_v4s_v4s_i ¶
Source

emit_sri_v4s_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sri_v8b_v8b_i ¶
Source

emit_sri_v8b_v8b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sri_v8h_v8h_i ¶
Source

emit_sri_v8h_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_srshl ¶
Source

emit_srshl :: emit_srshl_v8b_v8b_v8b

emit_srshl_v16b_v16b_v16b ¶
Source

emit_srshl_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_srshl_v2d_v2d_v2d ¶
Source

emit_srshl_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_srshl_v2s_v2s_v2s ¶
Source

emit_srshl_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_srshl_v4h_v4h_v4h ¶
Source

emit_srshl_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_srshl_v4s_v4s_v4s ¶
Source

emit_srshl_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_srshl_v8b_v8b_v8b ¶
Source

emit_srshl_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_srshl_v8h_v8h_v8h ¶
Source

emit_srshl_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_srshr ¶
Source

emit_srshr :: emit_srshr_v8b_v8b_i

emit_srshr_v16b_v16b_i ¶
Source

emit_srshr_v16b_v16b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_srshr_v2d_v2d_i ¶
Source

emit_srshr_v2d_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_srshr_v2s_v2s_i ¶
Source

emit_srshr_v2s_v2s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_srshr_v4h_v4h_i ¶
Source

emit_srshr_v4h_v4h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_srshr_v4s_v4s_i ¶
Source

emit_srshr_v4s_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_srshr_v8b_v8b_i ¶
Source

emit_srshr_v8b_v8b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_srshr_v8h_v8h_i ¶
Source

emit_srshr_v8h_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_srsra ¶
Source

emit_srsra :: emit_srsra_v8b_v8b_i

emit_srsra_v16b_v16b_i ¶
Source

emit_srsra_v16b_v16b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_srsra_v2d_v2d_i ¶
Source

emit_srsra_v2d_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_srsra_v2s_v2s_i ¶
Source

emit_srsra_v2s_v2s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_srsra_v4h_v4h_i ¶
Source

emit_srsra_v4h_v4h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_srsra_v4s_v4s_i ¶
Source

emit_srsra_v4s_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_srsra_v8b_v8b_i ¶
Source

emit_srsra_v8b_v8b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_srsra_v8h_v8h_i ¶
Source

emit_srsra_v8h_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sshl ¶
Source

emit_sshl :: emit_sshl_v8b_v8b_v8b

emit_sshl_v16b_v16b_v16b ¶
Source

emit_sshl_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sshl_v2d_v2d_v2d ¶
Source

emit_sshl_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sshl_v2s_v2s_v2s ¶
Source

emit_sshl_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sshl_v4h_v4h_v4h ¶
Source

emit_sshl_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sshl_v4s_v4s_v4s ¶
Source

emit_sshl_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sshl_v8b_v8b_v8b ¶
Source

emit_sshl_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sshl_v8h_v8h_v8h ¶
Source

emit_sshl_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sshll ¶
Source

emit_sshll :: emit_sshll_v8h_v8b_i

emit_sshll2 ¶
Source

emit_sshll2 :: emit_sshll2_v8h_v16b_i

emit_sshll2_v2d_v4s_i ¶
Source

emit_sshll2_v2d_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sshll2_v4s_v8h_i ¶
Source

emit_sshll2_v4s_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sshll2_v8h_v16b_i ¶
Source

emit_sshll2_v8h_v16b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sshll_v2d_v2s_i ¶
Source

emit_sshll_v2d_v2s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sshll_v4s_v4h_i ¶
Source

emit_sshll_v4s_v4h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sshll_v8h_v8b_i ¶
Source

emit_sshll_v8h_v8b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sshr ¶
Source

emit_sshr :: emit_sshr_v8b_v8b_i

emit_sshr_v16b_v16b_i ¶
Source

emit_sshr_v16b_v16b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sshr_v2d_v2d_i ¶
Source

emit_sshr_v2d_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sshr_v2s_v2s_i ¶
Source

emit_sshr_v2s_v2s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sshr_v4h_v4h_i ¶
Source

emit_sshr_v4h_v4h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sshr_v4s_v4s_i ¶
Source

emit_sshr_v4s_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sshr_v8b_v8b_i ¶
Source

emit_sshr_v8b_v8b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_sshr_v8h_v8h_i ¶
Source

emit_sshr_v8h_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ssra ¶
Source

emit_ssra :: emit_ssra_v8b_v8b_i

emit_ssra_v16b_v16b_i ¶
Source

emit_ssra_v16b_v16b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ssra_v2d_v2d_i ¶
Source

emit_ssra_v2d_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ssra_v2s_v2s_i ¶
Source

emit_ssra_v2s_v2s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ssra_v4h_v4h_i ¶
Source

emit_ssra_v4h_v4h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ssra_v4s_v4s_i ¶
Source

emit_ssra_v4s_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ssra_v8b_v8b_i ¶
Source

emit_ssra_v8b_v8b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ssra_v8h_v8h_i ¶
Source

emit_ssra_v8h_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ssubl ¶
Source

emit_ssubl :: emit_ssubl_v8h_v8b_v8b

emit_ssubl2 ¶
Source

emit_ssubl2 :: emit_ssubl2_v8h_v16b_v16b

emit_ssubl2_v2d_v4s_v4s ¶
Source

emit_ssubl2_v2d_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_ssubl2_v4s_v8h_v8h ¶
Source

emit_ssubl2_v4s_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_ssubl2_v8h_v16b_v16b ¶
Source

emit_ssubl2_v8h_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_ssubl_v2d_v2s_v2s ¶
Source

emit_ssubl_v2d_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_ssubl_v4s_v4h_v4h ¶
Source

emit_ssubl_v4s_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_ssubl_v8h_v8b_v8b ¶
Source

emit_ssubl_v8h_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_ssubw ¶
Source

emit_ssubw :: emit_ssubw_v8h_v8h_v8b

emit_ssubw2 ¶
Source

emit_ssubw2 :: emit_ssubw2_v8h_v8h_v16b

emit_ssubw2_v2d_v2d_v4s ¶
Source

emit_ssubw2_v2d_v2d_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_ssubw2_v4s_v4s_v8h ¶
Source

emit_ssubw2_v4s_v4s_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_ssubw2_v8h_v8h_v16b ¶
Source

emit_ssubw2_v8h_v8h_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_ssubw_v2d_v2d_v2s ¶
Source

emit_ssubw_v2d_v2d_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_ssubw_v4s_v4s_v4h ¶
Source

emit_ssubw_v4s_v4s_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_ssubw_v8h_v8h_v8b ¶
Source

emit_ssubw_v8h_v8h_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_st1_v16b_m ¶
Source

emit_st1_v16b_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

Related Procedure Groups

emit_st1

emit_st1_v2d_m ¶
Source

emit_st1_v2d_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_st1_v4s_m ¶
Source

emit_st1_v4s_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_st1_v8h_m ¶
Source

emit_st1_v8h_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_st1_veb_i_m ¶
Source

emit_st1_veb_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

Related Procedure Groups

emit_st1

emit_st1_ved_i_m ¶
Source

emit_st1_ved_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_st1_veh_i_m ¶
Source

emit_st1_veh_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_st1_ves_i_m ¶
Source

emit_st1_ves_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_st1b_i_p_m ¶
Source

emit_st1b_i_p_m :: proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) {…}

Related Procedure Groups

emit_st1b

emit_st1b_zb_p_m ¶
Source

emit_st1b_zb_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

Related Procedure Groups

emit_st1b

emit_st1b_zd_p_m ¶
Source

emit_st1b_zd_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_st1b_zpb_pn_m ¶
Source

emit_st1b_zpb_pn_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_st1b_zqb_pn_m ¶
Source

emit_st1b_zqb_pn_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_st1b_zs_p_m ¶
Source

emit_st1b_zs_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_st1d_i_p_m ¶
Source

emit_st1d_i_p_m :: proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) {…}

Related Procedure Groups

emit_st1d

emit_st1d_zd_p_m ¶
Source

emit_st1d_zd_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

Related Procedure Groups

emit_st1d

emit_st1d_zpd_pn_m ¶
Source

emit_st1d_zpd_pn_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_st1d_zqd_pn_m ¶
Source

emit_st1d_zqd_pn_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_st1h_i_p_m ¶
Source

emit_st1h_i_p_m :: proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) {…}

Related Procedure Groups

emit_st1h

emit_st1h_zd_p_m ¶
Source

emit_st1h_zd_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_st1h_zh_p_m ¶
Source

emit_st1h_zh_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

Related Procedure Groups

emit_st1h

emit_st1h_zph_pn_m ¶
Source

emit_st1h_zph_pn_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_st1h_zqh_pn_m ¶
Source

emit_st1h_zqh_pn_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_st1h_zs_p_m ¶
Source

emit_st1h_zs_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_st1q ¶
Source

emit_st1q :: emit_st1q_i_p_m

emit_st1q_i_p_m ¶
Source

emit_st1q_i_p_m :: proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) {…}

emit_st1w_i_p_m ¶
Source

emit_st1w_i_p_m :: proc(instructions: ^[dynamic]Instruction, imm: i64, rz1: u8, mem: Memory) {…}

Related Procedure Groups

emit_st1w

emit_st1w_zd_p_m ¶
Source

emit_st1w_zd_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_st1w_zps_pn_m ¶
Source

emit_st1w_zps_pn_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_st1w_zqs_pn_m ¶
Source

emit_st1w_zqs_pn_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_st1w_zs_p_m ¶
Source

emit_st1w_zs_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

Related Procedure Groups

emit_st1w

emit_st2_v16b_m ¶
Source

emit_st2_v16b_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

Related Procedure Groups

emit_st2

emit_st2_veb_i_m ¶
Source

emit_st2_veb_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

Related Procedure Groups

emit_st2

emit_st2_ved_i_m ¶
Source

emit_st2_ved_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_st2_veh_i_m ¶
Source

emit_st2_veh_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_st2_ves_i_m ¶
Source

emit_st2_ves_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_st2g ¶
Source

emit_st2g :: emit_st2g_r_m

emit_st2g_r_m ¶
Source

emit_st2g_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_st3_v16b_m ¶
Source

emit_st3_v16b_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

Related Procedure Groups

emit_st3

emit_st3_veb_i_m ¶
Source

emit_st3_veb_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

Related Procedure Groups

emit_st3

emit_st3_ved_i_m ¶
Source

emit_st3_ved_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_st3_veh_i_m ¶
Source

emit_st3_veh_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_st3_ves_i_m ¶
Source

emit_st3_ves_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_st4_v16b_m ¶
Source

emit_st4_v16b_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

Related Procedure Groups

emit_st4

emit_st4_veb_i_m ¶
Source

emit_st4_veb_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

Related Procedure Groups

emit_st4

emit_st4_ved_i_m ¶
Source

emit_st4_ved_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_st4_veh_i_m ¶
Source

emit_st4_veh_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_st4_ves_i_m ¶
Source

emit_st4_ves_i_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, mem: Memory) {…}

emit_stg ¶
Source

emit_stg :: emit_stg_r_m

emit_stg_r_m ¶
Source

emit_stg_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_stgm ¶
Source

emit_stgm :: emit_stgm_r_m

emit_stgm_r_m ¶
Source

emit_stgm_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_stgp ¶
Source

emit_stgp :: emit_stgp_r_r_m

emit_stgp_r_r_m ¶
Source

emit_stgp_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_stlr ¶
Source

emit_stlr :: emit_stlr_r_m

emit_stlr_r_m ¶
Source

emit_stlr_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_stlrb ¶
Source

emit_stlrb :: emit_stlrb_r_m

emit_stlrb_r_m ¶
Source

emit_stlrb_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_stlrh ¶
Source

emit_stlrh :: emit_stlrh_r_m

emit_stlrh_r_m ¶
Source

emit_stlrh_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_stlur ¶
Source

emit_stlur :: emit_stlur_r_m

emit_stlur_r_m ¶
Source

emit_stlur_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_stlurb ¶
Source

emit_stlurb :: emit_stlurb_r_m

emit_stlurb_r_m ¶
Source

emit_stlurb_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_stlurh ¶
Source

emit_stlurh :: emit_stlurh_r_m

emit_stlurh_r_m ¶
Source

emit_stlurh_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_stlxp ¶
Source

emit_stlxp :: emit_stlxp_r_r_r_m

emit_stlxp_r_r_r_m ¶
Source

emit_stlxp_r_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, mem: Memory) {…}

emit_stlxr ¶
Source

emit_stlxr :: emit_stlxr_r_r_m

emit_stlxr_r_r_m ¶
Source

emit_stlxr_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_stlxrb ¶
Source

emit_stlxrb :: emit_stlxrb_r_r_m

emit_stlxrb_r_r_m ¶
Source

emit_stlxrb_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_stlxrh ¶
Source

emit_stlxrh :: emit_stlxrh_r_r_m

emit_stlxrh_r_r_m ¶
Source

emit_stlxrh_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_stnp ¶
Source

emit_stnp :: emit_stnp_r_r_m

emit_stnp_r_r_m ¶
Source

emit_stnp_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_stnt1b ¶
Source

emit_stnt1b :: emit_stnt1b_zb_p_m

emit_stnt1b_zb_p_m ¶
Source

emit_stnt1b_zb_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_stnt1d ¶
Source

emit_stnt1d :: emit_stnt1d_zd_p_m

emit_stnt1d_zd_p_m ¶
Source

emit_stnt1d_zd_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_stnt1h ¶
Source

emit_stnt1h :: emit_stnt1h_zh_p_m

emit_stnt1h_zh_p_m ¶
Source

emit_stnt1h_zh_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_stnt1w ¶
Source

emit_stnt1w :: emit_stnt1w_zs_p_m

emit_stnt1w_zs_p_m ¶
Source

emit_stnt1w_zs_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, mem: Memory) {…}

emit_stp ¶
Source

emit_stp :: emit_stp_r_r_m

emit_stp_r_r_m ¶
Source

emit_stp_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_str_i_m ¶
Source

emit_str_i_m :: proc(instructions: ^[dynamic]Instruction, imm: i64, mem: Memory) {…}

Related Procedure Groups

emit_str

emit_str_p_m ¶
Source

emit_str_p_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, mem: Memory) {…}

emit_str_r_m ¶
Source

emit_str_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

Related Procedure Groups

emit_str

emit_str_z_m ¶
Source

emit_str_z_m :: proc(instructions: ^[dynamic]Instruction, rz: u8, mem: Memory) {…}

Related Procedure Groups

emit_str

emit_strb ¶
Source

emit_strb :: emit_strb_r_m

emit_strb_r_m ¶
Source

emit_strb_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_strh ¶
Source

emit_strh :: emit_strh_r_m

emit_strh_r_m ¶
Source

emit_strh_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_stur ¶
Source

emit_stur :: emit_stur_r_m

emit_stur_r_m ¶
Source

emit_stur_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_sturb ¶
Source

emit_sturb :: emit_sturb_r_m

emit_sturb_r_m ¶
Source

emit_sturb_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_sturh ¶
Source

emit_sturh :: emit_sturh_r_m

emit_sturh_r_m ¶
Source

emit_sturh_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_stxp ¶
Source

emit_stxp :: emit_stxp_r_r_r_m

emit_stxp_r_r_r_m ¶
Source

emit_stxp_r_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, mem: Memory) {…}

emit_stxr ¶
Source

emit_stxr :: emit_stxr_r_r_m

emit_stxr_r_r_m ¶
Source

emit_stxr_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_stxrb ¶
Source

emit_stxrb :: emit_stxrb_r_r_m

emit_stxrb_r_r_m ¶
Source

emit_stxrb_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_stxrh ¶
Source

emit_stxrh :: emit_stxrh_r_r_m

emit_stxrh_r_r_m ¶
Source

emit_stxrh_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_stz2g ¶
Source

emit_stz2g :: emit_stz2g_r_m

emit_stz2g_r_m ¶
Source

emit_stz2g_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_stzg ¶
Source

emit_stzg :: emit_stzg_r_m

emit_stzg_r_m ¶
Source

emit_stzg_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_stzgm ¶
Source

emit_stzgm :: emit_stzgm_r_m

emit_stzgm_r_m ¶
Source

emit_stzgm_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, mem: Memory) {…}

emit_sub_r_r_ex ¶
Source

emit_sub_r_r_ex :: proc(
	instructions: ^[dynamic]Instruction, 
	dst:          Register, 
	src:          Register, 
	src2:         Register, 
	src2_ext:     Extend, 
	src2_amount:  u8, 
) {…}

Related Procedure Groups

emit_sub

emit_sub_r_r_i ¶
Source

emit_sub_r_r_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

Related Procedure Groups

emit_sub

emit_sub_r_r_sh ¶
Source

emit_sub_r_r_sh :: proc(
	instructions: ^[dynamic]Instruction, 
	dst:          Register, 
	src:          Register, 
	src2:         Register, 
	src2_shift:   Shift_Type, 
	src2_amount:  u8, 
) {…}

Related Procedure Groups

emit_sub

emit_sub_v16b_v16b_v16b ¶
Source

emit_sub_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_sub

emit_sub_v2d_v2d_v2d ¶
Source

emit_sub_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sub_v4s_v4s_v4s ¶
Source

emit_sub_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sub_v8h_v8h_v8h ¶
Source

emit_sub_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_sub_zb_p_zb_zb ¶
Source

emit_sub_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_sub

emit_sub_zb_zb_zb ¶
Source

emit_sub_zb_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_sub

emit_sub_zd_p_zd_zd ¶
Source

emit_sub_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_sub_zd_zd_zd ¶
Source

emit_sub_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_sub_zh_p_zh_zh ¶
Source

emit_sub_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_sub_zh_zh_zh ¶
Source

emit_sub_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_sub_zs_p_zs_zs ¶
Source

emit_sub_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_sub_zs_zs_zs ¶
Source

emit_sub_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_subg ¶
Source

emit_subg :: emit_subg_r_r_i_i

emit_subg_r_r_i_i ¶
Source

emit_subg_r_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64, imm2: i64) {…}

emit_subhn ¶
Source

emit_subhn :: emit_subhn_v8b_v8h_v8h

emit_subhn2 ¶
Source

emit_subhn2 :: emit_subhn2_v16b_v8h_v8h

emit_subhn2_v16b_v8h_v8h ¶
Source

emit_subhn2_v16b_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_subhn2_v4s_v2d_v2d ¶
Source

emit_subhn2_v4s_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_subhn2_v8h_v4s_v4s ¶
Source

emit_subhn2_v8h_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_subhn_v2s_v2d_v2d ¶
Source

emit_subhn_v2s_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_subhn_v4h_v4s_v4s ¶
Source

emit_subhn_v4h_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_subhn_v8b_v8h_v8h ¶
Source

emit_subhn_v8b_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_subp ¶
Source

emit_subp :: emit_subp_r_r_r

emit_subp_r_r_r ¶
Source

emit_subp_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_subps ¶
Source

emit_subps :: emit_subps_r_r_r

emit_subps_r_r_r ¶
Source

emit_subps_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_subr ¶
Source

emit_subr :: emit_subr_zb_p_zb_zb

emit_subr_zb_p_zb_zb ¶
Source

emit_subr_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_subr_zd_p_zd_zd ¶
Source

emit_subr_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_subr_zh_p_zh_zh ¶
Source

emit_subr_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_subr_zs_p_zs_zs ¶
Source

emit_subr_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_subs_r_r_ex ¶
Source

emit_subs_r_r_ex :: proc(
	instructions: ^[dynamic]Instruction, 
	dst:          Register, 
	src:          Register, 
	src2:         Register, 
	src2_ext:     Extend, 
	src2_amount:  u8, 
) {…}

Related Procedure Groups

emit_subs

emit_subs_r_r_i ¶
Source

emit_subs_r_r_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

Related Procedure Groups

emit_subs

emit_subs_r_r_sh ¶
Source

emit_subs_r_r_sh :: proc(
	instructions: ^[dynamic]Instruction, 
	dst:          Register, 
	src:          Register, 
	src2:         Register, 
	src2_shift:   Shift_Type, 
	src2_amount:  u8, 
) {…}

Related Procedure Groups

emit_subs

emit_sumopa ¶
Source

emit_sumopa :: emit_sumopa_i_p_p_zb_zb

emit_sumopa_i_p_p_zb_zb ¶
Source

emit_sumopa_i_p_p_zb_zb :: proc(
	instructions: ^[dynamic]Instruction, 
	imm:          i64, 
	rz1:          u8, 
	rz2:          u8, 
	rz3:          u8, 
	rz4:          u8, 
) {…}

emit_svc ¶
Source

emit_svc :: emit_svc_i

emit_svc_i ¶
Source

emit_svc_i :: proc(instructions: ^[dynamic]Instruction, imm: i64) {…}

emit_swp ¶
Source

emit_swp :: emit_swp_r_r_m

emit_swp_r_r_m ¶
Source

emit_swp_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_swpa ¶
Source

emit_swpa :: emit_swpa_r_r_m

emit_swpa_r_r_m ¶
Source

emit_swpa_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_swpal ¶
Source

emit_swpal :: emit_swpal_r_r_m

emit_swpal_r_r_m ¶
Source

emit_swpal_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_swpl ¶
Source

emit_swpl :: emit_swpl_r_r_m

emit_swpl_r_r_m ¶
Source

emit_swpl_r_r_m :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, mem: Memory) {…}

emit_sxtb ¶
Source

emit_sxtb :: emit_sxtb_r_r

emit_sxtb_r_r ¶
Source

emit_sxtb_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sxth ¶
Source

emit_sxth :: emit_sxth_r_r

emit_sxth_r_r ¶
Source

emit_sxth_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sxtl ¶
Source

emit_sxtl :: emit_sxtl_v8h_v8b

emit_sxtl2 ¶
Source

emit_sxtl2 :: emit_sxtl2_v8h_v16b

emit_sxtl2_v2d_v4s ¶
Source

emit_sxtl2_v2d_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sxtl2_v4s_v8h ¶
Source

emit_sxtl2_v4s_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sxtl2_v8h_v16b ¶
Source

emit_sxtl2_v8h_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sxtl_v2d_v2s ¶
Source

emit_sxtl_v2d_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sxtl_v4s_v4h ¶
Source

emit_sxtl_v4s_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sxtl_v8h_v8b ¶
Source

emit_sxtl_v8h_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_sxtw ¶
Source

emit_sxtw :: emit_sxtw_r_r

emit_sxtw_r_r ¶
Source

emit_sxtw_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_tbl_v16b_v16b_v16b ¶
Source

emit_tbl_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_tbl_v8b_v16b_v8b ¶
Source

emit_tbl_v8b_v16b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_tbl

emit_tbl_zb_zl1b_zb ¶
Source

emit_tbl_zb_zl1b_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_tbl

emit_tbl_zb_zl2b_zb ¶
Source

emit_tbl_zb_zl2b_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_tbl_zd_zl1d_zd ¶
Source

emit_tbl_zd_zl1d_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_tbl_zh_zl1h_zh ¶
Source

emit_tbl_zh_zl1h_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_tbl_zs_zl1s_zs ¶
Source

emit_tbl_zs_zl1s_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_tbnz ¶
Source

emit_tbnz :: emit_tbnz_r_i_l

emit_tbnz_r_i_l ¶
Source

emit_tbnz_r_i_l :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, label: u32) {…}

emit_tbx_v16b_v16b_v16b ¶
Source

emit_tbx_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_tbx_v8b_v16b_v8b ¶
Source

emit_tbx_v8b_v16b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_tbx

emit_tbx_zb_zb_zb ¶
Source

emit_tbx_zb_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_tbx

emit_tbz ¶
Source

emit_tbz :: emit_tbz_r_i_l

emit_tbz_r_i_l ¶
Source

emit_tbz_r_i_l :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, label: u32) {…}

emit_tcancel ¶
Source

emit_tcancel :: emit_tcancel_i

emit_tcancel_i ¶
Source

emit_tcancel_i :: proc(instructions: ^[dynamic]Instruction, imm: i64) {…}

emit_tcommit ¶
Source

emit_tcommit :: emit_tcommit_none

emit_tcommit_none ¶
Source

emit_tcommit_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_tlbi_alle1 ¶
Source

emit_tlbi_alle1 :: emit_tlbi_alle1_none

emit_tlbi_alle1_none ¶
Source

emit_tlbi_alle1_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_tlbi_alle1is ¶
Source

emit_tlbi_alle1is :: emit_tlbi_alle1is_none

emit_tlbi_alle1is_none ¶
Source

emit_tlbi_alle1is_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_tlbi_alle2 ¶
Source

emit_tlbi_alle2 :: emit_tlbi_alle2_none

emit_tlbi_alle2_none ¶
Source

emit_tlbi_alle2_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_tlbi_alle2is ¶
Source

emit_tlbi_alle2is :: emit_tlbi_alle2is_none

emit_tlbi_alle2is_none ¶
Source

emit_tlbi_alle2is_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_tlbi_alle3 ¶
Source

emit_tlbi_alle3 :: emit_tlbi_alle3_none

emit_tlbi_alle3_none ¶
Source

emit_tlbi_alle3_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_tlbi_alle3is ¶
Source

emit_tlbi_alle3is :: emit_tlbi_alle3is_none

emit_tlbi_alle3is_none ¶
Source

emit_tlbi_alle3is_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_tlbi_aside1 ¶
Source

emit_tlbi_aside1 :: emit_tlbi_aside1_r

emit_tlbi_aside1_r ¶
Source

emit_tlbi_aside1_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_tlbi_aside1is ¶
Source

emit_tlbi_aside1is :: emit_tlbi_aside1is_r

emit_tlbi_aside1is_r ¶
Source

emit_tlbi_aside1is_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_tlbi_paall ¶
Source

emit_tlbi_paall :: emit_tlbi_paall_none

emit_tlbi_paall_none ¶
Source

emit_tlbi_paall_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_tlbi_paallos ¶
Source

emit_tlbi_paallos :: emit_tlbi_paallos_none

emit_tlbi_paallos_none ¶
Source

emit_tlbi_paallos_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_tlbi_rpalos ¶
Source

emit_tlbi_rpalos :: emit_tlbi_rpalos_r

emit_tlbi_rpalos_r ¶
Source

emit_tlbi_rpalos_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_tlbi_rpaos ¶
Source

emit_tlbi_rpaos :: emit_tlbi_rpaos_r

emit_tlbi_rpaos_r ¶
Source

emit_tlbi_rpaos_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_tlbi_vaae1 ¶
Source

emit_tlbi_vaae1 :: emit_tlbi_vaae1_r

emit_tlbi_vaae1_r ¶
Source

emit_tlbi_vaae1_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_tlbi_vaae1is ¶
Source

emit_tlbi_vaae1is :: emit_tlbi_vaae1is_r

emit_tlbi_vaae1is_r ¶
Source

emit_tlbi_vaae1is_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_tlbi_vaale1 ¶
Source

emit_tlbi_vaale1 :: emit_tlbi_vaale1_r

emit_tlbi_vaale1_r ¶
Source

emit_tlbi_vaale1_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_tlbi_vaale1is ¶
Source

emit_tlbi_vaale1is :: emit_tlbi_vaale1is_r

emit_tlbi_vaale1is_r ¶
Source

emit_tlbi_vaale1is_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_tlbi_vae1 ¶
Source

emit_tlbi_vae1 :: emit_tlbi_vae1_r

emit_tlbi_vae1_r ¶
Source

emit_tlbi_vae1_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_tlbi_vae1is ¶
Source

emit_tlbi_vae1is :: emit_tlbi_vae1is_r

emit_tlbi_vae1is_r ¶
Source

emit_tlbi_vae1is_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_tlbi_vale1 ¶
Source

emit_tlbi_vale1 :: emit_tlbi_vale1_r

emit_tlbi_vale1_r ¶
Source

emit_tlbi_vale1_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_tlbi_vale1is ¶
Source

emit_tlbi_vale1is :: emit_tlbi_vale1is_r

emit_tlbi_vale1is_r ¶
Source

emit_tlbi_vale1is_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_tlbi_vmalle1 ¶
Source

emit_tlbi_vmalle1 :: emit_tlbi_vmalle1_none

emit_tlbi_vmalle1_none ¶
Source

emit_tlbi_vmalle1_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_tlbi_vmalle1is ¶
Source

emit_tlbi_vmalle1is :: emit_tlbi_vmalle1is_none

emit_tlbi_vmalle1is_none ¶
Source

emit_tlbi_vmalle1is_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_trn1_pb_pb_pb ¶
Source

emit_trn1_pb_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_trn1_v16b_v16b_v16b ¶
Source

emit_trn1_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_trn1_v2d_v2d_v2d ¶
Source

emit_trn1_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_trn1_v2s_v2s_v2s ¶
Source

emit_trn1_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_trn1_v4h_v4h_v4h ¶
Source

emit_trn1_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_trn1_v4s_v4s_v4s ¶
Source

emit_trn1_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_trn1_v8b_v8b_v8b ¶
Source

emit_trn1_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_trn1

emit_trn1_v8h_v8h_v8h ¶
Source

emit_trn1_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_trn1_zb_zb_zb ¶
Source

emit_trn1_zb_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_trn1

emit_trn1_zd_zd_zd ¶
Source

emit_trn1_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_trn1_zh_zh_zh ¶
Source

emit_trn1_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_trn1_zs_zs_zs ¶
Source

emit_trn1_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_trn2_pb_pb_pb ¶
Source

emit_trn2_pb_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_trn2_v16b_v16b_v16b ¶
Source

emit_trn2_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_trn2_v2d_v2d_v2d ¶
Source

emit_trn2_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_trn2_v2s_v2s_v2s ¶
Source

emit_trn2_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_trn2_v4h_v4h_v4h ¶
Source

emit_trn2_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_trn2_v4s_v4s_v4s ¶
Source

emit_trn2_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_trn2_v8b_v8b_v8b ¶
Source

emit_trn2_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_trn2

emit_trn2_v8h_v8h_v8h ¶
Source

emit_trn2_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_trn2_zb_zb_zb ¶
Source

emit_trn2_zb_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_trn2

emit_trn2_zd_zd_zd ¶
Source

emit_trn2_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_trn2_zh_zh_zh ¶
Source

emit_trn2_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_trn2_zs_zs_zs ¶
Source

emit_trn2_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_tsb_csync ¶
Source

emit_tsb_csync :: emit_tsb_csync_none

emit_tsb_csync_none ¶
Source

emit_tsb_csync_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_tst_r_i ¶
Source

emit_tst_r_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64) {…}

Related Procedure Groups

emit_tst

emit_tst_r_sh ¶
Source

emit_tst_r_sh :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) {…}

Related Procedure Groups

emit_tst

emit_tstart ¶
Source

emit_tstart :: emit_tstart_r

emit_tstart_r ¶
Source

emit_tstart_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_ttest ¶
Source

emit_ttest :: emit_ttest_r

emit_ttest_r ¶
Source

emit_ttest_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_uaba ¶
Source

emit_uaba :: emit_uaba_v8b_v8b_v8b

emit_uaba_v16b_v16b_v16b ¶
Source

emit_uaba_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uaba_v2s_v2s_v2s ¶
Source

emit_uaba_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uaba_v4h_v4h_v4h ¶
Source

emit_uaba_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uaba_v4s_v4s_v4s ¶
Source

emit_uaba_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uaba_v8b_v8b_v8b ¶
Source

emit_uaba_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uaba_v8h_v8h_v8h ¶
Source

emit_uaba_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uabd_v16b_v16b_v16b ¶
Source

emit_uabd_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uabd_v2s_v2s_v2s ¶
Source

emit_uabd_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uabd_v4h_v4h_v4h ¶
Source

emit_uabd_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uabd_v4s_v4s_v4s ¶
Source

emit_uabd_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uabd_v8b_v8b_v8b ¶
Source

emit_uabd_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_uabd

emit_uabd_v8h_v8h_v8h ¶
Source

emit_uabd_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uabd_zb_p_zb_zb ¶
Source

emit_uabd_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_uabd

emit_uabd_zd_p_zd_zd ¶
Source

emit_uabd_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_uabd_zh_p_zh_zh ¶
Source

emit_uabd_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_uabd_zs_p_zs_zs ¶
Source

emit_uabd_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_uadalp ¶
Source

emit_uadalp :: emit_uadalp_v4h_v8b

emit_uadalp_v1d_v2s ¶
Source

emit_uadalp_v1d_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uadalp_v2d_v4s ¶
Source

emit_uadalp_v2d_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uadalp_v2s_v4h ¶
Source

emit_uadalp_v2s_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uadalp_v4h_v8b ¶
Source

emit_uadalp_v4h_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uadalp_v4s_v8h ¶
Source

emit_uadalp_v4s_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uadalp_v8h_v16b ¶
Source

emit_uadalp_v8h_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uaddl ¶
Source

emit_uaddl :: emit_uaddl_v8h_v8b_v8b

emit_uaddl2 ¶
Source

emit_uaddl2 :: emit_uaddl2_v8h_v16b_v16b

emit_uaddl2_v2d_v4s_v4s ¶
Source

emit_uaddl2_v2d_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uaddl2_v4s_v8h_v8h ¶
Source

emit_uaddl2_v4s_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uaddl2_v8h_v16b_v16b ¶
Source

emit_uaddl2_v8h_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uaddl_v2d_v2s_v2s ¶
Source

emit_uaddl_v2d_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uaddl_v4s_v4h_v4h ¶
Source

emit_uaddl_v4s_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uaddl_v8h_v8b_v8b ¶
Source

emit_uaddl_v8h_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uaddlp ¶
Source

emit_uaddlp :: emit_uaddlp_v4h_v8b

emit_uaddlp_v1d_v2s ¶
Source

emit_uaddlp_v1d_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uaddlp_v2d_v4s ¶
Source

emit_uaddlp_v2d_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uaddlp_v2s_v4h ¶
Source

emit_uaddlp_v2s_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uaddlp_v4h_v8b ¶
Source

emit_uaddlp_v4h_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uaddlp_v4s_v8h ¶
Source

emit_uaddlp_v4s_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uaddlp_v8h_v16b ¶
Source

emit_uaddlp_v8h_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uaddlv ¶
Source

emit_uaddlv :: emit_uaddlv_r_v8b

emit_uaddlv_r_v16b ¶
Source

emit_uaddlv_r_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uaddlv_r_v4h ¶
Source

emit_uaddlv_r_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uaddlv_r_v4s ¶
Source

emit_uaddlv_r_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uaddlv_r_v8b ¶
Source

emit_uaddlv_r_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uaddlv_r_v8h ¶
Source

emit_uaddlv_r_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uaddw ¶
Source

emit_uaddw :: emit_uaddw_v8h_v8h_v8b

emit_uaddw2 ¶
Source

emit_uaddw2 :: emit_uaddw2_v8h_v8h_v16b

emit_uaddw2_v2d_v2d_v4s ¶
Source

emit_uaddw2_v2d_v2d_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uaddw2_v4s_v4s_v8h ¶
Source

emit_uaddw2_v4s_v4s_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uaddw2_v8h_v8h_v16b ¶
Source

emit_uaddw2_v8h_v8h_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uaddw_v2d_v2d_v2s ¶
Source

emit_uaddw_v2d_v2d_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uaddw_v4s_v4s_v4h ¶
Source

emit_uaddw_v4s_v4s_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uaddw_v8h_v8h_v8b ¶
Source

emit_uaddw_v8h_v8h_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_ucvtf ¶
Source

emit_ucvtf :: emit_ucvtf_r_r

emit_ucvtf_r_r ¶
Source

emit_ucvtf_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_ucvtf_v2d_v2d ¶
Source

emit_ucvtf_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_ucvtf_v2s_v2s ¶
Source

emit_ucvtf_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_ucvtf_v4h_v4h ¶
Source

emit_ucvtf_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_ucvtf_v4s_v4s ¶
Source

emit_ucvtf_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_ucvtf_v8h_v8h ¶
Source

emit_ucvtf_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_udiv_r_r_r ¶
Source

emit_udiv_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_udiv

emit_udiv_zd_p_zd_zd ¶
Source

emit_udiv_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_udiv_zs_p_zs_zs ¶
Source

emit_udiv_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_udiv

emit_udot ¶
Source

emit_udot :: emit_udot_v2s_v8b_v8b

emit_udot_v2s_v8b_v8b ¶
Source

emit_udot_v2s_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_udot_v4s_v16b_v16b ¶
Source

emit_udot_v4s_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uhadd ¶
Source

emit_uhadd :: emit_uhadd_v8b_v8b_v8b

emit_uhadd_v16b_v16b_v16b ¶
Source

emit_uhadd_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uhadd_v2s_v2s_v2s ¶
Source

emit_uhadd_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uhadd_v4h_v4h_v4h ¶
Source

emit_uhadd_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uhadd_v4s_v4s_v4s ¶
Source

emit_uhadd_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uhadd_v8b_v8b_v8b ¶
Source

emit_uhadd_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uhadd_v8h_v8h_v8h ¶
Source

emit_uhadd_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uhsub ¶
Source

emit_uhsub :: emit_uhsub_v8b_v8b_v8b

emit_uhsub_v16b_v16b_v16b ¶
Source

emit_uhsub_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uhsub_v2s_v2s_v2s ¶
Source

emit_uhsub_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uhsub_v4h_v4h_v4h ¶
Source

emit_uhsub_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uhsub_v4s_v4s_v4s ¶
Source

emit_uhsub_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uhsub_v8b_v8b_v8b ¶
Source

emit_uhsub_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uhsub_v8h_v8h_v8h ¶
Source

emit_uhsub_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umaddl ¶
Source

emit_umaddl :: emit_umaddl_r_r_r_r

emit_umaddl_r_r_r_r ¶
Source

emit_umaddl_r_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) {…}

emit_umax_v16b_v16b_v16b ¶
Source

emit_umax_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umax_v2s_v2s_v2s ¶
Source

emit_umax_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umax_v4h_v4h_v4h ¶
Source

emit_umax_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umax_v4s_v4s_v4s ¶
Source

emit_umax_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umax_v8b_v8b_v8b ¶
Source

emit_umax_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_umax

emit_umax_v8h_v8h_v8h ¶
Source

emit_umax_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umax_zb_p_zb_zb ¶
Source

emit_umax_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_umax

emit_umax_zd_p_zd_zd ¶
Source

emit_umax_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_umax_zh_p_zh_zh ¶
Source

emit_umax_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_umax_zs_p_zs_zs ¶
Source

emit_umax_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_umaxp ¶
Source

emit_umaxp :: emit_umaxp_v8b_v8b_v8b

emit_umaxp_v16b_v16b_v16b ¶
Source

emit_umaxp_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umaxp_v2s_v2s_v2s ¶
Source

emit_umaxp_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umaxp_v4h_v4h_v4h ¶
Source

emit_umaxp_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umaxp_v4s_v4s_v4s ¶
Source

emit_umaxp_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umaxp_v8b_v8b_v8b ¶
Source

emit_umaxp_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umaxp_v8h_v8h_v8h ¶
Source

emit_umaxp_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umaxv ¶
Source

emit_umaxv :: emit_umaxv_r_v8b

emit_umaxv_r_v16b ¶
Source

emit_umaxv_r_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_umaxv_r_v4h ¶
Source

emit_umaxv_r_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_umaxv_r_v4s ¶
Source

emit_umaxv_r_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_umaxv_r_v8b ¶
Source

emit_umaxv_r_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_umaxv_r_v8h ¶
Source

emit_umaxv_r_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_umin_v16b_v16b_v16b ¶
Source

emit_umin_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umin_v2s_v2s_v2s ¶
Source

emit_umin_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umin_v4h_v4h_v4h ¶
Source

emit_umin_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umin_v4s_v4s_v4s ¶
Source

emit_umin_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umin_v8b_v8b_v8b ¶
Source

emit_umin_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_umin

emit_umin_v8h_v8h_v8h ¶
Source

emit_umin_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umin_zb_p_zb_zb ¶
Source

emit_umin_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_umin

emit_umin_zd_p_zd_zd ¶
Source

emit_umin_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_umin_zh_p_zh_zh ¶
Source

emit_umin_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_umin_zs_p_zs_zs ¶
Source

emit_umin_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_uminp ¶
Source

emit_uminp :: emit_uminp_v8b_v8b_v8b

emit_uminp_v16b_v16b_v16b ¶
Source

emit_uminp_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uminp_v2s_v2s_v2s ¶
Source

emit_uminp_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uminp_v4h_v4h_v4h ¶
Source

emit_uminp_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uminp_v4s_v4s_v4s ¶
Source

emit_uminp_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uminp_v8b_v8b_v8b ¶
Source

emit_uminp_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uminp_v8h_v8h_v8h ¶
Source

emit_uminp_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uminv ¶
Source

emit_uminv :: emit_uminv_r_v8b

emit_uminv_r_v16b ¶
Source

emit_uminv_r_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uminv_r_v4h ¶
Source

emit_uminv_r_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uminv_r_v4s ¶
Source

emit_uminv_r_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uminv_r_v8b ¶
Source

emit_uminv_r_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uminv_r_v8h ¶
Source

emit_uminv_r_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_umlal ¶
Source

emit_umlal :: emit_umlal_v8h_v8b_v8b

emit_umlal2 ¶
Source

emit_umlal2 :: emit_umlal2_v8h_v16b_v16b

emit_umlal2_v2d_v4s_v4s ¶
Source

emit_umlal2_v2d_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umlal2_v4s_v8h_v8h ¶
Source

emit_umlal2_v4s_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umlal2_v8h_v16b_v16b ¶
Source

emit_umlal2_v8h_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umlal_v2d_v2s_v2s ¶
Source

emit_umlal_v2d_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umlal_v4s_v4h_v4h ¶
Source

emit_umlal_v4s_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umlal_v8h_v8b_v8b ¶
Source

emit_umlal_v8h_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umlsl ¶
Source

emit_umlsl :: emit_umlsl_v8h_v8b_v8b

emit_umlsl2 ¶
Source

emit_umlsl2 :: emit_umlsl2_v8h_v16b_v16b

emit_umlsl2_v2d_v4s_v4s ¶
Source

emit_umlsl2_v2d_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umlsl2_v4s_v8h_v8h ¶
Source

emit_umlsl2_v4s_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umlsl2_v8h_v16b_v16b ¶
Source

emit_umlsl2_v8h_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umlsl_v2d_v2s_v2s ¶
Source

emit_umlsl_v2d_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umlsl_v4s_v4h_v4h ¶
Source

emit_umlsl_v4s_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umlsl_v8h_v8b_v8b ¶
Source

emit_umlsl_v8h_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umopa ¶
Source

emit_umopa :: emit_umopa_i_p_p_zb_zb

emit_umopa_i_p_p_zb_zb ¶
Source

emit_umopa_i_p_p_zb_zb :: proc(
	instructions: ^[dynamic]Instruction, 
	imm:          i64, 
	rz1:          u8, 
	rz2:          u8, 
	rz3:          u8, 
	rz4:          u8, 
) {…}

emit_umopa_i_p_p_zh_zh ¶
Source

emit_umopa_i_p_p_zh_zh :: proc(
	instructions: ^[dynamic]Instruction, 
	imm:          i64, 
	rz1:          u8, 
	rz2:          u8, 
	rz3:          u8, 
	rz4:          u8, 
) {…}

emit_umops ¶
Source

emit_umops :: emit_umops_i_p_p_zb_zb

emit_umops_i_p_p_zb_zb ¶
Source

emit_umops_i_p_p_zb_zb :: proc(
	instructions: ^[dynamic]Instruction, 
	imm:          i64, 
	rz1:          u8, 
	rz2:          u8, 
	rz3:          u8, 
	rz4:          u8, 
) {…}

emit_umops_i_p_p_zh_zh ¶
Source

emit_umops_i_p_p_zh_zh :: proc(
	instructions: ^[dynamic]Instruction, 
	imm:          i64, 
	rz1:          u8, 
	rz2:          u8, 
	rz3:          u8, 
	rz4:          u8, 
) {…}

emit_umsubl ¶
Source

emit_umsubl :: emit_umsubl_r_r_r_r

emit_umsubl_r_r_r_r ¶
Source

emit_umsubl_r_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, src3: Register) {…}

emit_umulh_r_r_r ¶
Source

emit_umulh_r_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_umulh

emit_umulh_zb_p_zb_zb ¶
Source

emit_umulh_zb_p_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

Related Procedure Groups

emit_umulh

emit_umulh_zd_p_zd_zd ¶
Source

emit_umulh_zd_p_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_umulh_zh_p_zh_zh ¶
Source

emit_umulh_zh_p_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_umulh_zs_p_zs_zs ¶
Source

emit_umulh_zs_p_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, rz4: u8) {…}

emit_umull ¶
Source

emit_umull :: emit_umull_v8h_v8b_v8b

emit_umull2 ¶
Source

emit_umull2 :: emit_umull2_v8h_v16b_v16b

emit_umull2_v2d_v4s_v4s ¶
Source

emit_umull2_v2d_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umull2_v4s_v8h_v8h ¶
Source

emit_umull2_v4s_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umull2_v8h_v16b_v16b ¶
Source

emit_umull2_v8h_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umull_v2d_v2s_v2s ¶
Source

emit_umull_v2d_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umull_v4s_v4h_v4h ¶
Source

emit_umull_v4s_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_umull_v8h_v8b_v8b ¶
Source

emit_umull_v8h_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uqadd_v16b_v16b_v16b ¶
Source

emit_uqadd_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uqadd_v2d_v2d_v2d ¶
Source

emit_uqadd_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uqadd_v2s_v2s_v2s ¶
Source

emit_uqadd_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uqadd_v4h_v4h_v4h ¶
Source

emit_uqadd_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uqadd_v4s_v4s_v4s ¶
Source

emit_uqadd_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uqadd_v8b_v8b_v8b ¶
Source

emit_uqadd_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_uqadd

emit_uqadd_v8h_v8h_v8h ¶
Source

emit_uqadd_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uqadd_zb_zb_zb ¶
Source

emit_uqadd_zb_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_uqadd

emit_uqadd_zd_zd_zd ¶
Source

emit_uqadd_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_uqadd_zh_zh_zh ¶
Source

emit_uqadd_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_uqadd_zs_zs_zs ¶
Source

emit_uqadd_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_uqdecb ¶
Source

emit_uqdecb :: emit_uqdecb_r_i_i

emit_uqdecb_r_i_i ¶
Source

emit_uqdecb_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

emit_uqdecd_r_i_i ¶
Source

emit_uqdecd_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_uqdecd

emit_uqdecd_zd_i_i ¶
Source

emit_uqdecd_zd_i_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_uqdecd

emit_uqdech_r_i_i ¶
Source

emit_uqdech_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_uqdech

emit_uqdech_zh_i_i ¶
Source

emit_uqdech_zh_i_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_uqdech

emit_uqdecp_r_pb ¶
Source

emit_uqdecp_r_pb :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

Related Procedure Groups

emit_uqdecp

emit_uqdecp_r_pd ¶
Source

emit_uqdecp_r_pd :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

emit_uqdecp_r_ph ¶
Source

emit_uqdecp_r_ph :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

emit_uqdecp_r_ps ¶
Source

emit_uqdecp_r_ps :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

emit_uqdecp_zd_pd ¶
Source

emit_uqdecp_zd_pd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

emit_uqdecp_zh_ph ¶
Source

emit_uqdecp_zh_ph :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

Related Procedure Groups

emit_uqdecp

emit_uqdecp_zs_ps ¶
Source

emit_uqdecp_zs_ps :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

emit_uqdecw_r_i_i ¶
Source

emit_uqdecw_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_uqdecw

emit_uqdecw_zs_i_i ¶
Source

emit_uqdecw_zs_i_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_uqdecw

emit_uqincb ¶
Source

emit_uqincb :: emit_uqincb_r_i_i

emit_uqincb_r_i_i ¶
Source

emit_uqincb_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

emit_uqincd_r_i_i ¶
Source

emit_uqincd_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_uqincd

emit_uqincd_zd_i_i ¶
Source

emit_uqincd_zd_i_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_uqincd

emit_uqinch_r_i_i ¶
Source

emit_uqinch_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_uqinch

emit_uqinch_zh_i_i ¶
Source

emit_uqinch_zh_i_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_uqinch

emit_uqincp_r_pb ¶
Source

emit_uqincp_r_pb :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

Related Procedure Groups

emit_uqincp

emit_uqincp_r_pd ¶
Source

emit_uqincp_r_pd :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

emit_uqincp_r_ph ¶
Source

emit_uqincp_r_ph :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

emit_uqincp_r_ps ¶
Source

emit_uqincp_r_ps :: proc(instructions: ^[dynamic]Instruction, dst: Register, rz1: u8) {…}

emit_uqincp_zd_pd ¶
Source

emit_uqincp_zd_pd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

emit_uqincp_zh_ph ¶
Source

emit_uqincp_zh_ph :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

Related Procedure Groups

emit_uqincp

emit_uqincp_zs_ps ¶
Source

emit_uqincp_zs_ps :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

emit_uqincw_r_i_i ¶
Source

emit_uqincw_r_i_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_uqincw

emit_uqincw_zs_i_i ¶
Source

emit_uqincw_zs_i_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, imm: i64, imm2: i64) {…}

Related Procedure Groups

emit_uqincw

emit_uqrshrn ¶
Source

emit_uqrshrn :: emit_uqrshrn_v8b_v8h_i

emit_uqrshrn2 ¶
Source

emit_uqrshrn2 :: emit_uqrshrn2_v16b_v8h_i

emit_uqrshrn2_v16b_v8h_i ¶
Source

emit_uqrshrn2_v16b_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_uqrshrn2_v4s_v2d_i ¶
Source

emit_uqrshrn2_v4s_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_uqrshrn2_v8h_v4s_i ¶
Source

emit_uqrshrn2_v8h_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_uqrshrn_v2s_v2d_i ¶
Source

emit_uqrshrn_v2s_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_uqrshrn_v4h_v4s_i ¶
Source

emit_uqrshrn_v4h_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_uqrshrn_v8b_v8h_i ¶
Source

emit_uqrshrn_v8b_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_uqshrn ¶
Source

emit_uqshrn :: emit_uqshrn_v8b_v8h_i

emit_uqshrn2 ¶
Source

emit_uqshrn2 :: emit_uqshrn2_v16b_v8h_i

emit_uqshrn2_v16b_v8h_i ¶
Source

emit_uqshrn2_v16b_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_uqshrn2_v4s_v2d_i ¶
Source

emit_uqshrn2_v4s_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_uqshrn2_v8h_v4s_i ¶
Source

emit_uqshrn2_v8h_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_uqshrn_v2s_v2d_i ¶
Source

emit_uqshrn_v2s_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_uqshrn_v4h_v4s_i ¶
Source

emit_uqshrn_v4h_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_uqshrn_v8b_v8h_i ¶
Source

emit_uqshrn_v8b_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_uqsub_v16b_v16b_v16b ¶
Source

emit_uqsub_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uqsub_v2d_v2d_v2d ¶
Source

emit_uqsub_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uqsub_v2s_v2s_v2s ¶
Source

emit_uqsub_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uqsub_v4h_v4h_v4h ¶
Source

emit_uqsub_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uqsub_v4s_v4s_v4s ¶
Source

emit_uqsub_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uqsub_v8b_v8b_v8b ¶
Source

emit_uqsub_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_uqsub

emit_uqsub_v8h_v8h_v8h ¶
Source

emit_uqsub_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uqsub_zb_zb_zb ¶
Source

emit_uqsub_zb_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_uqsub

emit_uqsub_zd_zd_zd ¶
Source

emit_uqsub_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_uqsub_zh_zh_zh ¶
Source

emit_uqsub_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_uqsub_zs_zs_zs ¶
Source

emit_uqsub_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_uqxtn ¶
Source

emit_uqxtn :: emit_uqxtn_v8b_v8h

emit_uqxtn2 ¶
Source

emit_uqxtn2 :: emit_uqxtn2_v16b_v8h

emit_uqxtn2_v16b_v8h ¶
Source

emit_uqxtn2_v16b_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uqxtn2_v4s_v2d ¶
Source

emit_uqxtn2_v4s_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uqxtn2_v8h_v4s ¶
Source

emit_uqxtn2_v8h_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uqxtn_v2s_v2d ¶
Source

emit_uqxtn_v2s_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uqxtn_v4h_v4s ¶
Source

emit_uqxtn_v4h_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uqxtn_v8b_v8h ¶
Source

emit_uqxtn_v8b_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_urecpe ¶
Source

emit_urecpe :: emit_urecpe_v2s_v2s

emit_urecpe_v2s_v2s ¶
Source

emit_urecpe_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_urecpe_v4s_v4s ¶
Source

emit_urecpe_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_urhadd ¶
Source

emit_urhadd :: emit_urhadd_v8b_v8b_v8b

emit_urhadd_v16b_v16b_v16b ¶
Source

emit_urhadd_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_urhadd_v2s_v2s_v2s ¶
Source

emit_urhadd_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_urhadd_v4h_v4h_v4h ¶
Source

emit_urhadd_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_urhadd_v4s_v4s_v4s ¶
Source

emit_urhadd_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_urhadd_v8b_v8b_v8b ¶
Source

emit_urhadd_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_urhadd_v8h_v8h_v8h ¶
Source

emit_urhadd_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_urshl ¶
Source

emit_urshl :: emit_urshl_v8b_v8b_v8b

emit_urshl_v16b_v16b_v16b ¶
Source

emit_urshl_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_urshl_v2d_v2d_v2d ¶
Source

emit_urshl_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_urshl_v2s_v2s_v2s ¶
Source

emit_urshl_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_urshl_v4h_v4h_v4h ¶
Source

emit_urshl_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_urshl_v4s_v4s_v4s ¶
Source

emit_urshl_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_urshl_v8b_v8b_v8b ¶
Source

emit_urshl_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_urshl_v8h_v8h_v8h ¶
Source

emit_urshl_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_urshr ¶
Source

emit_urshr :: emit_urshr_v8b_v8b_i

emit_urshr_v16b_v16b_i ¶
Source

emit_urshr_v16b_v16b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_urshr_v2d_v2d_i ¶
Source

emit_urshr_v2d_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_urshr_v2s_v2s_i ¶
Source

emit_urshr_v2s_v2s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_urshr_v4h_v4h_i ¶
Source

emit_urshr_v4h_v4h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_urshr_v4s_v4s_i ¶
Source

emit_urshr_v4s_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_urshr_v8b_v8b_i ¶
Source

emit_urshr_v8b_v8b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_urshr_v8h_v8h_i ¶
Source

emit_urshr_v8h_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ursqrte ¶
Source

emit_ursqrte :: emit_ursqrte_v2s_v2s

emit_ursqrte_v2s_v2s ¶
Source

emit_ursqrte_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_ursqrte_v4s_v4s ¶
Source

emit_ursqrte_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_ursra ¶
Source

emit_ursra :: emit_ursra_v8b_v8b_i

emit_ursra_v16b_v16b_i ¶
Source

emit_ursra_v16b_v16b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ursra_v2d_v2d_i ¶
Source

emit_ursra_v2d_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ursra_v2s_v2s_i ¶
Source

emit_ursra_v2s_v2s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ursra_v4h_v4h_i ¶
Source

emit_ursra_v4h_v4h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ursra_v4s_v4s_i ¶
Source

emit_ursra_v4s_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ursra_v8b_v8b_i ¶
Source

emit_ursra_v8b_v8b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ursra_v8h_v8h_i ¶
Source

emit_ursra_v8h_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_usdot ¶
Source

emit_usdot :: emit_usdot_v2s_v8b_v8b

emit_usdot_v2s_v8b_v8b ¶
Source

emit_usdot_v2s_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_usdot_v4s_v16b_v16b ¶
Source

emit_usdot_v4s_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_ushl ¶
Source

emit_ushl :: emit_ushl_v8b_v8b_v8b

emit_ushl_v16b_v16b_v16b ¶
Source

emit_ushl_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_ushl_v2d_v2d_v2d ¶
Source

emit_ushl_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_ushl_v2s_v2s_v2s ¶
Source

emit_ushl_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_ushl_v4h_v4h_v4h ¶
Source

emit_ushl_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_ushl_v4s_v4s_v4s ¶
Source

emit_ushl_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_ushl_v8b_v8b_v8b ¶
Source

emit_ushl_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_ushl_v8h_v8h_v8h ¶
Source

emit_ushl_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_ushll ¶
Source

emit_ushll :: emit_ushll_v8h_v8b_i

emit_ushll2 ¶
Source

emit_ushll2 :: emit_ushll2_v8h_v16b_i

emit_ushll2_v2d_v4s_i ¶
Source

emit_ushll2_v2d_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ushll2_v4s_v8h_i ¶
Source

emit_ushll2_v4s_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ushll2_v8h_v16b_i ¶
Source

emit_ushll2_v8h_v16b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ushll_v2d_v2s_i ¶
Source

emit_ushll_v2d_v2s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ushll_v4s_v4h_i ¶
Source

emit_ushll_v4s_v4h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ushll_v8h_v8b_i ¶
Source

emit_ushll_v8h_v8b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ushr ¶
Source

emit_ushr :: emit_ushr_v8b_v8b_i

emit_ushr_v16b_v16b_i ¶
Source

emit_ushr_v16b_v16b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ushr_v2d_v2d_i ¶
Source

emit_ushr_v2d_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ushr_v2s_v2s_i ¶
Source

emit_ushr_v2s_v2s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ushr_v4h_v4h_i ¶
Source

emit_ushr_v4h_v4h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ushr_v4s_v4s_i ¶
Source

emit_ushr_v4s_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ushr_v8b_v8b_i ¶
Source

emit_ushr_v8b_v8b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_ushr_v8h_v8h_i ¶
Source

emit_ushr_v8h_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_usmopa ¶
Source

emit_usmopa :: emit_usmopa_i_p_p_zb_zb

emit_usmopa_i_p_p_zb_zb ¶
Source

emit_usmopa_i_p_p_zb_zb :: proc(
	instructions: ^[dynamic]Instruction, 
	imm:          i64, 
	rz1:          u8, 
	rz2:          u8, 
	rz3:          u8, 
	rz4:          u8, 
) {…}

emit_usra ¶
Source

emit_usra :: emit_usra_v8b_v8b_i

emit_usra_v16b_v16b_i ¶
Source

emit_usra_v16b_v16b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_usra_v2d_v2d_i ¶
Source

emit_usra_v2d_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_usra_v2s_v2s_i ¶
Source

emit_usra_v2s_v2s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_usra_v4h_v4h_i ¶
Source

emit_usra_v4h_v4h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_usra_v4s_v4s_i ¶
Source

emit_usra_v4s_v4s_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_usra_v8b_v8b_i ¶
Source

emit_usra_v8b_v8b_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_usra_v8h_v8h_i ¶
Source

emit_usra_v8h_v8h_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, imm: i64) {…}

emit_usubl ¶
Source

emit_usubl :: emit_usubl_v8h_v8b_v8b

emit_usubl2 ¶
Source

emit_usubl2 :: emit_usubl2_v8h_v16b_v16b

emit_usubl2_v2d_v4s_v4s ¶
Source

emit_usubl2_v2d_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_usubl2_v4s_v8h_v8h ¶
Source

emit_usubl2_v4s_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_usubl2_v8h_v16b_v16b ¶
Source

emit_usubl2_v8h_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_usubl_v2d_v2s_v2s ¶
Source

emit_usubl_v2d_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_usubl_v4s_v4h_v4h ¶
Source

emit_usubl_v4s_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_usubl_v8h_v8b_v8b ¶
Source

emit_usubl_v8h_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_usubw ¶
Source

emit_usubw :: emit_usubw_v8h_v8h_v8b

emit_usubw2 ¶
Source

emit_usubw2 :: emit_usubw2_v8h_v8h_v16b

emit_usubw2_v2d_v2d_v4s ¶
Source

emit_usubw2_v2d_v2d_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_usubw2_v4s_v4s_v8h ¶
Source

emit_usubw2_v4s_v4s_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_usubw2_v8h_v8h_v16b ¶
Source

emit_usubw2_v8h_v8h_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_usubw_v2d_v2d_v2s ¶
Source

emit_usubw_v2d_v2d_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_usubw_v4s_v4s_v4h ¶
Source

emit_usubw_v4s_v4s_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_usubw_v8h_v8h_v8b ¶
Source

emit_usubw_v8h_v8h_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uxtb ¶
Source

emit_uxtb :: emit_uxtb_r_r

emit_uxtb_r_r ¶
Source

emit_uxtb_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uxth ¶
Source

emit_uxth :: emit_uxth_r_r

emit_uxth_r_r ¶
Source

emit_uxth_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uxtl ¶
Source

emit_uxtl :: emit_uxtl_v8h_v8b

emit_uxtl2 ¶
Source

emit_uxtl2 :: emit_uxtl2_v8h_v16b

emit_uxtl2_v2d_v4s ¶
Source

emit_uxtl2_v2d_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uxtl2_v4s_v8h ¶
Source

emit_uxtl2_v4s_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uxtl2_v8h_v16b ¶
Source

emit_uxtl2_v8h_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uxtl_v2d_v2s ¶
Source

emit_uxtl_v2d_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uxtl_v4s_v4h ¶
Source

emit_uxtl_v4s_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uxtl_v8h_v8b ¶
Source

emit_uxtl_v8h_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uxtw ¶
Source

emit_uxtw :: emit_uxtw_r_r

emit_uxtw_r_r ¶
Source

emit_uxtw_r_r :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_uzp1_pb_pb_pb ¶
Source

emit_uzp1_pb_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_uzp1_v16b_v16b_v16b ¶
Source

emit_uzp1_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uzp1_v2d_v2d_v2d ¶
Source

emit_uzp1_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uzp1_v2s_v2s_v2s ¶
Source

emit_uzp1_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uzp1_v4h_v4h_v4h ¶
Source

emit_uzp1_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uzp1_v4s_v4s_v4s ¶
Source

emit_uzp1_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uzp1_v8b_v8b_v8b ¶
Source

emit_uzp1_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_uzp1

emit_uzp1_v8h_v8h_v8h ¶
Source

emit_uzp1_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uzp1_zb_zb_zb ¶
Source

emit_uzp1_zb_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_uzp1

emit_uzp1_zd_zd_zd ¶
Source

emit_uzp1_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_uzp1_zh_zh_zh ¶
Source

emit_uzp1_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_uzp1_zs_zs_zs ¶
Source

emit_uzp1_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_uzp2_pb_pb_pb ¶
Source

emit_uzp2_pb_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_uzp2_v16b_v16b_v16b ¶
Source

emit_uzp2_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uzp2_v2d_v2d_v2d ¶
Source

emit_uzp2_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uzp2_v2s_v2s_v2s ¶
Source

emit_uzp2_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uzp2_v4h_v4h_v4h ¶
Source

emit_uzp2_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uzp2_v4s_v4s_v4s ¶
Source

emit_uzp2_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uzp2_v8b_v8b_v8b ¶
Source

emit_uzp2_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_uzp2

emit_uzp2_v8h_v8h_v8h ¶
Source

emit_uzp2_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_uzp2_zb_zb_zb ¶
Source

emit_uzp2_zb_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_uzp2

emit_uzp2_zd_zd_zd ¶
Source

emit_uzp2_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_uzp2_zh_zh_zh ¶
Source

emit_uzp2_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_uzp2_zs_zs_zs ¶
Source

emit_uzp2_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_uzp_zpb_zb_zb ¶
Source

emit_uzp_zpb_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_uzp

emit_uzp_zqb_zqb ¶
Source

emit_uzp_zqb_zqb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

Related Procedure Groups

emit_uzp

emit_wfe ¶
Source

emit_wfe :: emit_wfe_none

emit_wfe_none ¶
Source

emit_wfe_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_wfet ¶
Source

emit_wfet :: emit_wfet_r

emit_wfet_r ¶
Source

emit_wfet_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_wfi ¶
Source

emit_wfi :: emit_wfi_none

emit_wfi_none ¶
Source

emit_wfi_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_wfit ¶
Source

emit_wfit :: emit_wfit_r

emit_wfit_r ¶
Source

emit_wfit_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_whilege ¶
Source

emit_whilege :: emit_whilege_pb_r_r

emit_whilege_pb_r_r ¶
Source

emit_whilege_pb_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilege_pd_r_r ¶
Source

emit_whilege_pd_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilege_ph_r_r ¶
Source

emit_whilege_ph_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilege_ps_r_r ¶
Source

emit_whilege_ps_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilegt ¶
Source

emit_whilegt :: emit_whilegt_pb_r_r

emit_whilegt_pb_r_r ¶
Source

emit_whilegt_pb_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilegt_pd_r_r ¶
Source

emit_whilegt_pd_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilegt_ph_r_r ¶
Source

emit_whilegt_ph_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilegt_ps_r_r ¶
Source

emit_whilegt_ps_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilehi ¶
Source

emit_whilehi :: emit_whilehi_pb_r_r

emit_whilehi_pb_r_r ¶
Source

emit_whilehi_pb_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilehi_pd_r_r ¶
Source

emit_whilehi_pd_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilehi_ph_r_r ¶
Source

emit_whilehi_ph_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilehi_ps_r_r ¶
Source

emit_whilehi_ps_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilehs ¶
Source

emit_whilehs :: emit_whilehs_pb_r_r

emit_whilehs_pb_r_r ¶
Source

emit_whilehs_pb_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilehs_pd_r_r ¶
Source

emit_whilehs_pd_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilehs_ph_r_r ¶
Source

emit_whilehs_ph_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilehs_ps_r_r ¶
Source

emit_whilehs_ps_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilele ¶
Source

emit_whilele :: emit_whilele_pb_r_r

emit_whilele_pb_r_r ¶
Source

emit_whilele_pb_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilele_pd_r_r ¶
Source

emit_whilele_pd_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilele_ph_r_r ¶
Source

emit_whilele_ph_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilele_ps_r_r ¶
Source

emit_whilele_ps_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilelo ¶
Source

emit_whilelo :: emit_whilelo_pb_r_r

emit_whilelo_pb_r_r ¶
Source

emit_whilelo_pb_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilelo_pd_r_r ¶
Source

emit_whilelo_pd_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilelo_ph_r_r ¶
Source

emit_whilelo_ph_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilelo_ps_r_r ¶
Source

emit_whilelo_ps_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilels ¶
Source

emit_whilels :: emit_whilels_pb_r_r

emit_whilels_pb_r_r ¶
Source

emit_whilels_pb_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilels_pd_r_r ¶
Source

emit_whilels_pd_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilels_ph_r_r ¶
Source

emit_whilels_ph_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilels_ps_r_r ¶
Source

emit_whilels_ps_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilelt ¶
Source

emit_whilelt :: emit_whilelt_pb_r_r

emit_whilelt_pb_r_r ¶
Source

emit_whilelt_pb_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilelt_pd_r_r ¶
Source

emit_whilelt_pd_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilelt_ph_r_r ¶
Source

emit_whilelt_ph_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_whilelt_ps_r_r ¶
Source

emit_whilelt_ps_r_r :: proc(instructions: ^[dynamic]Instruction, rz: u8, src: Register, src2: Register) {…}

emit_wrffr ¶
Source

emit_wrffr :: emit_wrffr_pb

emit_wrffr_pb ¶
Source

emit_wrffr_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8) {…}

emit_xar_v2d_v2d_v2d_i ¶
Source

emit_xar_v2d_v2d_v2d_i :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register, imm: i64) {…}

Related Procedure Groups

emit_xar

emit_xar_zb_zb_zb_i ¶
Source

emit_xar_zb_zb_zb_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) {…}

emit_xar_zd_zd_zd_i ¶
Source

emit_xar_zd_zd_zd_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) {…}

Related Procedure Groups

emit_xar

emit_xar_zh_zh_zh_i ¶
Source

emit_xar_zh_zh_zh_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) {…}

emit_xar_zs_zs_zs_i ¶
Source

emit_xar_zs_zs_zs_i :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8, imm: i64) {…}

emit_xpacd ¶
Source

emit_xpacd :: emit_xpacd_r

emit_xpacd_r ¶
Source

emit_xpacd_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_xpaci ¶
Source

emit_xpaci :: emit_xpaci_r

emit_xpaci_r ¶
Source

emit_xpaci_r :: proc(instructions: ^[dynamic]Instruction, dst: Register) {…}

emit_xpaclri ¶
Source

emit_xpaclri :: emit_xpaclri_none

emit_xpaclri_none ¶
Source

emit_xpaclri_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_xtn ¶
Source

emit_xtn :: emit_xtn_v8b_v8h

emit_xtn2 ¶
Source

emit_xtn2 :: emit_xtn2_v16b_v8h

emit_xtn2_v16b_v8h ¶
Source

emit_xtn2_v16b_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_xtn2_v4s_v2d ¶
Source

emit_xtn2_v4s_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_xtn2_v8h_v4s ¶
Source

emit_xtn2_v8h_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_xtn_v2s_v2d ¶
Source

emit_xtn_v2s_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_xtn_v4h_v4s ¶
Source

emit_xtn_v4h_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_xtn_v8b_v8h ¶
Source

emit_xtn_v8b_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register) {…}

emit_yield ¶
Source

emit_yield :: emit_yield_none

emit_yield_none ¶
Source

emit_yield_none :: proc(instructions: ^[dynamic]Instruction) {…}

emit_zero ¶
Source

emit_zero :: emit_zero_i

emit_zero_i ¶
Source

emit_zero_i :: proc(instructions: ^[dynamic]Instruction, imm: i64) {…}

emit_zip1_pb_pb_pb ¶
Source

emit_zip1_pb_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_zip1_v16b_v16b_v16b ¶
Source

emit_zip1_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_zip1_v2d_v2d_v2d ¶
Source

emit_zip1_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_zip1_v2s_v2s_v2s ¶
Source

emit_zip1_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_zip1_v4h_v4h_v4h ¶
Source

emit_zip1_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_zip1_v4s_v4s_v4s ¶
Source

emit_zip1_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_zip1_v8b_v8b_v8b ¶
Source

emit_zip1_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_zip1

emit_zip1_v8h_v8h_v8h ¶
Source

emit_zip1_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_zip1_zb_zb_zb ¶
Source

emit_zip1_zb_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_zip1

emit_zip1_zd_zd_zd ¶
Source

emit_zip1_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_zip1_zh_zh_zh ¶
Source

emit_zip1_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_zip1_zs_zs_zs ¶
Source

emit_zip1_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_zip2_pb_pb_pb ¶
Source

emit_zip2_pb_pb_pb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_zip2_v16b_v16b_v16b ¶
Source

emit_zip2_v16b_v16b_v16b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_zip2_v2d_v2d_v2d ¶
Source

emit_zip2_v2d_v2d_v2d :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_zip2_v2s_v2s_v2s ¶
Source

emit_zip2_v2s_v2s_v2s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_zip2_v4h_v4h_v4h ¶
Source

emit_zip2_v4h_v4h_v4h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_zip2_v4s_v4s_v4s ¶
Source

emit_zip2_v4s_v4s_v4s :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_zip2_v8b_v8b_v8b ¶
Source

emit_zip2_v8b_v8b_v8b :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

Related Procedure Groups

emit_zip2

emit_zip2_v8h_v8h_v8h ¶
Source

emit_zip2_v8h_v8h_v8h :: proc(instructions: ^[dynamic]Instruction, dst: Register, src: Register, src2: Register) {…}

emit_zip2_zb_zb_zb ¶
Source

emit_zip2_zb_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_zip2

emit_zip2_zd_zd_zd ¶
Source

emit_zip2_zd_zd_zd :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_zip2_zh_zh_zh ¶
Source

emit_zip2_zh_zh_zh :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_zip2_zs_zs_zs ¶
Source

emit_zip2_zs_zs_zs :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

emit_zip_zpb_zb_zb ¶
Source

emit_zip_zpb_zb_zb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8, rz3: u8) {…}

Related Procedure Groups

emit_zip

emit_zip_zqb_zqb ¶
Source

emit_zip_zqb_zqb :: proc(instructions: ^[dynamic]Instruction, rz: u8, rz2: u8) {…}

Related Procedure Groups

emit_zip

encode ¶
Source

encode :: proc(
	instructions: []Instruction, 
	label_defs:   []rexcode_isa.Label_Definition, 
	code:         []u8, 
	relocs:       ^[dynamic]Relocation, 
	errors:       ^[dynamic]rexcode_isa.Error, 
	endianness:   Endianness = .LITTLE, 
	resolve:      bool = true, 
	base_address: u64 = 0, 
) -> (byte_count: u32, ok: bool) {…}

encode_bitmask_imm ¶
Source

encode_bitmask_imm :: proc "contextless" (value: u64, is_64: bool) -> (n: u8, immr: u8, imms: u8, ok: bool) {…}

encode_bitmask_imm runs the bitmask-immediate algorithm and returns the three component fields (N, immr, imms) along with a success flag.

encode_max_code_size ¶
Source

encode_max_code_size :: proc "contextless" (instructions: []Instruction) -> int {…}

encode_max_relocation_count ¶
Source

encode_max_relocation_count :: proc "contextless" (instructions: []Instruction) -> int {…}

encode_reserve ¶
Source

encode_reserve :: proc(code: ^[dynamic]u8, relocs: ^[dynamic]Relocation, instructions: []Instruction) {…}

Pre-size the caller's encode outputs (code grown by length so code[:] is a valid emit target; relocs reserved by capacity) so the encode hot path never reallocates. Allocates no new buffers; pass nil to skip either array.

fprint ¶
Source

fprint :: proc(
	fd:           ^os.File, 
	instructions: []Instruction, 
	inst_info:    []Instruction_Info, 
	label_defs:   []rexcode_isa.Label_Definition, 
	tokens:       ^[dynamic]rexcode_isa.Token = nil, 
	options:      ^rexcode_isa.Print_Options = nil, 
	label_names:  ^map[rexcode_isa.Label_Offset]string = nil, 
) {…}

fprintln ¶
Source

fprintln :: proc(
	fd:           ^os.File, 
	instructions: []Instruction, 
	inst_info:    []Instruction_Info, 
	label_defs:   []rexcode_isa.Label_Definition, 
	tokens:       ^[dynamic]rexcode_isa.Token = nil, 
	options:      ^rexcode_isa.Print_Options = nil, 
	label_names:  ^map[rexcode_isa.Label_Offset]string = nil, 
) {…}

h_reg ¶
Source

@(require_results)
h_reg :: proc "contextless" (n: u8) -> Register {…}

inst_abs_v16b_v16b ¶
Source

inst_abs_v16b_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_abs_v2d_v2d ¶
Source

inst_abs_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_abs_v2s_v2s ¶
Source

inst_abs_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_abs_v4h_v4h ¶
Source

inst_abs_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_abs_v4s_v4s ¶
Source

inst_abs_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_abs_v8b_v8b ¶
Source

inst_abs_v8b_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_abs

inst_abs_v8h_v8h ¶
Source

inst_abs_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_abs_zb_p_zb ¶
Source

inst_abs_zb_p_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_abs

inst_abs_zd_p_zd ¶
Source

inst_abs_zd_p_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_abs_zh_p_zh ¶
Source

inst_abs_zh_p_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_abs_zs_p_zs ¶
Source

inst_abs_zs_p_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_adc ¶
Source

inst_adc :: inst_adc_r_r_r

inst_adc_r_r_r ¶
Source

inst_adc_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_adclb ¶
Source

inst_adclb :: inst_adclb_zs_zs_zs

inst_adclb_zd_zd_zd ¶
Source

inst_adclb_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_adclb_zs_zs_zs ¶
Source

inst_adclb_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_adclt ¶
Source

inst_adclt :: inst_adclt_zs_zs_zs

inst_adclt_zd_zd_zd ¶
Source

inst_adclt_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_adclt_zs_zs_zs ¶
Source

inst_adclt_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_adcs ¶
Source

inst_adcs :: inst_adcs_r_r_r

inst_adcs_r_r_r ¶
Source

inst_adcs_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_add_r_r_ex ¶
Source

inst_add_r_r_ex :: proc "contextless" (dst: Register, src: Register, src2: Register, src2_ext: Extend, src2_amount: u8) -> Instruction {…}

Related Procedure Groups

inst_add

inst_add_r_r_i ¶
Source

inst_add_r_r_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_add

inst_add_r_r_sh ¶
Source

inst_add_r_r_sh :: proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction {…}

Related Procedure Groups

inst_add

inst_add_v16b_v16b_v16b ¶
Source

inst_add_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_add

inst_add_v2d_v2d_v2d ¶
Source

inst_add_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_add_v2s_v2s_v2s ¶
Source

inst_add_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_add_v4h_v4h_v4h ¶
Source

inst_add_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_add_v4s_v4s_v4s ¶
Source

inst_add_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_add_v8b_v8b_v8b ¶
Source

inst_add_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_add_v8h_v8h_v8h ¶
Source

inst_add_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_add_zb_p_zb_zb ¶
Source

inst_add_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_add

inst_add_zb_zb_zb ¶
Source

inst_add_zb_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_add

inst_add_zd_p_zd_zd ¶
Source

inst_add_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_add_zd_zd_zd ¶
Source

inst_add_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_add_zh_p_zh_zh ¶
Source

inst_add_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_add_zh_zh_zh ¶
Source

inst_add_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_add_zs_p_zs_zs ¶
Source

inst_add_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_add_zs_zs_zs ¶
Source

inst_add_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_addg ¶
Source

inst_addg :: inst_addg_r_r_i_i

inst_addg_r_r_i_i ¶
Source

inst_addg_r_r_i_i :: proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction {…}

inst_addha ¶
Source

inst_addha :: inst_addha_i_p_p_zs

inst_addha_i_p_p_zs ¶
Source

inst_addha_i_p_p_zs :: proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_addhn ¶
Source

inst_addhn :: inst_addhn_v8b_v8h_v8h

inst_addhn2 ¶
Source

inst_addhn2 :: inst_addhn2_v16b_v8h_v8h

inst_addhn2_v16b_v8h_v8h ¶
Source

inst_addhn2_v16b_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_addhn2_v4s_v2d_v2d ¶
Source

inst_addhn2_v4s_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_addhn2_v8h_v4s_v4s ¶
Source

inst_addhn2_v8h_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_addhn_v2s_v2d_v2d ¶
Source

inst_addhn_v2s_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_addhn_v4h_v4s_v4s ¶
Source

inst_addhn_v4h_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_addhn_v8b_v8h_v8h ¶
Source

inst_addhn_v8b_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_addp ¶
Source

inst_addp :: inst_addp_v8b_v8b_v8b

inst_addp_v16b_v16b_v16b ¶
Source

inst_addp_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_addp_v2d_v2d_v2d ¶
Source

inst_addp_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_addp_v2s_v2s_v2s ¶
Source

inst_addp_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_addp_v4h_v4h_v4h ¶
Source

inst_addp_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_addp_v4s_v4s_v4s ¶
Source

inst_addp_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_addp_v8b_v8b_v8b ¶
Source

inst_addp_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_addp_v8h_v8h_v8h ¶
Source

inst_addp_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_adds_r_r_ex ¶
Source

inst_adds_r_r_ex :: proc "contextless" (dst: Register, src: Register, src2: Register, src2_ext: Extend, src2_amount: u8) -> Instruction {…}

Related Procedure Groups

inst_adds

inst_adds_r_r_i ¶
Source

inst_adds_r_r_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_adds

inst_adds_r_r_sh ¶
Source

inst_adds_r_r_sh :: proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction {…}

Related Procedure Groups

inst_adds

inst_addv ¶
Source

inst_addv :: inst_addv_r_v8b

inst_addv_r_v16b ¶
Source

inst_addv_r_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_addv_r_v4h ¶
Source

inst_addv_r_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_addv_r_v4s ¶
Source

inst_addv_r_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_addv_r_v8b ¶
Source

inst_addv_r_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_addv_r_v8h ¶
Source

inst_addv_r_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_addva ¶
Source

inst_addva :: inst_addva_i_p_p_zs

inst_addva_i_p_p_zs ¶
Source

inst_addva_i_p_p_zs :: proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_adr ¶
Source

inst_adr :: inst_adr_r_l

inst_adr_r_l ¶
Source

inst_adr_r_l :: proc "contextless" (dst: Register, label: u32) -> Instruction {…}

inst_adrp ¶
Source

inst_adrp :: inst_adrp_r_l

inst_adrp_r_l ¶
Source

inst_adrp_r_l :: proc "contextless" (dst: Register, label: u32) -> Instruction {…}

inst_aesd_v16b_v16b ¶
Source

inst_aesd_v16b_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_aesd

inst_aesd_zb_zb_zb ¶
Source

inst_aesd_zb_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_aesd

inst_aese_v16b_v16b ¶
Source

inst_aese_v16b_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_aese

inst_aese_zb_zb_zb ¶
Source

inst_aese_zb_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_aese

inst_aesimc_v16b_v16b ¶
Source

inst_aesimc_v16b_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_aesimc

inst_aesimc_zb_zb ¶
Source

inst_aesimc_zb_zb :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

Related Procedure Groups

inst_aesimc

inst_aesmc_v16b_v16b ¶
Source

inst_aesmc_v16b_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_aesmc

inst_aesmc_zb_zb ¶
Source

inst_aesmc_zb_zb :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

Related Procedure Groups

inst_aesmc

inst_amx_clr ¶
Source

inst_amx_clr :: inst_amx_clr_none

inst_amx_clr_none ¶
Source

inst_amx_clr_none :: proc "contextless" () -> Instruction {…}

inst_amx_extrx ¶
Source

inst_amx_extrx :: inst_amx_extrx_r

inst_amx_extrx_r ¶
Source

inst_amx_extrx_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_amx_extry ¶
Source

inst_amx_extry :: inst_amx_extry_r

inst_amx_extry_r ¶
Source

inst_amx_extry_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_amx_fma16 ¶
Source

inst_amx_fma16 :: inst_amx_fma16_r

inst_amx_fma16_r ¶
Source

inst_amx_fma16_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_amx_fma32 ¶
Source

inst_amx_fma32 :: inst_amx_fma32_r

inst_amx_fma32_r ¶
Source

inst_amx_fma32_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_amx_fma64 ¶
Source

inst_amx_fma64 :: inst_amx_fma64_r

inst_amx_fma64_r ¶
Source

inst_amx_fma64_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_amx_fms16 ¶
Source

inst_amx_fms16 :: inst_amx_fms16_r

inst_amx_fms16_r ¶
Source

inst_amx_fms16_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_amx_fms32 ¶
Source

inst_amx_fms32 :: inst_amx_fms32_r

inst_amx_fms32_r ¶
Source

inst_amx_fms32_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_amx_fms64 ¶
Source

inst_amx_fms64 :: inst_amx_fms64_r

inst_amx_fms64_r ¶
Source

inst_amx_fms64_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_amx_genlut ¶
Source

inst_amx_genlut :: inst_amx_genlut_r

inst_amx_genlut_r ¶
Source

inst_amx_genlut_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_amx_ldx ¶
Source

inst_amx_ldx :: inst_amx_ldx_r

inst_amx_ldx_r ¶
Source

inst_amx_ldx_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_amx_ldy ¶
Source

inst_amx_ldy :: inst_amx_ldy_r

inst_amx_ldy_r ¶
Source

inst_amx_ldy_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_amx_ldz ¶
Source

inst_amx_ldz :: inst_amx_ldz_r

inst_amx_ldz_r ¶
Source

inst_amx_ldz_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_amx_ldzi ¶
Source

inst_amx_ldzi :: inst_amx_ldzi_r

inst_amx_ldzi_r ¶
Source

inst_amx_ldzi_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_amx_mac16 ¶
Source

inst_amx_mac16 :: inst_amx_mac16_r

inst_amx_mac16_r ¶
Source

inst_amx_mac16_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_amx_matfp ¶
Source

inst_amx_matfp :: inst_amx_matfp_r

inst_amx_matfp_r ¶
Source

inst_amx_matfp_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_amx_matint ¶
Source

inst_amx_matint :: inst_amx_matint_r

inst_amx_matint_r ¶
Source

inst_amx_matint_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_amx_set ¶
Source

inst_amx_set :: inst_amx_set_none

inst_amx_set_none ¶
Source

inst_amx_set_none :: proc "contextless" () -> Instruction {…}

inst_amx_stx ¶
Source

inst_amx_stx :: inst_amx_stx_r

inst_amx_stx_r ¶
Source

inst_amx_stx_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_amx_sty ¶
Source

inst_amx_sty :: inst_amx_sty_r

inst_amx_sty_r ¶
Source

inst_amx_sty_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_amx_stz ¶
Source

inst_amx_stz :: inst_amx_stz_r

inst_amx_stz_r ¶
Source

inst_amx_stz_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_amx_stzi ¶
Source

inst_amx_stzi :: inst_amx_stzi_r

inst_amx_stzi_r ¶
Source

inst_amx_stzi_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_amx_vecfp ¶
Source

inst_amx_vecfp :: inst_amx_vecfp_r

inst_amx_vecfp_r ¶
Source

inst_amx_vecfp_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_amx_vecint ¶
Source

inst_amx_vecint :: inst_amx_vecint_r

inst_amx_vecint_r ¶
Source

inst_amx_vecint_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_and_pb_p_pb_pb ¶
Source

inst_and_pb_p_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_and_r_r_i ¶
Source

inst_and_r_r_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_and

inst_and_r_r_sh ¶
Source

inst_and_r_r_sh :: proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction {…}

Related Procedure Groups

inst_and

inst_and_v16b_v16b_v16b ¶
Source

inst_and_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_and

inst_and_zb_p_zb_zb ¶
Source

inst_and_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_and

inst_and_zd_p_zd_zd ¶
Source

inst_and_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_and_zh_p_zh_zh ¶
Source

inst_and_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_and_zs_p_zs_zs ¶
Source

inst_and_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_ands_pb_p_pb_pb ¶
Source

inst_ands_pb_p_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_ands

inst_ands_r_r_i ¶
Source

inst_ands_r_r_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_ands

inst_ands_r_r_sh ¶
Source

inst_ands_r_r_sh :: proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction {…}

Related Procedure Groups

inst_ands

inst_asr_r_r_i ¶
Source

inst_asr_r_r_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_asr

inst_asr_r_r_r ¶
Source

inst_asr_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_asr

inst_asr_zb_p_zb_zb ¶
Source

inst_asr_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_asr

inst_asr_zd_p_zd_zd ¶
Source

inst_asr_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_asr_zh_p_zh_zh ¶
Source

inst_asr_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_asr_zs_p_zs_zs ¶
Source

inst_asr_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_asrr ¶
Source

inst_asrr :: inst_asrr_zb_p_zb_zb

inst_asrr_zb_p_zb_zb ¶
Source

inst_asrr_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_asrr_zd_p_zd_zd ¶
Source

inst_asrr_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_asrr_zh_p_zh_zh ¶
Source

inst_asrr_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_asrr_zs_p_zs_zs ¶
Source

inst_asrr_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_at_s12e0r ¶
Source

inst_at_s12e0r :: inst_at_s12e0r_r

inst_at_s12e0r_r ¶
Source

inst_at_s12e0r_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_at_s12e0w ¶
Source

inst_at_s12e0w :: inst_at_s12e0w_r

inst_at_s12e0w_r ¶
Source

inst_at_s12e0w_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_at_s12e1r ¶
Source

inst_at_s12e1r :: inst_at_s12e1r_r

inst_at_s12e1r_r ¶
Source

inst_at_s12e1r_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_at_s12e1w ¶
Source

inst_at_s12e1w :: inst_at_s12e1w_r

inst_at_s12e1w_r ¶
Source

inst_at_s12e1w_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_at_s1e0r ¶
Source

inst_at_s1e0r :: inst_at_s1e0r_r

inst_at_s1e0r_r ¶
Source

inst_at_s1e0r_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_at_s1e0w ¶
Source

inst_at_s1e0w :: inst_at_s1e0w_r

inst_at_s1e0w_r ¶
Source

inst_at_s1e0w_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_at_s1e1a ¶
Source

inst_at_s1e1a :: inst_at_s1e1a_r

inst_at_s1e1a_r ¶
Source

inst_at_s1e1a_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_at_s1e1r ¶
Source

inst_at_s1e1r :: inst_at_s1e1r_r

inst_at_s1e1r_r ¶
Source

inst_at_s1e1r_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_at_s1e1w ¶
Source

inst_at_s1e1w :: inst_at_s1e1w_r

inst_at_s1e1w_r ¶
Source

inst_at_s1e1w_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_at_s1e2r ¶
Source

inst_at_s1e2r :: inst_at_s1e2r_r

inst_at_s1e2r_r ¶
Source

inst_at_s1e2r_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_at_s1e2w ¶
Source

inst_at_s1e2w :: inst_at_s1e2w_r

inst_at_s1e2w_r ¶
Source

inst_at_s1e2w_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_at_s1e3r ¶
Source

inst_at_s1e3r :: inst_at_s1e3r_r

inst_at_s1e3r_r ¶
Source

inst_at_s1e3r_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_at_s1e3w ¶
Source

inst_at_s1e3w :: inst_at_s1e3w_r

inst_at_s1e3w_r ¶
Source

inst_at_s1e3w_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_autda ¶
Source

inst_autda :: inst_autda_r_r

inst_autda_r_r ¶
Source

inst_autda_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_autdb ¶
Source

inst_autdb :: inst_autdb_r_r

inst_autdb_r_r ¶
Source

inst_autdb_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_autdza ¶
Source

inst_autdza :: inst_autdza_r

inst_autdza_r ¶
Source

inst_autdza_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_autdzb ¶
Source

inst_autdzb :: inst_autdzb_r

inst_autdzb_r ¶
Source

inst_autdzb_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_autia ¶
Source

inst_autia :: inst_autia_r_r

inst_autia1716 ¶
Source

inst_autia1716 :: inst_autia1716_none

inst_autia1716_none ¶
Source

inst_autia1716_none :: proc "contextless" () -> Instruction {…}

inst_autia_r_r ¶
Source

inst_autia_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_autiasp ¶
Source

inst_autiasp :: inst_autiasp_none

inst_autiasp_none ¶
Source

inst_autiasp_none :: proc "contextless" () -> Instruction {…}

inst_autib ¶
Source

inst_autib :: inst_autib_r_r

inst_autib1716 ¶
Source

inst_autib1716 :: inst_autib1716_none

inst_autib1716_none ¶
Source

inst_autib1716_none :: proc "contextless" () -> Instruction {…}

inst_autib_r_r ¶
Source

inst_autib_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_autibsp ¶
Source

inst_autibsp :: inst_autibsp_none

inst_autibsp_none ¶
Source

inst_autibsp_none :: proc "contextless" () -> Instruction {…}

inst_autiza ¶
Source

inst_autiza :: inst_autiza_r

inst_autiza_r ¶
Source

inst_autiza_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_autizb ¶
Source

inst_autizb :: inst_autizb_r

inst_autizb_r ¶
Source

inst_autizb_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_b ¶
Source

inst_b :: inst_b_l

inst_b_al ¶
Source

inst_b_al :: inst_b_al_l

inst_b_al_l ¶
Source

inst_b_al_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_b_cc ¶
Source

inst_b_cc :: inst_b_cc_l

inst_b_cc_l ¶
Source

inst_b_cc_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_b_cs ¶
Source

inst_b_cs :: inst_b_cs_l

inst_b_cs_l ¶
Source

inst_b_cs_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_b_eq ¶
Source

inst_b_eq :: inst_b_eq_l

inst_b_eq_l ¶
Source

inst_b_eq_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_b_ge ¶
Source

inst_b_ge :: inst_b_ge_l

inst_b_ge_l ¶
Source

inst_b_ge_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_b_gt ¶
Source

inst_b_gt :: inst_b_gt_l

inst_b_gt_l ¶
Source

inst_b_gt_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_b_hi ¶
Source

inst_b_hi :: inst_b_hi_l

inst_b_hi_l ¶
Source

inst_b_hi_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_b_l ¶
Source

inst_b_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_b_le ¶
Source

inst_b_le :: inst_b_le_l

inst_b_le_l ¶
Source

inst_b_le_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_b_ls ¶
Source

inst_b_ls :: inst_b_ls_l

inst_b_ls_l ¶
Source

inst_b_ls_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_b_lt ¶
Source

inst_b_lt :: inst_b_lt_l

inst_b_lt_l ¶
Source

inst_b_lt_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_b_mi ¶
Source

inst_b_mi :: inst_b_mi_l

inst_b_mi_l ¶
Source

inst_b_mi_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_b_ne ¶
Source

inst_b_ne :: inst_b_ne_l

inst_b_ne_l ¶
Source

inst_b_ne_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_b_nv ¶
Source

inst_b_nv :: inst_b_nv_l

inst_b_nv_l ¶
Source

inst_b_nv_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_b_pl ¶
Source

inst_b_pl :: inst_b_pl_l

inst_b_pl_l ¶
Source

inst_b_pl_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_b_vc ¶
Source

inst_b_vc :: inst_b_vc_l

inst_b_vc_l ¶
Source

inst_b_vc_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_b_vs ¶
Source

inst_b_vs :: inst_b_vs_l

inst_b_vs_l ¶
Source

inst_b_vs_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_bc_al ¶
Source

inst_bc_al :: inst_bc_al_l

inst_bc_al_l ¶
Source

inst_bc_al_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_bc_cc ¶
Source

inst_bc_cc :: inst_bc_cc_l

inst_bc_cc_l ¶
Source

inst_bc_cc_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_bc_cs ¶
Source

inst_bc_cs :: inst_bc_cs_l

inst_bc_cs_l ¶
Source

inst_bc_cs_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_bc_eq ¶
Source

inst_bc_eq :: inst_bc_eq_l

inst_bc_eq_l ¶
Source

inst_bc_eq_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_bc_ge ¶
Source

inst_bc_ge :: inst_bc_ge_l

inst_bc_ge_l ¶
Source

inst_bc_ge_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_bc_gt ¶
Source

inst_bc_gt :: inst_bc_gt_l

inst_bc_gt_l ¶
Source

inst_bc_gt_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_bc_hi ¶
Source

inst_bc_hi :: inst_bc_hi_l

inst_bc_hi_l ¶
Source

inst_bc_hi_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_bc_le ¶
Source

inst_bc_le :: inst_bc_le_l

inst_bc_le_l ¶
Source

inst_bc_le_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_bc_ls ¶
Source

inst_bc_ls :: inst_bc_ls_l

inst_bc_ls_l ¶
Source

inst_bc_ls_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_bc_lt ¶
Source

inst_bc_lt :: inst_bc_lt_l

inst_bc_lt_l ¶
Source

inst_bc_lt_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_bc_mi ¶
Source

inst_bc_mi :: inst_bc_mi_l

inst_bc_mi_l ¶
Source

inst_bc_mi_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_bc_ne ¶
Source

inst_bc_ne :: inst_bc_ne_l

inst_bc_ne_l ¶
Source

inst_bc_ne_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_bc_nv ¶
Source

inst_bc_nv :: inst_bc_nv_l

inst_bc_nv_l ¶
Source

inst_bc_nv_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_bc_pl ¶
Source

inst_bc_pl :: inst_bc_pl_l

inst_bc_pl_l ¶
Source

inst_bc_pl_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_bc_vc ¶
Source

inst_bc_vc :: inst_bc_vc_l

inst_bc_vc_l ¶
Source

inst_bc_vc_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_bc_vs ¶
Source

inst_bc_vs :: inst_bc_vs_l

inst_bc_vs_l ¶
Source

inst_bc_vs_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_bcax_v16b_v16b_v16b_v16b ¶
Source

inst_bcax_v16b_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction {…}

Related Procedure Groups

inst_bcax

inst_bcax_zd_zd_zd_zd ¶
Source

inst_bcax_zd_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_bcax

inst_bfadd_zh_p_zh_zh ¶
Source

inst_bfadd_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_bfadd

inst_bfadd_zh_zh_zh ¶
Source

inst_bfadd_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_bfadd

inst_bfclamp ¶
Source

inst_bfclamp :: inst_bfclamp_zh_zh_zh

inst_bfclamp_zh_zh_zh ¶
Source

inst_bfclamp_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_bfcvt_r_r ¶
Source

inst_bfcvt_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_bfcvt

inst_bfcvt_zh_p_zs ¶
Source

inst_bfcvt_zh_p_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_bfcvt

inst_bfcvtn ¶
Source

inst_bfcvtn :: inst_bfcvtn_v4h_v4s

inst_bfcvtn2 ¶
Source

inst_bfcvtn2 :: inst_bfcvtn2_v8h_v4s

inst_bfcvtn2_v8h_v4s ¶
Source

inst_bfcvtn2_v8h_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_bfcvtn_v4h_v4s ¶
Source

inst_bfcvtn_v4h_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_bfcvtnt ¶
Source

inst_bfcvtnt :: inst_bfcvtnt_zh_p_zs

inst_bfcvtnt_zh_p_zs ¶
Source

inst_bfcvtnt_zh_p_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_bfdot ¶
Source

inst_bfdot :: inst_bfdot_v4s_v8h_v8h

inst_bfdot_v4s_v8h_v8h ¶
Source

inst_bfdot_v4s_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_bfmaxnm ¶
Source

inst_bfmaxnm :: inst_bfmaxnm_zh_p_zh_zh

inst_bfmaxnm_zh_p_zh_zh ¶
Source

inst_bfmaxnm_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_bfminnm ¶
Source

inst_bfminnm :: inst_bfminnm_zh_p_zh_zh

inst_bfminnm_zh_p_zh_zh ¶
Source

inst_bfminnm_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_bfmla ¶
Source

inst_bfmla :: inst_bfmla_zh_p_zh_zh

inst_bfmla_zh_p_zh_zh ¶
Source

inst_bfmla_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_bfmlalb ¶
Source

inst_bfmlalb :: inst_bfmlalb_v4s_v8h_v8h

inst_bfmlalb_v4s_v8h_v8h ¶
Source

inst_bfmlalb_v4s_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_bfmlalt ¶
Source

inst_bfmlalt :: inst_bfmlalt_v4s_v8h_v8h

inst_bfmlalt_v4s_v8h_v8h ¶
Source

inst_bfmlalt_v4s_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_bfmls ¶
Source

inst_bfmls :: inst_bfmls_zh_p_zh_zh

inst_bfmls_zh_p_zh_zh ¶
Source

inst_bfmls_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_bfmmla ¶
Source

inst_bfmmla :: inst_bfmmla_v4s_v8h_v8h

inst_bfmmla_v4s_v8h_v8h ¶
Source

inst_bfmmla_v4s_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_bfmopa ¶
Source

inst_bfmopa :: inst_bfmopa_i_p_p_zh_zh

inst_bfmopa_i_p_p_zh_zh ¶
Source

inst_bfmopa_i_p_p_zh_zh :: proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_bfmops ¶
Source

inst_bfmops :: inst_bfmops_i_p_p_zh_zh

inst_bfmops_i_p_p_zh_zh ¶
Source

inst_bfmops_i_p_p_zh_zh :: proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_bfmul_zh_p_zh_zh ¶
Source

inst_bfmul_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_bfmul

inst_bfmul_zh_zh_zh ¶
Source

inst_bfmul_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_bfmul

inst_bfsub_zh_p_zh_zh ¶
Source

inst_bfsub_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_bfsub

inst_bfsub_zh_zh_zh ¶
Source

inst_bfsub_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_bfsub

inst_bic_pb_p_pb_pb ¶
Source

inst_bic_pb_p_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_bic_r_r_sh ¶
Source

inst_bic_r_r_sh :: proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction {…}

Related Procedure Groups

inst_bic

inst_bic_v16b_v16b_v16b ¶
Source

inst_bic_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_bic

inst_bic_zb_p_zb_zb ¶
Source

inst_bic_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_bic

inst_bic_zd_p_zd_zd ¶
Source

inst_bic_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_bic_zh_p_zh_zh ¶
Source

inst_bic_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_bic_zs_p_zs_zs ¶
Source

inst_bic_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_bics_pb_p_pb_pb ¶
Source

inst_bics_pb_p_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_bics

inst_bics_r_r_sh ¶
Source

inst_bics_r_r_sh :: proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction {…}

Related Procedure Groups

inst_bics

inst_bif ¶
Source

inst_bif :: inst_bif_v16b_v16b_v16b

inst_bif_v16b_v16b_v16b ¶
Source

inst_bif_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_bit ¶
Source

inst_bit :: inst_bit_v16b_v16b_v16b

inst_bit_v16b_v16b_v16b ¶
Source

inst_bit_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_bl ¶
Source

inst_bl :: inst_bl_l

inst_bl_l ¶
Source

inst_bl_l :: proc "contextless" (label: u32) -> Instruction {…}

inst_blr ¶
Source

inst_blr :: inst_blr_r

inst_blr_r ¶
Source

inst_blr_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_blraa ¶
Source

inst_blraa :: inst_blraa_r_r

inst_blraa_r_r ¶
Source

inst_blraa_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_blraaz ¶
Source

inst_blraaz :: inst_blraaz_r

inst_blraaz_r ¶
Source

inst_blraaz_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_blrab ¶
Source

inst_blrab :: inst_blrab_r_r

inst_blrab_r_r ¶
Source

inst_blrab_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_blrabz ¶
Source

inst_blrabz :: inst_blrabz_r

inst_blrabz_r ¶
Source

inst_blrabz_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_br ¶
Source

inst_br :: inst_br_r

inst_br_r ¶
Source

inst_br_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_braa ¶
Source

inst_braa :: inst_braa_r_r

inst_braa_r_r ¶
Source

inst_braa_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_braaz ¶
Source

inst_braaz :: inst_braaz_r

inst_braaz_r ¶
Source

inst_braaz_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_brab ¶
Source

inst_brab :: inst_brab_r_r

inst_brab_r_r ¶
Source

inst_brab_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_brabz ¶
Source

inst_brabz :: inst_brabz_r

inst_brabz_r ¶
Source

inst_brabz_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_branch ¶
Source

@(require_results)
inst_branch :: proc "contextless" (m: Mnemonic, label_id: u32) -> Instruction {…}

PC-relative branch (B, BL).

inst_brk ¶
Source

inst_brk :: inst_brk_i

inst_brk_i ¶
Source

inst_brk_i :: proc "contextless" (imm: i64) -> Instruction {…}

inst_brka ¶
Source

inst_brka :: inst_brka_pb_p_pb

inst_brka_pb_p_pb ¶
Source

inst_brka_pb_p_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_brkas ¶
Source

inst_brkas :: inst_brkas_pb_p_pb

inst_brkas_pb_p_pb ¶
Source

inst_brkas_pb_p_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_brkb ¶
Source

inst_brkb :: inst_brkb_pb_p_pb

inst_brkb_pb_p_pb ¶
Source

inst_brkb_pb_p_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_brkbs ¶
Source

inst_brkbs :: inst_brkbs_pb_p_pb

inst_brkbs_pb_p_pb ¶
Source

inst_brkbs_pb_p_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_brkn ¶
Source

inst_brkn :: inst_brkn_pb_p_pb_pb

inst_brkn_pb_p_pb_pb ¶
Source

inst_brkn_pb_p_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_brkpa ¶
Source

inst_brkpa :: inst_brkpa_pb_p_pb_pb

inst_brkpa_pb_p_pb_pb ¶
Source

inst_brkpa_pb_p_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_brkpb ¶
Source

inst_brkpb :: inst_brkpb_pb_p_pb_pb

inst_brkpb_pb_p_pb_pb ¶
Source

inst_brkpb_pb_p_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_bsl1n ¶
Source

inst_bsl1n :: inst_bsl1n_zd_zd_zd_zd

inst_bsl1n_zd_zd_zd_zd ¶
Source

inst_bsl1n_zd_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_bsl2n ¶
Source

inst_bsl2n :: inst_bsl2n_zd_zd_zd_zd

inst_bsl2n_zd_zd_zd_zd ¶
Source

inst_bsl2n_zd_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_bsl_v16b_v16b_v16b ¶
Source

inst_bsl_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_bsl

inst_bsl_zd_zd_zd_zd ¶
Source

inst_bsl_zd_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_bsl

inst_bti ¶
Source

inst_bti :: inst_bti_none

inst_bti_c ¶
Source

inst_bti_c :: inst_bti_c_none

inst_bti_c_none ¶
Source

inst_bti_c_none :: proc "contextless" () -> Instruction {…}

inst_bti_j ¶
Source

inst_bti_j :: inst_bti_j_none

inst_bti_j_none ¶
Source

inst_bti_j_none :: proc "contextless" () -> Instruction {…}

inst_bti_jc ¶
Source

inst_bti_jc :: inst_bti_jc_none

inst_bti_jc_none ¶
Source

inst_bti_jc_none :: proc "contextless" () -> Instruction {…}

inst_bti_none ¶
Source

inst_bti_none :: proc "contextless" () -> Instruction {…}

inst_cas ¶
Source

inst_cas :: inst_cas_r_r_m

inst_cas_r_r_m ¶
Source

inst_cas_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_casa ¶
Source

inst_casa :: inst_casa_r_r_m

inst_casa_r_r_m ¶
Source

inst_casa_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_casab ¶
Source

inst_casab :: inst_casab_r_r_m

inst_casab_r_r_m ¶
Source

inst_casab_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_casah ¶
Source

inst_casah :: inst_casah_r_r_m

inst_casah_r_r_m ¶
Source

inst_casah_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_casal ¶
Source

inst_casal :: inst_casal_r_r_m

inst_casal_r_r_m ¶
Source

inst_casal_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_casalb ¶
Source

inst_casalb :: inst_casalb_r_r_m

inst_casalb_r_r_m ¶
Source

inst_casalb_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_casalh ¶
Source

inst_casalh :: inst_casalh_r_r_m

inst_casalh_r_r_m ¶
Source

inst_casalh_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_casb ¶
Source

inst_casb :: inst_casb_r_r_m

inst_casb_r_r_m ¶
Source

inst_casb_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_cash ¶
Source

inst_cash :: inst_cash_r_r_m

inst_cash_r_r_m ¶
Source

inst_cash_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_casl ¶
Source

inst_casl :: inst_casl_r_r_m

inst_casl_r_r_m ¶
Source

inst_casl_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_caslb ¶
Source

inst_caslb :: inst_caslb_r_r_m

inst_caslb_r_r_m ¶
Source

inst_caslb_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_caslh ¶
Source

inst_caslh :: inst_caslh_r_r_m

inst_caslh_r_r_m ¶
Source

inst_caslh_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_casp ¶
Source

inst_casp :: inst_casp_r_r_m

inst_casp_r_r_m ¶
Source

inst_casp_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_caspa ¶
Source

inst_caspa :: inst_caspa_r_r_m

inst_caspa_r_r_m ¶
Source

inst_caspa_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_caspal ¶
Source

inst_caspal :: inst_caspal_r_r_m

inst_caspal_r_r_m ¶
Source

inst_caspal_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_caspl ¶
Source

inst_caspl :: inst_caspl_r_r_m

inst_caspl_r_r_m ¶
Source

inst_caspl_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_cbnz ¶
Source

inst_cbnz :: inst_cbnz_r_l

inst_cbnz_r_l ¶
Source

inst_cbnz_r_l :: proc "contextless" (dst: Register, label: u32) -> Instruction {…}

inst_cbz ¶
Source

inst_cbz :: inst_cbz_r_l

inst_cbz_r_l ¶
Source

inst_cbz_r_l :: proc "contextless" (dst: Register, label: u32) -> Instruction {…}

inst_ccmn_r_i_i_c ¶
Source

inst_ccmn_r_i_i_c :: proc "contextless" (dst: Register, imm: i64, imm2: i64, cond: Cond) -> Instruction {…}

Related Procedure Groups

inst_ccmn

inst_ccmn_r_r_i_c ¶
Source

inst_ccmn_r_r_i_c :: proc "contextless" (dst: Register, src: Register, imm: i64, cond: Cond) -> Instruction {…}

Related Procedure Groups

inst_ccmn

inst_ccmp_r_i_i_c ¶
Source

inst_ccmp_r_i_i_c :: proc "contextless" (dst: Register, imm: i64, imm2: i64, cond: Cond) -> Instruction {…}

Related Procedure Groups

inst_ccmp

inst_ccmp_r_r_i_c ¶
Source

inst_ccmp_r_r_i_c :: proc "contextless" (dst: Register, src: Register, imm: i64, cond: Cond) -> Instruction {…}

Related Procedure Groups

inst_ccmp

inst_cinc ¶
Source

inst_cinc :: inst_cinc_r_r_c

inst_cinc_r_r_c ¶
Source

inst_cinc_r_r_c :: proc "contextless" (dst: Register, src: Register, cond: Cond) -> Instruction {…}

inst_cinv ¶
Source

inst_cinv :: inst_cinv_r_r_c

inst_cinv_r_r_c ¶
Source

inst_cinv_r_r_c :: proc "contextless" (dst: Register, src: Register, cond: Cond) -> Instruction {…}

inst_cls_r_r ¶
Source

inst_cls_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_cls

inst_cls_v16b_v16b ¶
Source

inst_cls_v16b_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_cls_v2s_v2s ¶
Source

inst_cls_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_cls_v4h_v4h ¶
Source

inst_cls_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_cls_v4s_v4s ¶
Source

inst_cls_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_cls_v8b_v8b ¶
Source

inst_cls_v8b_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_cls_v8h_v8h ¶
Source

inst_cls_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_cls_zb_p_zb ¶
Source

inst_cls_zb_p_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_cls

inst_cls_zd_p_zd ¶
Source

inst_cls_zd_p_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_cls_zh_p_zh ¶
Source

inst_cls_zh_p_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_cls_zs_p_zs ¶
Source

inst_cls_zs_p_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_clz_r_r ¶
Source

inst_clz_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_clz

inst_clz_v16b_v16b ¶
Source

inst_clz_v16b_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_clz_v2s_v2s ¶
Source

inst_clz_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_clz_v4h_v4h ¶
Source

inst_clz_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_clz_v4s_v4s ¶
Source

inst_clz_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_clz_v8b_v8b ¶
Source

inst_clz_v8b_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_clz_v8h_v8h ¶
Source

inst_clz_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_clz_zb_p_zb ¶
Source

inst_clz_zb_p_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_clz

inst_clz_zd_p_zd ¶
Source

inst_clz_zd_p_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_clz_zh_p_zh ¶
Source

inst_clz_zh_p_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_clz_zs_p_zs ¶
Source

inst_clz_zs_p_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_cmeq ¶
Source

inst_cmeq :: inst_cmeq_v16b_v16b_v16b

inst_cmeq_v16b_v16b_v16b ¶
Source

inst_cmeq_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmeq_v2d_v2d_v2d ¶
Source

inst_cmeq_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmeq_v4s_v4s_v4s ¶
Source

inst_cmeq_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmeq_v8h_v8h_v8h ¶
Source

inst_cmeq_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmge ¶
Source

inst_cmge :: inst_cmge_v8b_v8b_v8b

inst_cmge_v16b_v16b_v16b ¶
Source

inst_cmge_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmge_v2d_v2d_v2d ¶
Source

inst_cmge_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmge_v2s_v2s_v2s ¶
Source

inst_cmge_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmge_v4h_v4h_v4h ¶
Source

inst_cmge_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmge_v4s_v4s_v4s ¶
Source

inst_cmge_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmge_v8b_v8b_v8b ¶
Source

inst_cmge_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmge_v8h_v8h_v8h ¶
Source

inst_cmge_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmgt ¶
Source

inst_cmgt :: inst_cmgt_v16b_v16b_v16b

inst_cmgt_v16b_v16b_v16b ¶
Source

inst_cmgt_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmgt_v2d_v2d_v2d ¶
Source

inst_cmgt_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmhi ¶
Source

inst_cmhi :: inst_cmhi_v16b_v16b_v16b

inst_cmhi_v16b_v16b_v16b ¶
Source

inst_cmhi_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmhi_v2d_v2d_v2d ¶
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inst_cmhi_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmhs ¶
Source

inst_cmhs :: inst_cmhs_v8b_v8b_v8b

inst_cmhs_v16b_v16b_v16b ¶
Source

inst_cmhs_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmhs_v2d_v2d_v2d ¶
Source

inst_cmhs_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmhs_v2s_v2s_v2s ¶
Source

inst_cmhs_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmhs_v4h_v4h_v4h ¶
Source

inst_cmhs_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmhs_v4s_v4s_v4s ¶
Source

inst_cmhs_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmhs_v8b_v8b_v8b ¶
Source

inst_cmhs_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmhs_v8h_v8h_v8h ¶
Source

inst_cmhs_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmle ¶
Source

inst_cmle :: inst_cmle_v8b_v8b

inst_cmle_v16b_v16b ¶
Source

inst_cmle_v16b_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_cmle_v2d_v2d ¶
Source

inst_cmle_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_cmle_v2s_v2s ¶
Source

inst_cmle_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_cmle_v4h_v4h ¶
Source

inst_cmle_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_cmle_v4s_v4s ¶
Source

inst_cmle_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_cmle_v8b_v8b ¶
Source

inst_cmle_v8b_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_cmle_v8h_v8h ¶
Source

inst_cmle_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_cmlt ¶
Source

inst_cmlt :: inst_cmlt_v8b_v8b

inst_cmlt_v16b_v16b ¶
Source

inst_cmlt_v16b_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_cmlt_v2d_v2d ¶
Source

inst_cmlt_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_cmlt_v2s_v2s ¶
Source

inst_cmlt_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_cmlt_v4h_v4h ¶
Source

inst_cmlt_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_cmlt_v4s_v4s ¶
Source

inst_cmlt_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_cmlt_v8b_v8b ¶
Source

inst_cmlt_v8b_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_cmlt_v8h_v8h ¶
Source

inst_cmlt_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_cmn_r_ex ¶
Source

inst_cmn_r_ex :: proc "contextless" (dst: Register, src: Register, src_ext: Extend, src_amount: u8) -> Instruction {…}

Related Procedure Groups

inst_cmn

inst_cmn_r_i ¶
Source

inst_cmn_r_i :: proc "contextless" (dst: Register, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_cmn

inst_cmn_r_sh ¶
Source

inst_cmn_r_sh :: proc "contextless" (dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) -> Instruction {…}

Related Procedure Groups

inst_cmn

inst_cmp_r_ex ¶
Source

inst_cmp_r_ex :: proc "contextless" (dst: Register, src: Register, src_ext: Extend, src_amount: u8) -> Instruction {…}

Related Procedure Groups

inst_cmp

inst_cmp_r_i ¶
Source

inst_cmp_r_i :: proc "contextless" (dst: Register, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_cmp

inst_cmp_r_sh ¶
Source

inst_cmp_r_sh :: proc "contextless" (dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) -> Instruction {…}

Related Procedure Groups

inst_cmp

inst_cmpeq ¶
Source

inst_cmpeq :: inst_cmpeq_pb_p_zb_zb

inst_cmpeq_pb_p_zb_zb ¶
Source

inst_cmpeq_pb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmpeq_pd_p_zd_zd ¶
Source

inst_cmpeq_pd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmpeq_ph_p_zh_zh ¶
Source

inst_cmpeq_ph_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmpeq_ps_p_zs_zs ¶
Source

inst_cmpeq_ps_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmpge ¶
Source

inst_cmpge :: inst_cmpge_pb_p_zb_zb

inst_cmpge_pb_p_zb_zb ¶
Source

inst_cmpge_pb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmpge_pd_p_zd_zd ¶
Source

inst_cmpge_pd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmpge_ph_p_zh_zh ¶
Source

inst_cmpge_ph_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmpge_ps_p_zs_zs ¶
Source

inst_cmpge_ps_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmpgt ¶
Source

inst_cmpgt :: inst_cmpgt_pb_p_zb_zb

inst_cmpgt_pb_p_zb_zb ¶
Source

inst_cmpgt_pb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmpgt_pd_p_zd_zd ¶
Source

inst_cmpgt_pd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmpgt_ph_p_zh_zh ¶
Source

inst_cmpgt_ph_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmpgt_ps_p_zs_zs ¶
Source

inst_cmpgt_ps_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmphi ¶
Source

inst_cmphi :: inst_cmphi_pb_p_zb_zb

inst_cmphi_pb_p_zb_zb ¶
Source

inst_cmphi_pb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmphi_pd_p_zd_zd ¶
Source

inst_cmphi_pd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmphi_ph_p_zh_zh ¶
Source

inst_cmphi_ph_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmphi_ps_p_zs_zs ¶
Source

inst_cmphi_ps_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmphs ¶
Source

inst_cmphs :: inst_cmphs_pb_p_zb_zb

inst_cmphs_pb_p_zb_zb ¶
Source

inst_cmphs_pb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmphs_pd_p_zd_zd ¶
Source

inst_cmphs_pd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmphs_ph_p_zh_zh ¶
Source

inst_cmphs_ph_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmphs_ps_p_zs_zs ¶
Source

inst_cmphs_ps_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmple ¶
Source

inst_cmple :: inst_cmple_pb_p_zb_zb

inst_cmple_pb_p_zb_zb ¶
Source

inst_cmple_pb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmple_pd_p_zd_zd ¶
Source

inst_cmple_pd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmple_ph_p_zh_zh ¶
Source

inst_cmple_ph_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmple_ps_p_zs_zs ¶
Source

inst_cmple_ps_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmplo ¶
Source

inst_cmplo :: inst_cmplo_pb_p_zb_zb

inst_cmplo_pb_p_zb_zb ¶
Source

inst_cmplo_pb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmplo_pd_p_zd_zd ¶
Source

inst_cmplo_pd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmplo_ph_p_zh_zh ¶
Source

inst_cmplo_ph_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmplo_ps_p_zs_zs ¶
Source

inst_cmplo_ps_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmpls ¶
Source

inst_cmpls :: inst_cmpls_pb_p_zb_zb

inst_cmpls_pb_p_zb_zb ¶
Source

inst_cmpls_pb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmpls_pd_p_zd_zd ¶
Source

inst_cmpls_pd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmpls_ph_p_zh_zh ¶
Source

inst_cmpls_ph_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmpls_ps_p_zs_zs ¶
Source

inst_cmpls_ps_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmplt ¶
Source

inst_cmplt :: inst_cmplt_pb_p_zb_zb

inst_cmplt_pb_p_zb_zb ¶
Source

inst_cmplt_pb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmplt_pd_p_zd_zd ¶
Source

inst_cmplt_pd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmplt_ph_p_zh_zh ¶
Source

inst_cmplt_ph_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmplt_ps_p_zs_zs ¶
Source

inst_cmplt_ps_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmpne ¶
Source

inst_cmpne :: inst_cmpne_pb_p_zb_zb

inst_cmpne_pb_p_zb_zb ¶
Source

inst_cmpne_pb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmpne_pd_p_zd_zd ¶
Source

inst_cmpne_pd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmpne_ph_p_zh_zh ¶
Source

inst_cmpne_ph_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmpne_ps_p_zs_zs ¶
Source

inst_cmpne_ps_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_cmtst ¶
Source

inst_cmtst :: inst_cmtst_v8b_v8b_v8b

inst_cmtst_v16b_v16b_v16b ¶
Source

inst_cmtst_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmtst_v2d_v2d_v2d ¶
Source

inst_cmtst_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmtst_v2s_v2s_v2s ¶
Source

inst_cmtst_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmtst_v4h_v4h_v4h ¶
Source

inst_cmtst_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmtst_v4s_v4s_v4s ¶
Source

inst_cmtst_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmtst_v8b_v8b_v8b ¶
Source

inst_cmtst_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cmtst_v8h_v8h_v8h ¶
Source

inst_cmtst_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cneg ¶
Source

inst_cneg :: inst_cneg_r_r_c

inst_cneg_r_r_c ¶
Source

inst_cneg_r_r_c :: proc "contextless" (dst: Register, src: Register, cond: Cond) -> Instruction {…}

inst_cnt_v16b_v16b ¶
Source

inst_cnt_v16b_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_cnt_v8b_v8b ¶
Source

inst_cnt_v8b_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_cnt

inst_cnt_zb_p_zb ¶
Source

inst_cnt_zb_p_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_cnt

inst_cnt_zd_p_zd ¶
Source

inst_cnt_zd_p_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_cnt_zh_p_zh ¶
Source

inst_cnt_zh_p_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_cnt_zs_p_zs ¶
Source

inst_cnt_zs_p_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_cntb ¶
Source

inst_cntb :: inst_cntb_r_i_i

inst_cntb_r_i_i ¶
Source

inst_cntb_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

inst_cntd ¶
Source

inst_cntd :: inst_cntd_r_i_i

inst_cntd_r_i_i ¶
Source

inst_cntd_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

inst_cnth ¶
Source

inst_cnth :: inst_cnth_r_i_i

inst_cnth_r_i_i ¶
Source

inst_cnth_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

inst_cntp ¶
Source

inst_cntp :: inst_cntp_r_p_pb

inst_cntp_r_p_pb ¶
Source

inst_cntp_r_p_pb :: proc "contextless" (dst: Register, rz1: u8, rz2: u8) -> Instruction {…}

inst_cntp_r_p_pd ¶
Source

inst_cntp_r_p_pd :: proc "contextless" (dst: Register, rz1: u8, rz2: u8) -> Instruction {…}

inst_cntp_r_p_ph ¶
Source

inst_cntp_r_p_ph :: proc "contextless" (dst: Register, rz1: u8, rz2: u8) -> Instruction {…}

inst_cntp_r_p_ps ¶
Source

inst_cntp_r_p_ps :: proc "contextless" (dst: Register, rz1: u8, rz2: u8) -> Instruction {…}

inst_cntw ¶
Source

inst_cntw :: inst_cntw_r_i_i

inst_cntw_r_i_i ¶
Source

inst_cntw_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

inst_compact ¶
Source

inst_compact :: inst_compact_zs_p_zs

inst_compact_zd_p_zd ¶
Source

inst_compact_zd_p_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_compact_zs_p_zs ¶
Source

inst_compact_zs_p_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_cpy ¶
Source

inst_cpy :: inst_cpy_zb_p_r

inst_cpy_zb_p_r ¶
Source

inst_cpy_zb_p_r :: proc "contextless" (rz: u8, rz2: u8, src: Register) -> Instruction {…}

inst_cpy_zd_p_r ¶
Source

inst_cpy_zd_p_r :: proc "contextless" (rz: u8, rz2: u8, src: Register) -> Instruction {…}

inst_cpy_zh_p_r ¶
Source

inst_cpy_zh_p_r :: proc "contextless" (rz: u8, rz2: u8, src: Register) -> Instruction {…}

inst_cpy_zs_p_r ¶
Source

inst_cpy_zs_p_r :: proc "contextless" (rz: u8, rz2: u8, src: Register) -> Instruction {…}

inst_cpye ¶
Source

inst_cpye :: inst_cpye_r_r_r

inst_cpye_r_r_r ¶
Source

inst_cpye_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cpyfe ¶
Source

inst_cpyfe :: inst_cpyfe_r_r_r

inst_cpyfe_r_r_r ¶
Source

inst_cpyfe_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cpyfm ¶
Source

inst_cpyfm :: inst_cpyfm_r_r_r

inst_cpyfm_r_r_r ¶
Source

inst_cpyfm_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cpyfp ¶
Source

inst_cpyfp :: inst_cpyfp_r_r_r

inst_cpyfp_r_r_r ¶
Source

inst_cpyfp_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cpym ¶
Source

inst_cpym :: inst_cpym_r_r_r

inst_cpym_r_r_r ¶
Source

inst_cpym_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_cpyp ¶
Source

inst_cpyp :: inst_cpyp_r_r_r

inst_cpyp_r_r_r ¶
Source

inst_cpyp_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_crc32b ¶
Source

inst_crc32b :: inst_crc32b_r_r_r

inst_crc32b_r_r_r ¶
Source

inst_crc32b_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_crc32cb ¶
Source

inst_crc32cb :: inst_crc32cb_r_r_r

inst_crc32cb_r_r_r ¶
Source

inst_crc32cb_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_crc32ch ¶
Source

inst_crc32ch :: inst_crc32ch_r_r_r

inst_crc32ch_r_r_r ¶
Source

inst_crc32ch_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_crc32cw ¶
Source

inst_crc32cw :: inst_crc32cw_r_r_r

inst_crc32cw_r_r_r ¶
Source

inst_crc32cw_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_crc32cx ¶
Source

inst_crc32cx :: inst_crc32cx_r_r_r

inst_crc32cx_r_r_r ¶
Source

inst_crc32cx_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_crc32h ¶
Source

inst_crc32h :: inst_crc32h_r_r_r

inst_crc32h_r_r_r ¶
Source

inst_crc32h_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_crc32w ¶
Source

inst_crc32w :: inst_crc32w_r_r_r

inst_crc32w_r_r_r ¶
Source

inst_crc32w_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_crc32x ¶
Source

inst_crc32x :: inst_crc32x_r_r_r

inst_crc32x_r_r_r ¶
Source

inst_crc32x_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_csdb ¶
Source

inst_csdb :: inst_csdb_none

inst_csdb_none ¶
Source

inst_csdb_none :: proc "contextless" () -> Instruction {…}

inst_csel ¶
Source

inst_csel :: inst_csel_r_r_r_c

inst_csel_r_r_r_c ¶
Source

inst_csel_r_r_r_c :: proc "contextless" (dst: Register, src: Register, src2: Register, cond: Cond) -> Instruction {…}

inst_cset ¶
Source

inst_cset :: inst_cset_r_c

inst_cset_r_c ¶
Source

inst_cset_r_c :: proc "contextless" (dst: Register, cond: Cond) -> Instruction {…}

inst_csetm ¶
Source

inst_csetm :: inst_csetm_r_c

inst_csetm_r_c ¶
Source

inst_csetm_r_c :: proc "contextless" (dst: Register, cond: Cond) -> Instruction {…}

inst_csinc ¶
Source

inst_csinc :: inst_csinc_r_r_r_c

inst_csinc_r_r_r_c ¶
Source

inst_csinc_r_r_r_c :: proc "contextless" (dst: Register, src: Register, src2: Register, cond: Cond) -> Instruction {…}

inst_csinv ¶
Source

inst_csinv :: inst_csinv_r_r_r_c

inst_csinv_r_r_r_c ¶
Source

inst_csinv_r_r_r_c :: proc "contextless" (dst: Register, src: Register, src2: Register, cond: Cond) -> Instruction {…}

inst_csneg ¶
Source

inst_csneg :: inst_csneg_r_r_r_c

inst_csneg_r_r_r_c ¶
Source

inst_csneg_r_r_r_c :: proc "contextless" (dst: Register, src: Register, src2: Register, cond: Cond) -> Instruction {…}

inst_dc_cigdpapa ¶
Source

inst_dc_cigdpapa :: inst_dc_cigdpapa_r

inst_dc_cigdpapa_r ¶
Source

inst_dc_cigdpapa_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_dc_cipapa ¶
Source

inst_dc_cipapa :: inst_dc_cipapa_r

inst_dc_cipapa_r ¶
Source

inst_dc_cipapa_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_dc_cisw ¶
Source

inst_dc_cisw :: inst_dc_cisw_r

inst_dc_cisw_r ¶
Source

inst_dc_cisw_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_dc_civac ¶
Source

inst_dc_civac :: inst_dc_civac_r

inst_dc_civac_r ¶
Source

inst_dc_civac_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_dc_csw ¶
Source

inst_dc_csw :: inst_dc_csw_r

inst_dc_csw_r ¶
Source

inst_dc_csw_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_dc_cvac ¶
Source

inst_dc_cvac :: inst_dc_cvac_r

inst_dc_cvac_r ¶
Source

inst_dc_cvac_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_dc_cvau ¶
Source

inst_dc_cvau :: inst_dc_cvau_r

inst_dc_cvau_r ¶
Source

inst_dc_cvau_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_dc_isw ¶
Source

inst_dc_isw :: inst_dc_isw_r

inst_dc_isw_r ¶
Source

inst_dc_isw_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_dc_ivac ¶
Source

inst_dc_ivac :: inst_dc_ivac_r

inst_dc_ivac_r ¶
Source

inst_dc_ivac_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_dc_zva ¶
Source

inst_dc_zva :: inst_dc_zva_r

inst_dc_zva_r ¶
Source

inst_dc_zva_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_decb ¶
Source

inst_decb :: inst_decb_r_i_i

inst_decb_r_i_i ¶
Source

inst_decb_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

inst_decd_r_i_i ¶
Source

inst_decd_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_decd

inst_decd_zd_i_i ¶
Source

inst_decd_zd_i_i :: proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_decd

inst_dech_r_i_i ¶
Source

inst_dech_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_dech

inst_dech_zh_i_i ¶
Source

inst_dech_zh_i_i :: proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_dech

inst_decp_r_pb ¶
Source

inst_decp_r_pb :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

Related Procedure Groups

inst_decp

inst_decp_r_pd ¶
Source

inst_decp_r_pd :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

inst_decp_r_ph ¶
Source

inst_decp_r_ph :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

inst_decp_r_ps ¶
Source

inst_decp_r_ps :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

inst_decp_zd_pd ¶
Source

inst_decp_zd_pd :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

inst_decp_zh_ph ¶
Source

inst_decp_zh_ph :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

Related Procedure Groups

inst_decp

inst_decp_zs_ps ¶
Source

inst_decp_zs_ps :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

inst_decw_r_i_i ¶
Source

inst_decw_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_decw

inst_decw_zs_i_i ¶
Source

inst_decw_zs_i_i :: proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_decw

inst_dgh ¶
Source

inst_dgh :: inst_dgh_none

inst_dgh_none ¶
Source

inst_dgh_none :: proc "contextless" () -> Instruction {…}

inst_dmb ¶
Source

inst_dmb :: inst_dmb_i

inst_dmb_i ¶
Source

inst_dmb_i :: proc "contextless" (imm: i64) -> Instruction {…}

inst_dsb ¶
Source

inst_dsb :: inst_dsb_i

inst_dsb_i ¶
Source

inst_dsb_i :: proc "contextless" (imm: i64) -> Instruction {…}

inst_dup_v16b_r ¶
Source

inst_dup_v16b_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_dup_v16b_veb_i ¶
Source

inst_dup_v16b_veb_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_dup_v2d_r ¶
Source

inst_dup_v2d_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_dup_v2d_ved_i ¶
Source

inst_dup_v2d_ved_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_dup_v2s_r ¶
Source

inst_dup_v2s_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_dup_v2s_ves_i ¶
Source

inst_dup_v2s_ves_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_dup_v4h_r ¶
Source

inst_dup_v4h_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_dup_v4h_veh_i ¶
Source

inst_dup_v4h_veh_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_dup_v4s_r ¶
Source

inst_dup_v4s_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_dup_v4s_ves_i ¶
Source

inst_dup_v4s_ves_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_dup_v8b_r ¶
Source

inst_dup_v8b_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_dup

inst_dup_v8b_veb_i ¶
Source

inst_dup_v8b_veb_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_dup

inst_dup_v8h_r ¶
Source

inst_dup_v8h_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_dup_v8h_veh_i ¶
Source

inst_dup_v8h_veh_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_dup_zb_r ¶
Source

inst_dup_zb_r :: proc "contextless" (rz: u8, src: Register) -> Instruction {…}

Related Procedure Groups

inst_dup

inst_dup_zd_r ¶
Source

inst_dup_zd_r :: proc "contextless" (rz: u8, src: Register) -> Instruction {…}

inst_dup_zh_r ¶
Source

inst_dup_zh_r :: proc "contextless" (rz: u8, src: Register) -> Instruction {…}

inst_dup_zs_r ¶
Source

inst_dup_zs_r :: proc "contextless" (rz: u8, src: Register) -> Instruction {…}

inst_eon ¶
Source

inst_eon :: inst_eon_r_r_sh

inst_eon_r_r_sh ¶
Source

inst_eon_r_r_sh :: proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction {…}

inst_eor3_v16b_v16b_v16b_v16b ¶
Source

inst_eor3_v16b_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction {…}

Related Procedure Groups

inst_eor3

inst_eor3_zd_zd_zd_zd ¶
Source

inst_eor3_zd_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_eor3

inst_eor_pb_p_pb_pb ¶
Source

inst_eor_pb_p_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_eor_r_r_i ¶
Source

inst_eor_r_r_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_eor

inst_eor_r_r_sh ¶
Source

inst_eor_r_r_sh :: proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction {…}

Related Procedure Groups

inst_eor

inst_eor_v16b_v16b_v16b ¶
Source

inst_eor_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_eor

inst_eor_zb_p_zb_zb ¶
Source

inst_eor_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_eor

inst_eor_zd_p_zd_zd ¶
Source

inst_eor_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_eor_zh_p_zh_zh ¶
Source

inst_eor_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_eor_zs_p_zs_zs ¶
Source

inst_eor_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_eors ¶
Source

inst_eors :: inst_eors_pb_p_pb_pb

inst_eors_pb_p_pb_pb ¶
Source

inst_eors_pb_p_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_eret ¶
Source

inst_eret :: inst_eret_none

inst_eret_none ¶
Source

inst_eret_none :: proc "contextless" () -> Instruction {…}

inst_eretaa ¶
Source

inst_eretaa :: inst_eretaa_none

inst_eretaa_none ¶
Source

inst_eretaa_none :: proc "contextless" () -> Instruction {…}

inst_eretab ¶
Source

inst_eretab :: inst_eretab_none

inst_eretab_none ¶
Source

inst_eretab_none :: proc "contextless" () -> Instruction {…}

inst_ext_v16b_v16b_v16b_i ¶
Source

inst_ext_v16b_v16b_v16b_i :: proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction {…}

inst_ext_v8b_v8b_v8b_i ¶
Source

inst_ext_v8b_v8b_v8b_i :: proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_ext

inst_ext_zb_zb_zb_i ¶
Source

inst_ext_zb_zb_zb_i :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_ext

inst_extr ¶
Source

inst_extr :: inst_extr_r_r_r_i

inst_extr_r_r_r_i ¶
Source

inst_extr_r_r_r_i :: proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction {…}

inst_fabs_r_r ¶
Source

inst_fabs_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_fabs

inst_fabs_v2d_v2d ¶
Source

inst_fabs_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fabs_v2s_v2s ¶
Source

inst_fabs_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fabs_v4h_v4h ¶
Source

inst_fabs_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fabs_v4s_v4s ¶
Source

inst_fabs_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fabs_v8h_v8h ¶
Source

inst_fabs_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fabs_zd_p_zd ¶
Source

inst_fabs_zd_p_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_fabs_zh_p_zh ¶
Source

inst_fabs_zh_p_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_fabs

inst_fabs_zs_p_zs ¶
Source

inst_fabs_zs_p_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_facge ¶
Source

inst_facge :: inst_facge_v2s_v2s_v2s

inst_facge_v2d_v2d_v2d ¶
Source

inst_facge_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_facge_v2s_v2s_v2s ¶
Source

inst_facge_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_facge_v4h_v4h_v4h ¶
Source

inst_facge_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_facge_v4s_v4s_v4s ¶
Source

inst_facge_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_facge_v8h_v8h_v8h ¶
Source

inst_facge_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_facgt ¶
Source

inst_facgt :: inst_facgt_v2s_v2s_v2s

inst_facgt_v2d_v2d_v2d ¶
Source

inst_facgt_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_facgt_v2s_v2s_v2s ¶
Source

inst_facgt_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_facgt_v4h_v4h_v4h ¶
Source

inst_facgt_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_facgt_v4s_v4s_v4s ¶
Source

inst_facgt_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_facgt_v8h_v8h_v8h ¶
Source

inst_facgt_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fadd_r_r_r ¶
Source

inst_fadd_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_fadd

inst_fadd_v2d_v2d_v2d ¶
Source

inst_fadd_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fadd_v2s_v2s_v2s ¶
Source

inst_fadd_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fadd_v4s_v4s_v4s ¶
Source

inst_fadd_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fadd_zd_p_zd_zd ¶
Source

inst_fadd_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fadd_zd_zd_zd ¶
Source

inst_fadd_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_fadd_zh_p_zh_zh ¶
Source

inst_fadd_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_fadd

inst_fadd_zh_zh_zh ¶
Source

inst_fadd_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_fadd

inst_fadd_zs_p_zs_zs ¶
Source

inst_fadd_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fadd_zs_zs_zs ¶
Source

inst_fadd_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_faddp ¶
Source

inst_faddp :: inst_faddp_v2s_v2s_v2s

inst_faddp_v2d_v2d_v2d ¶
Source

inst_faddp_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_faddp_v2s_v2s_v2s ¶
Source

inst_faddp_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_faddp_v4h_v4h_v4h ¶
Source

inst_faddp_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_faddp_v4s_v4s_v4s ¶
Source

inst_faddp_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_faddp_v8h_v8h_v8h ¶
Source

inst_faddp_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fcadd ¶
Source

inst_fcadd :: inst_fcadd_v4h_v4h_v4h_i

inst_fcadd_v2d_v2d_v2d_i ¶
Source

inst_fcadd_v2d_v2d_v2d_i :: proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction {…}

inst_fcadd_v4h_v4h_v4h_i ¶
Source

inst_fcadd_v4h_v4h_v4h_i :: proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction {…}

inst_fcadd_v4s_v4s_v4s_i ¶
Source

inst_fcadd_v4s_v4s_v4s_i :: proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction {…}

inst_fcadd_v8h_v8h_v8h_i ¶
Source

inst_fcadd_v8h_v8h_v8h_i :: proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction {…}

inst_fcmeq_pd_p_zd_zd ¶
Source

inst_fcmeq_pd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fcmeq_ph_p_zh_zh ¶
Source

inst_fcmeq_ph_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_fcmeq

inst_fcmeq_ps_p_zs_zs ¶
Source

inst_fcmeq_ps_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fcmeq_v2d_v2d_v2d ¶
Source

inst_fcmeq_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fcmeq_v2s_v2s_v2s ¶
Source

inst_fcmeq_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_fcmeq

inst_fcmeq_v4h_v4h_v4h ¶
Source

inst_fcmeq_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fcmeq_v4s_v4s_v4s ¶
Source

inst_fcmeq_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fcmeq_v8h_v8h_v8h ¶
Source

inst_fcmeq_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fcmge_pd_p_zd_zd ¶
Source

inst_fcmge_pd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fcmge_ph_p_zh_zh ¶
Source

inst_fcmge_ph_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_fcmge

inst_fcmge_ps_p_zs_zs ¶
Source

inst_fcmge_ps_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fcmge_v2d_v2d_v2d ¶
Source

inst_fcmge_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fcmge_v2s_v2s_v2s ¶
Source

inst_fcmge_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_fcmge

inst_fcmge_v4h_v4h_v4h ¶
Source

inst_fcmge_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fcmge_v4s_v4s_v4s ¶
Source

inst_fcmge_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fcmge_v8h_v8h_v8h ¶
Source

inst_fcmge_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fcmgt_pd_p_zd_zd ¶
Source

inst_fcmgt_pd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fcmgt_ph_p_zh_zh ¶
Source

inst_fcmgt_ph_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_fcmgt

inst_fcmgt_ps_p_zs_zs ¶
Source

inst_fcmgt_ps_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fcmgt_v2d_v2d_v2d ¶
Source

inst_fcmgt_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fcmgt_v2s_v2s_v2s ¶
Source

inst_fcmgt_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_fcmgt

inst_fcmgt_v4h_v4h_v4h ¶
Source

inst_fcmgt_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fcmgt_v4s_v4s_v4s ¶
Source

inst_fcmgt_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fcmgt_v8h_v8h_v8h ¶
Source

inst_fcmgt_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fcmla ¶
Source

inst_fcmla :: inst_fcmla_v4h_v4h_v4h_i

inst_fcmla_v2d_v2d_v2d_i ¶
Source

inst_fcmla_v2d_v2d_v2d_i :: proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction {…}

inst_fcmla_v4h_v4h_v4h_i ¶
Source

inst_fcmla_v4h_v4h_v4h_i :: proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction {…}

inst_fcmla_v4s_v4s_v4s_i ¶
Source

inst_fcmla_v4s_v4s_v4s_i :: proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction {…}

inst_fcmla_v8h_v8h_v8h_i ¶
Source

inst_fcmla_v8h_v8h_v8h_i :: proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction {…}

inst_fcmle_pd_p_zd ¶
Source

inst_fcmle_pd_p_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_fcmle_ph_p_zh ¶
Source

inst_fcmle_ph_p_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_fcmle

inst_fcmle_ps_p_zs ¶
Source

inst_fcmle_ps_p_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_fcmle_v2d_v2d ¶
Source

inst_fcmle_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcmle_v2s_v2s ¶
Source

inst_fcmle_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_fcmle

inst_fcmle_v4h_v4h ¶
Source

inst_fcmle_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcmle_v4s_v4s ¶
Source

inst_fcmle_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcmle_v8h_v8h ¶
Source

inst_fcmle_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcmlt_pd_p_zd ¶
Source

inst_fcmlt_pd_p_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_fcmlt_ph_p_zh ¶
Source

inst_fcmlt_ph_p_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_fcmlt

inst_fcmlt_ps_p_zs ¶
Source

inst_fcmlt_ps_p_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_fcmlt_v2d_v2d ¶
Source

inst_fcmlt_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcmlt_v2s_v2s ¶
Source

inst_fcmlt_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_fcmlt

inst_fcmlt_v4h_v4h ¶
Source

inst_fcmlt_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcmlt_v4s_v4s ¶
Source

inst_fcmlt_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcmlt_v8h_v8h ¶
Source

inst_fcmlt_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcmne ¶
Source

inst_fcmne :: inst_fcmne_ph_p_zh_zh

inst_fcmne_pd_p_zd_zd ¶
Source

inst_fcmne_pd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fcmne_ph_p_zh_zh ¶
Source

inst_fcmne_ph_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fcmne_ps_p_zs_zs ¶
Source

inst_fcmne_ps_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fcmp ¶
Source

inst_fcmp :: inst_fcmp_r_r

inst_fcmp_r_r ¶
Source

inst_fcmp_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcmpe ¶
Source

inst_fcmpe :: inst_fcmpe_r_r

inst_fcmpe_r_r ¶
Source

inst_fcmpe_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcmuo ¶
Source

inst_fcmuo :: inst_fcmuo_ph_p_zh_zh

inst_fcmuo_pd_p_zd_zd ¶
Source

inst_fcmuo_pd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fcmuo_ph_p_zh_zh ¶
Source

inst_fcmuo_ph_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fcmuo_ps_p_zs_zs ¶
Source

inst_fcmuo_ps_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fcsel ¶
Source

inst_fcsel :: inst_fcsel_r_r_r_c

inst_fcsel_r_r_r_c ¶
Source

inst_fcsel_r_r_r_c :: proc "contextless" (dst: Register, src: Register, src2: Register, cond: Cond) -> Instruction {…}

inst_fcvt ¶
Source

inst_fcvt :: inst_fcvt_r_r

inst_fcvt_r_r ¶
Source

inst_fcvt_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtas ¶
Source

inst_fcvtas :: inst_fcvtas_r_r

inst_fcvtas_r_r ¶
Source

inst_fcvtas_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtas_v2d_v2d ¶
Source

inst_fcvtas_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtas_v2s_v2s ¶
Source

inst_fcvtas_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtas_v4h_v4h ¶
Source

inst_fcvtas_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtas_v4s_v4s ¶
Source

inst_fcvtas_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtas_v8h_v8h ¶
Source

inst_fcvtas_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtau ¶
Source

inst_fcvtau :: inst_fcvtau_r_r

inst_fcvtau_r_r ¶
Source

inst_fcvtau_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtau_v2d_v2d ¶
Source

inst_fcvtau_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtau_v2s_v2s ¶
Source

inst_fcvtau_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtau_v4h_v4h ¶
Source

inst_fcvtau_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtau_v4s_v4s ¶
Source

inst_fcvtau_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtau_v8h_v8h ¶
Source

inst_fcvtau_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtl ¶
Source

inst_fcvtl :: inst_fcvtl_v4s_v4h

inst_fcvtl2 ¶
Source

inst_fcvtl2 :: inst_fcvtl2_v4s_v8h

inst_fcvtl2_v2d_v4s ¶
Source

inst_fcvtl2_v2d_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtl2_v4s_v8h ¶
Source

inst_fcvtl2_v4s_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtl_v2d_v2s ¶
Source

inst_fcvtl_v2d_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtl_v4s_v4h ¶
Source

inst_fcvtl_v4s_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtms ¶
Source

inst_fcvtms :: inst_fcvtms_r_r

inst_fcvtms_r_r ¶
Source

inst_fcvtms_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtms_v2d_v2d ¶
Source

inst_fcvtms_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtms_v2s_v2s ¶
Source

inst_fcvtms_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtms_v4h_v4h ¶
Source

inst_fcvtms_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtms_v4s_v4s ¶
Source

inst_fcvtms_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtms_v8h_v8h ¶
Source

inst_fcvtms_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtmu ¶
Source

inst_fcvtmu :: inst_fcvtmu_r_r

inst_fcvtmu_r_r ¶
Source

inst_fcvtmu_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtmu_v2d_v2d ¶
Source

inst_fcvtmu_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtmu_v2s_v2s ¶
Source

inst_fcvtmu_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtmu_v4h_v4h ¶
Source

inst_fcvtmu_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtmu_v4s_v4s ¶
Source

inst_fcvtmu_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtmu_v8h_v8h ¶
Source

inst_fcvtmu_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtn ¶
Source

inst_fcvtn :: inst_fcvtn_v4h_v4s

inst_fcvtn2 ¶
Source

inst_fcvtn2 :: inst_fcvtn2_v8h_v4s

inst_fcvtn2_v4s_v2d ¶
Source

inst_fcvtn2_v4s_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtn2_v8h_v4s ¶
Source

inst_fcvtn2_v8h_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtn_v2s_v2d ¶
Source

inst_fcvtn_v2s_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtn_v4h_v4s ¶
Source

inst_fcvtn_v4h_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtns ¶
Source

inst_fcvtns :: inst_fcvtns_r_r

inst_fcvtns_r_r ¶
Source

inst_fcvtns_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtns_v2d_v2d ¶
Source

inst_fcvtns_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtns_v2s_v2s ¶
Source

inst_fcvtns_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtns_v4h_v4h ¶
Source

inst_fcvtns_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtns_v4s_v4s ¶
Source

inst_fcvtns_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtns_v8h_v8h ¶
Source

inst_fcvtns_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtnu ¶
Source

inst_fcvtnu :: inst_fcvtnu_r_r

inst_fcvtnu_r_r ¶
Source

inst_fcvtnu_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtnu_v2d_v2d ¶
Source

inst_fcvtnu_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtnu_v2s_v2s ¶
Source

inst_fcvtnu_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtnu_v4h_v4h ¶
Source

inst_fcvtnu_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtnu_v4s_v4s ¶
Source

inst_fcvtnu_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtnu_v8h_v8h ¶
Source

inst_fcvtnu_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtps ¶
Source

inst_fcvtps :: inst_fcvtps_r_r

inst_fcvtps_r_r ¶
Source

inst_fcvtps_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtps_v2d_v2d ¶
Source

inst_fcvtps_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtps_v2s_v2s ¶
Source

inst_fcvtps_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtps_v4h_v4h ¶
Source

inst_fcvtps_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtps_v4s_v4s ¶
Source

inst_fcvtps_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtps_v8h_v8h ¶
Source

inst_fcvtps_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtpu ¶
Source

inst_fcvtpu :: inst_fcvtpu_r_r

inst_fcvtpu_r_r ¶
Source

inst_fcvtpu_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtpu_v2d_v2d ¶
Source

inst_fcvtpu_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtpu_v2s_v2s ¶
Source

inst_fcvtpu_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtpu_v4h_v4h ¶
Source

inst_fcvtpu_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtpu_v4s_v4s ¶
Source

inst_fcvtpu_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtpu_v8h_v8h ¶
Source

inst_fcvtpu_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtxn ¶
Source

inst_fcvtxn :: inst_fcvtxn_v2s_v2d

inst_fcvtxn2 ¶
Source

inst_fcvtxn2 :: inst_fcvtxn2_v4s_v2d

inst_fcvtxn2_v4s_v2d ¶
Source

inst_fcvtxn2_v4s_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtxn_v2s_v2d ¶
Source

inst_fcvtxn_v2s_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtzs ¶
Source

inst_fcvtzs :: inst_fcvtzs_r_r

inst_fcvtzs_r_r ¶
Source

inst_fcvtzs_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtzs_v2d_v2d ¶
Source

inst_fcvtzs_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtzs_v2s_v2s ¶
Source

inst_fcvtzs_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtzs_v4h_v4h ¶
Source

inst_fcvtzs_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtzs_v4s_v4s ¶
Source

inst_fcvtzs_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtzs_v8h_v8h ¶
Source

inst_fcvtzs_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtzu ¶
Source

inst_fcvtzu :: inst_fcvtzu_r_r

inst_fcvtzu_r_r ¶
Source

inst_fcvtzu_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtzu_v2d_v2d ¶
Source

inst_fcvtzu_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtzu_v2s_v2s ¶
Source

inst_fcvtzu_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtzu_v4h_v4h ¶
Source

inst_fcvtzu_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtzu_v4s_v4s ¶
Source

inst_fcvtzu_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fcvtzu_v8h_v8h ¶
Source

inst_fcvtzu_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fdiv_r_r_r ¶
Source

inst_fdiv_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_fdiv

inst_fdiv_v2d_v2d_v2d ¶
Source

inst_fdiv_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fdiv_v2s_v2s_v2s ¶
Source

inst_fdiv_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fdiv_v4s_v4s_v4s ¶
Source

inst_fdiv_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fdiv_zd_p_zd_zd ¶
Source

inst_fdiv_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fdiv_zh_p_zh_zh ¶
Source

inst_fdiv_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_fdiv

inst_fdiv_zs_p_zs_zs ¶
Source

inst_fdiv_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fdivr ¶
Source

inst_fdivr :: inst_fdivr_zh_p_zh_zh

inst_fdivr_zd_p_zd_zd ¶
Source

inst_fdivr_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fdivr_zh_p_zh_zh ¶
Source

inst_fdivr_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fdivr_zs_p_zs_zs ¶
Source

inst_fdivr_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fmadd ¶
Source

inst_fmadd :: inst_fmadd_r_r_r_r

inst_fmadd_r_r_r_r ¶
Source

inst_fmadd_r_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction {…}

inst_fmax_r_r_r ¶
Source

inst_fmax_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_fmax

inst_fmax_v2d_v2d_v2d ¶
Source

inst_fmax_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmax_v2s_v2s_v2s ¶
Source

inst_fmax_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmax_v4h_v4h_v4h ¶
Source

inst_fmax_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmax_v4s_v4s_v4s ¶
Source

inst_fmax_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmax_v8h_v8h_v8h ¶
Source

inst_fmax_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmax_zd_p_zd_zd ¶
Source

inst_fmax_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fmax_zh_p_zh_zh ¶
Source

inst_fmax_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_fmax

inst_fmax_zs_p_zs_zs ¶
Source

inst_fmax_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fmaxnm_r_r_r ¶
Source

inst_fmaxnm_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_fmaxnm

inst_fmaxnm_v2d_v2d_v2d ¶
Source

inst_fmaxnm_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmaxnm_v2s_v2s_v2s ¶
Source

inst_fmaxnm_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmaxnm_v4h_v4h_v4h ¶
Source

inst_fmaxnm_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmaxnm_v4s_v4s_v4s ¶
Source

inst_fmaxnm_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmaxnm_v8h_v8h_v8h ¶
Source

inst_fmaxnm_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmaxnm_zd_p_zd_zd ¶
Source

inst_fmaxnm_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fmaxnm_zh_p_zh_zh ¶
Source

inst_fmaxnm_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_fmaxnm

inst_fmaxnm_zs_p_zs_zs ¶
Source

inst_fmaxnm_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fmaxnmp ¶
Source

inst_fmaxnmp :: inst_fmaxnmp_v2s_v2s_v2s

inst_fmaxnmp_v2d_v2d_v2d ¶
Source

inst_fmaxnmp_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmaxnmp_v2s_v2s_v2s ¶
Source

inst_fmaxnmp_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmaxnmp_v4h_v4h_v4h ¶
Source

inst_fmaxnmp_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmaxnmp_v4s_v4s_v4s ¶
Source

inst_fmaxnmp_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmaxnmp_v8h_v8h_v8h ¶
Source

inst_fmaxnmp_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmaxnmv ¶
Source

inst_fmaxnmv :: inst_fmaxnmv_r_v4s

inst_fmaxnmv_r_v4h ¶
Source

inst_fmaxnmv_r_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fmaxnmv_r_v4s ¶
Source

inst_fmaxnmv_r_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fmaxnmv_r_v8h ¶
Source

inst_fmaxnmv_r_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fmaxp ¶
Source

inst_fmaxp :: inst_fmaxp_v2s_v2s_v2s

inst_fmaxp_v2d_v2d_v2d ¶
Source

inst_fmaxp_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmaxp_v2s_v2s_v2s ¶
Source

inst_fmaxp_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmaxp_v4h_v4h_v4h ¶
Source

inst_fmaxp_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmaxp_v4s_v4s_v4s ¶
Source

inst_fmaxp_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmaxp_v8h_v8h_v8h ¶
Source

inst_fmaxp_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmaxv ¶
Source

inst_fmaxv :: inst_fmaxv_r_v4s

inst_fmaxv_r_v4h ¶
Source

inst_fmaxv_r_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fmaxv_r_v4s ¶
Source

inst_fmaxv_r_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fmaxv_r_v8h ¶
Source

inst_fmaxv_r_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fmin_r_r_r ¶
Source

inst_fmin_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_fmin

inst_fmin_v2d_v2d_v2d ¶
Source

inst_fmin_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmin_v2s_v2s_v2s ¶
Source

inst_fmin_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmin_v4h_v4h_v4h ¶
Source

inst_fmin_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmin_v4s_v4s_v4s ¶
Source

inst_fmin_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmin_v8h_v8h_v8h ¶
Source

inst_fmin_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmin_zd_p_zd_zd ¶
Source

inst_fmin_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fmin_zh_p_zh_zh ¶
Source

inst_fmin_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_fmin

inst_fmin_zs_p_zs_zs ¶
Source

inst_fmin_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fminnm_r_r_r ¶
Source

inst_fminnm_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_fminnm

inst_fminnm_v2d_v2d_v2d ¶
Source

inst_fminnm_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fminnm_v2s_v2s_v2s ¶
Source

inst_fminnm_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fminnm_v4h_v4h_v4h ¶
Source

inst_fminnm_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fminnm_v4s_v4s_v4s ¶
Source

inst_fminnm_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fminnm_v8h_v8h_v8h ¶
Source

inst_fminnm_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fminnm_zd_p_zd_zd ¶
Source

inst_fminnm_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fminnm_zh_p_zh_zh ¶
Source

inst_fminnm_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_fminnm

inst_fminnm_zs_p_zs_zs ¶
Source

inst_fminnm_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fminnmp ¶
Source

inst_fminnmp :: inst_fminnmp_v2s_v2s_v2s

inst_fminnmp_v2d_v2d_v2d ¶
Source

inst_fminnmp_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fminnmp_v2s_v2s_v2s ¶
Source

inst_fminnmp_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fminnmp_v4h_v4h_v4h ¶
Source

inst_fminnmp_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fminnmp_v4s_v4s_v4s ¶
Source

inst_fminnmp_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fminnmp_v8h_v8h_v8h ¶
Source

inst_fminnmp_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fminnmv ¶
Source

inst_fminnmv :: inst_fminnmv_r_v4s

inst_fminnmv_r_v4h ¶
Source

inst_fminnmv_r_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fminnmv_r_v4s ¶
Source

inst_fminnmv_r_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fminnmv_r_v8h ¶
Source

inst_fminnmv_r_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fminp ¶
Source

inst_fminp :: inst_fminp_v2s_v2s_v2s

inst_fminp_v2d_v2d_v2d ¶
Source

inst_fminp_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fminp_v2s_v2s_v2s ¶
Source

inst_fminp_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fminp_v4h_v4h_v4h ¶
Source

inst_fminp_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fminp_v4s_v4s_v4s ¶
Source

inst_fminp_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fminp_v8h_v8h_v8h ¶
Source

inst_fminp_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fminv ¶
Source

inst_fminv :: inst_fminv_r_v4s

inst_fminv_r_v4h ¶
Source

inst_fminv_r_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fminv_r_v4s ¶
Source

inst_fminv_r_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fminv_r_v8h ¶
Source

inst_fminv_r_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fmla_v2d_v2d_v2d ¶
Source

inst_fmla_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmla_v4s_v4s_v4s ¶
Source

inst_fmla_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_fmla

inst_fmla_zd_p_zd_zd ¶
Source

inst_fmla_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fmla_zd_zd_zd_i ¶
Source

inst_fmla_zd_zd_zd_i :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, imm: i64) -> Instruction {…}

inst_fmla_zh_p_zh_zh ¶
Source

inst_fmla_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_fmla

inst_fmla_zh_zh_zh_i ¶
Source

inst_fmla_zh_zh_zh_i :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_fmla

inst_fmla_zs_p_zs_zs ¶
Source

inst_fmla_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fmla_zs_zs_zs_i ¶
Source

inst_fmla_zs_zs_zs_i :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, imm: i64) -> Instruction {…}

inst_fmls_v2d_v2d_v2d ¶
Source

inst_fmls_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmls_v4s_v4s_v4s ¶
Source

inst_fmls_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_fmls

inst_fmls_zd_p_zd_zd ¶
Source

inst_fmls_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fmls_zd_zd_zd_i ¶
Source

inst_fmls_zd_zd_zd_i :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, imm: i64) -> Instruction {…}

inst_fmls_zh_p_zh_zh ¶
Source

inst_fmls_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_fmls

inst_fmls_zh_zh_zh_i ¶
Source

inst_fmls_zh_zh_zh_i :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_fmls

inst_fmls_zs_p_zs_zs ¶
Source

inst_fmls_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fmls_zs_zs_zs_i ¶
Source

inst_fmls_zs_zs_zs_i :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, imm: i64) -> Instruction {…}

inst_fmopa ¶
Source

inst_fmopa :: inst_fmopa_i_p_p_zs_zs

inst_fmopa_i_p_p_zs_zs ¶
Source

inst_fmopa_i_p_p_zs_zs :: proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fmops ¶
Source

inst_fmops :: inst_fmops_i_p_p_zs_zs

inst_fmops_i_p_p_zs_zs ¶
Source

inst_fmops_i_p_p_zs_zs :: proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fmov_r_i ¶
Source

inst_fmov_r_i :: proc "contextless" (dst: Register, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_fmov

inst_fmov_r_r ¶
Source

inst_fmov_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_fmov

inst_fmov_v2d_i ¶
Source

inst_fmov_v2d_i :: proc "contextless" (dst: Register, imm: i64) -> Instruction {…}

inst_fmov_v2s_i ¶
Source

inst_fmov_v2s_i :: proc "contextless" (dst: Register, imm: i64) -> Instruction {…}

inst_fmov_v4h_i ¶
Source

inst_fmov_v4h_i :: proc "contextless" (dst: Register, imm: i64) -> Instruction {…}

inst_fmov_v4s_i ¶
Source

inst_fmov_v4s_i :: proc "contextless" (dst: Register, imm: i64) -> Instruction {…}

inst_fmov_v8h_i ¶
Source

inst_fmov_v8h_i :: proc "contextless" (dst: Register, imm: i64) -> Instruction {…}

inst_fmsub ¶
Source

inst_fmsub :: inst_fmsub_r_r_r_r

inst_fmsub_r_r_r_r ¶
Source

inst_fmsub_r_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction {…}

inst_fmul_r_r_r ¶
Source

inst_fmul_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_fmul

inst_fmul_v2d_v2d_v2d ¶
Source

inst_fmul_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmul_v2s_v2s_v2s ¶
Source

inst_fmul_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmul_v4s_v4s_v4s ¶
Source

inst_fmul_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmul_zd_p_zd_zd ¶
Source

inst_fmul_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fmul_zd_zd_zd ¶
Source

inst_fmul_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_fmul_zh_p_zh_zh ¶
Source

inst_fmul_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_fmul

inst_fmul_zh_zh_zh ¶
Source

inst_fmul_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_fmul

inst_fmul_zs_p_zs_zs ¶
Source

inst_fmul_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fmul_zs_zs_zs ¶
Source

inst_fmul_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_fmulx ¶
Source

inst_fmulx :: inst_fmulx_v2s_v2s_v2s

inst_fmulx_v2d_v2d_v2d ¶
Source

inst_fmulx_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmulx_v2s_v2s_v2s ¶
Source

inst_fmulx_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmulx_v4h_v4h_v4h ¶
Source

inst_fmulx_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmulx_v4s_v4s_v4s ¶
Source

inst_fmulx_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fmulx_v8h_v8h_v8h ¶
Source

inst_fmulx_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fneg_r_r ¶
Source

inst_fneg_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_fneg

inst_fneg_v2d_v2d ¶
Source

inst_fneg_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fneg_v2s_v2s ¶
Source

inst_fneg_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fneg_v4h_v4h ¶
Source

inst_fneg_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fneg_v4s_v4s ¶
Source

inst_fneg_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fneg_v8h_v8h ¶
Source

inst_fneg_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fneg_zd_p_zd ¶
Source

inst_fneg_zd_p_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_fneg_zh_p_zh ¶
Source

inst_fneg_zh_p_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_fneg

inst_fneg_zs_p_zs ¶
Source

inst_fneg_zs_p_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_fnmadd ¶
Source

inst_fnmadd :: inst_fnmadd_r_r_r_r

inst_fnmadd_r_r_r_r ¶
Source

inst_fnmadd_r_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction {…}

inst_fnmla ¶
Source

inst_fnmla :: inst_fnmla_zh_p_zh_zh

inst_fnmla_zd_p_zd_zd ¶
Source

inst_fnmla_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fnmla_zh_p_zh_zh ¶
Source

inst_fnmla_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fnmla_zs_p_zs_zs ¶
Source

inst_fnmla_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fnmls ¶
Source

inst_fnmls :: inst_fnmls_zh_p_zh_zh

inst_fnmls_zd_p_zd_zd ¶
Source

inst_fnmls_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fnmls_zh_p_zh_zh ¶
Source

inst_fnmls_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fnmls_zs_p_zs_zs ¶
Source

inst_fnmls_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fnmsub ¶
Source

inst_fnmsub :: inst_fnmsub_r_r_r_r

inst_fnmsub_r_r_r_r ¶
Source

inst_fnmsub_r_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction {…}

inst_fnmul ¶
Source

inst_fnmul :: inst_fnmul_r_r_r

inst_fnmul_r_r_r ¶
Source

inst_fnmul_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_frecpe ¶
Source

inst_frecpe :: inst_frecpe_v2s_v2s

inst_frecpe_v2d_v2d ¶
Source

inst_frecpe_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frecpe_v2s_v2s ¶
Source

inst_frecpe_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frecpe_v4h_v4h ¶
Source

inst_frecpe_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frecpe_v4s_v4s ¶
Source

inst_frecpe_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frecpe_v8h_v8h ¶
Source

inst_frecpe_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frecps_v2d_v2d_v2d ¶
Source

inst_frecps_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_frecps_v2s_v2s_v2s ¶
Source

inst_frecps_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_frecps

inst_frecps_v4h_v4h_v4h ¶
Source

inst_frecps_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_frecps_v4s_v4s_v4s ¶
Source

inst_frecps_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_frecps_v8h_v8h_v8h ¶
Source

inst_frecps_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_frecps_zd_zd_zd ¶
Source

inst_frecps_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_frecps_zh_zh_zh ¶
Source

inst_frecps_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_frecps

inst_frecps_zs_zs_zs ¶
Source

inst_frecps_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_frecpx_r_r ¶
Source

inst_frecpx_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_frecpx

inst_frecpx_zd_p_zd ¶
Source

inst_frecpx_zd_p_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_frecpx_zh_p_zh ¶
Source

inst_frecpx_zh_p_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_frecpx

inst_frecpx_zs_p_zs ¶
Source

inst_frecpx_zs_p_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_frinta_r_r ¶
Source

inst_frinta_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_frinta

inst_frinta_v2d_v2d ¶
Source

inst_frinta_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frinta_v2s_v2s ¶
Source

inst_frinta_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frinta_v4h_v4h ¶
Source

inst_frinta_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frinta_v4s_v4s ¶
Source

inst_frinta_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frinta_v8h_v8h ¶
Source

inst_frinta_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frinta_zd_p_zd ¶
Source

inst_frinta_zd_p_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_frinta_zh_p_zh ¶
Source

inst_frinta_zh_p_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_frinta

inst_frinta_zs_p_zs ¶
Source

inst_frinta_zs_p_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_frinti_r_r ¶
Source

inst_frinti_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_frinti

inst_frinti_v2d_v2d ¶
Source

inst_frinti_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frinti_v2s_v2s ¶
Source

inst_frinti_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frinti_v4h_v4h ¶
Source

inst_frinti_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frinti_v4s_v4s ¶
Source

inst_frinti_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frinti_v8h_v8h ¶
Source

inst_frinti_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frinti_zd_p_zd ¶
Source

inst_frinti_zd_p_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_frinti_zh_p_zh ¶
Source

inst_frinti_zh_p_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_frinti

inst_frinti_zs_p_zs ¶
Source

inst_frinti_zs_p_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_frintm_r_r ¶
Source

inst_frintm_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_frintm

inst_frintm_v2d_v2d ¶
Source

inst_frintm_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintm_v2s_v2s ¶
Source

inst_frintm_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintm_v4h_v4h ¶
Source

inst_frintm_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintm_v4s_v4s ¶
Source

inst_frintm_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintm_v8h_v8h ¶
Source

inst_frintm_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintm_zd_p_zd ¶
Source

inst_frintm_zd_p_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_frintm_zh_p_zh ¶
Source

inst_frintm_zh_p_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_frintm

inst_frintm_zs_p_zs ¶
Source

inst_frintm_zs_p_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_frintn_r_r ¶
Source

inst_frintn_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_frintn

inst_frintn_v2d_v2d ¶
Source

inst_frintn_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintn_v2s_v2s ¶
Source

inst_frintn_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintn_v4h_v4h ¶
Source

inst_frintn_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintn_v4s_v4s ¶
Source

inst_frintn_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintn_v8h_v8h ¶
Source

inst_frintn_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintn_zd_p_zd ¶
Source

inst_frintn_zd_p_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_frintn_zh_p_zh ¶
Source

inst_frintn_zh_p_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_frintn

inst_frintn_zs_p_zs ¶
Source

inst_frintn_zs_p_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_frintp_r_r ¶
Source

inst_frintp_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_frintp

inst_frintp_v2d_v2d ¶
Source

inst_frintp_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintp_v2s_v2s ¶
Source

inst_frintp_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintp_v4h_v4h ¶
Source

inst_frintp_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintp_v4s_v4s ¶
Source

inst_frintp_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintp_v8h_v8h ¶
Source

inst_frintp_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintp_zd_p_zd ¶
Source

inst_frintp_zd_p_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_frintp_zh_p_zh ¶
Source

inst_frintp_zh_p_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_frintp

inst_frintp_zs_p_zs ¶
Source

inst_frintp_zs_p_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_frintx_r_r ¶
Source

inst_frintx_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_frintx

inst_frintx_v2d_v2d ¶
Source

inst_frintx_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintx_v2s_v2s ¶
Source

inst_frintx_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintx_v4h_v4h ¶
Source

inst_frintx_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintx_v4s_v4s ¶
Source

inst_frintx_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintx_v8h_v8h ¶
Source

inst_frintx_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintx_zd_p_zd ¶
Source

inst_frintx_zd_p_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_frintx_zh_p_zh ¶
Source

inst_frintx_zh_p_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_frintx

inst_frintx_zs_p_zs ¶
Source

inst_frintx_zs_p_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_frintz_r_r ¶
Source

inst_frintz_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_frintz

inst_frintz_v2d_v2d ¶
Source

inst_frintz_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintz_v2s_v2s ¶
Source

inst_frintz_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintz_v4h_v4h ¶
Source

inst_frintz_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintz_v4s_v4s ¶
Source

inst_frintz_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintz_v8h_v8h ¶
Source

inst_frintz_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frintz_zd_p_zd ¶
Source

inst_frintz_zd_p_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_frintz_zh_p_zh ¶
Source

inst_frintz_zh_p_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_frintz

inst_frintz_zs_p_zs ¶
Source

inst_frintz_zs_p_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_frsqrte ¶
Source

inst_frsqrte :: inst_frsqrte_v2s_v2s

inst_frsqrte_v2d_v2d ¶
Source

inst_frsqrte_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frsqrte_v2s_v2s ¶
Source

inst_frsqrte_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frsqrte_v4h_v4h ¶
Source

inst_frsqrte_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frsqrte_v4s_v4s ¶
Source

inst_frsqrte_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frsqrte_v8h_v8h ¶
Source

inst_frsqrte_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_frsqrts_v2d_v2d_v2d ¶
Source

inst_frsqrts_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_frsqrts_v2s_v2s_v2s ¶
Source

inst_frsqrts_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_frsqrts

inst_frsqrts_v4h_v4h_v4h ¶
Source

inst_frsqrts_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_frsqrts_v4s_v4s_v4s ¶
Source

inst_frsqrts_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_frsqrts_v8h_v8h_v8h ¶
Source

inst_frsqrts_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_frsqrts_zd_zd_zd ¶
Source

inst_frsqrts_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_frsqrts_zh_zh_zh ¶
Source

inst_frsqrts_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_frsqrts

inst_frsqrts_zs_zs_zs ¶
Source

inst_frsqrts_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_fsqrt_r_r ¶
Source

inst_fsqrt_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_fsqrt

inst_fsqrt_v2d_v2d ¶
Source

inst_fsqrt_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fsqrt_v2s_v2s ¶
Source

inst_fsqrt_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fsqrt_v4h_v4h ¶
Source

inst_fsqrt_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fsqrt_v4s_v4s ¶
Source

inst_fsqrt_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fsqrt_v8h_v8h ¶
Source

inst_fsqrt_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_fsqrt_zd_p_zd ¶
Source

inst_fsqrt_zd_p_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_fsqrt_zh_p_zh ¶
Source

inst_fsqrt_zh_p_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_fsqrt

inst_fsqrt_zs_p_zs ¶
Source

inst_fsqrt_zs_p_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_fsub_r_r_r ¶
Source

inst_fsub_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_fsub

inst_fsub_v2d_v2d_v2d ¶
Source

inst_fsub_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fsub_v2s_v2s_v2s ¶
Source

inst_fsub_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fsub_v4s_v4s_v4s ¶
Source

inst_fsub_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_fsub_zd_p_zd_zd ¶
Source

inst_fsub_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fsub_zd_zd_zd ¶
Source

inst_fsub_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_fsub_zh_p_zh_zh ¶
Source

inst_fsub_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_fsub

inst_fsub_zh_zh_zh ¶
Source

inst_fsub_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_fsub

inst_fsub_zs_p_zs_zs ¶
Source

inst_fsub_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fsub_zs_zs_zs ¶
Source

inst_fsub_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_fsubr ¶
Source

inst_fsubr :: inst_fsubr_zh_p_zh_zh

inst_fsubr_zd_p_zd_zd ¶
Source

inst_fsubr_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fsubr_zh_p_zh_zh ¶
Source

inst_fsubr_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_fsubr_zs_p_zs_zs ¶
Source

inst_fsubr_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_ftsmul ¶
Source

inst_ftsmul :: inst_ftsmul_zh_zh_zh

inst_ftsmul_zd_zd_zd ¶
Source

inst_ftsmul_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_ftsmul_zh_zh_zh ¶
Source

inst_ftsmul_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_ftsmul_zs_zs_zs ¶
Source

inst_ftsmul_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_gmi ¶
Source

inst_gmi :: inst_gmi_r_r_r

inst_gmi_r_r_r ¶
Source

inst_gmi_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_hint ¶
Source

inst_hint :: inst_hint_i

inst_hint_i ¶
Source

inst_hint_i :: proc "contextless" (imm: i64) -> Instruction {…}

inst_histcnt ¶
Source

inst_histcnt :: inst_histcnt_zs_p_zs_zs

inst_histcnt_zd_p_zd_zd ¶
Source

inst_histcnt_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_histcnt_zs_p_zs_zs ¶
Source

inst_histcnt_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_histseg ¶
Source

inst_histseg :: inst_histseg_zb_zb_zb

inst_histseg_zb_zb_zb ¶
Source

inst_histseg_zb_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_hlt ¶
Source

inst_hlt :: inst_hlt_i

inst_hlt_i ¶
Source

inst_hlt_i :: proc "contextless" (imm: i64) -> Instruction {…}

inst_hvc ¶
Source

inst_hvc :: inst_hvc_i

inst_hvc_i ¶
Source

inst_hvc_i :: proc "contextless" (imm: i64) -> Instruction {…}

inst_ic_iallu ¶
Source

inst_ic_iallu :: inst_ic_iallu_none

inst_ic_iallu_none ¶
Source

inst_ic_iallu_none :: proc "contextless" () -> Instruction {…}

inst_ic_ialluis ¶
Source

inst_ic_ialluis :: inst_ic_ialluis_none

inst_ic_ialluis_none ¶
Source

inst_ic_ialluis_none :: proc "contextless" () -> Instruction {…}

inst_ic_ivau ¶
Source

inst_ic_ivau :: inst_ic_ivau_r

inst_ic_ivau_r ¶
Source

inst_ic_ivau_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_incb ¶
Source

inst_incb :: inst_incb_r_i_i

inst_incb_r_i_i ¶
Source

inst_incb_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

inst_incd_r_i_i ¶
Source

inst_incd_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_incd

inst_incd_zd_i_i ¶
Source

inst_incd_zd_i_i :: proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_incd

inst_inch_r_i_i ¶
Source

inst_inch_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_inch

inst_inch_zh_i_i ¶
Source

inst_inch_zh_i_i :: proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_inch

inst_incp_r_pb ¶
Source

inst_incp_r_pb :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

Related Procedure Groups

inst_incp

inst_incp_r_pd ¶
Source

inst_incp_r_pd :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

inst_incp_r_ph ¶
Source

inst_incp_r_ph :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

inst_incp_r_ps ¶
Source

inst_incp_r_ps :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

inst_incp_zd_pd ¶
Source

inst_incp_zd_pd :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

inst_incp_zh_ph ¶
Source

inst_incp_zh_ph :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

Related Procedure Groups

inst_incp

inst_incp_zs_ps ¶
Source

inst_incp_zs_ps :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

inst_incw_r_i_i ¶
Source

inst_incw_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_incw

inst_incw_zs_i_i ¶
Source

inst_incw_zs_i_i :: proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_incw

inst_index_zb_i_i ¶
Source

inst_index_zb_i_i :: proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_index

inst_index_zb_i_r ¶
Source

inst_index_zb_i_r :: proc "contextless" (rz: u8, imm: i64, src: Register) -> Instruction {…}

Related Procedure Groups

inst_index

inst_index_zb_r_i ¶
Source

inst_index_zb_r_i :: proc "contextless" (rz: u8, src: Register, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_index

inst_index_zb_r_r ¶
Source

inst_index_zb_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_index

inst_index_zd_i_i ¶
Source

inst_index_zd_i_i :: proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction {…}

inst_index_zd_i_r ¶
Source

inst_index_zd_i_r :: proc "contextless" (rz: u8, imm: i64, src: Register) -> Instruction {…}

inst_index_zd_r_i ¶
Source

inst_index_zd_r_i :: proc "contextless" (rz: u8, src: Register, imm: i64) -> Instruction {…}

inst_index_zd_r_r ¶
Source

inst_index_zd_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_index_zh_i_i ¶
Source

inst_index_zh_i_i :: proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction {…}

inst_index_zh_i_r ¶
Source

inst_index_zh_i_r :: proc "contextless" (rz: u8, imm: i64, src: Register) -> Instruction {…}

inst_index_zh_r_i ¶
Source

inst_index_zh_r_i :: proc "contextless" (rz: u8, src: Register, imm: i64) -> Instruction {…}

inst_index_zh_r_r ¶
Source

inst_index_zh_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_index_zs_i_i ¶
Source

inst_index_zs_i_i :: proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction {…}

inst_index_zs_i_r ¶
Source

inst_index_zs_i_r :: proc "contextless" (rz: u8, imm: i64, src: Register) -> Instruction {…}

inst_index_zs_r_i ¶
Source

inst_index_zs_r_i :: proc "contextless" (rz: u8, src: Register, imm: i64) -> Instruction {…}

inst_index_zs_r_r ¶
Source

inst_index_zs_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_ins_veb_i_r ¶
Source

inst_ins_veb_i_r :: proc "contextless" (dst: Register, imm: i64, src: Register) -> Instruction {…}

Related Procedure Groups

inst_ins

inst_ins_veb_i_veb_i ¶
Source

inst_ins_veb_i_veb_i :: proc "contextless" (dst: Register, imm: i64, src: Register, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_ins

inst_ins_ved_i_r ¶
Source

inst_ins_ved_i_r :: proc "contextless" (dst: Register, imm: i64, src: Register) -> Instruction {…}

inst_ins_ved_i_ved_i ¶
Source

inst_ins_ved_i_ved_i :: proc "contextless" (dst: Register, imm: i64, src: Register, imm2: i64) -> Instruction {…}

inst_ins_veh_i_r ¶
Source

inst_ins_veh_i_r :: proc "contextless" (dst: Register, imm: i64, src: Register) -> Instruction {…}

inst_ins_veh_i_veh_i ¶
Source

inst_ins_veh_i_veh_i :: proc "contextless" (dst: Register, imm: i64, src: Register, imm2: i64) -> Instruction {…}

inst_ins_ves_i_r ¶
Source

inst_ins_ves_i_r :: proc "contextless" (dst: Register, imm: i64, src: Register) -> Instruction {…}

inst_ins_ves_i_ves_i ¶
Source

inst_ins_ves_i_ves_i :: proc "contextless" (dst: Register, imm: i64, src: Register, imm2: i64) -> Instruction {…}

inst_insr ¶
Source

inst_insr :: inst_insr_zb_r

inst_insr_zb_r ¶
Source

inst_insr_zb_r :: proc "contextless" (rz: u8, src: Register) -> Instruction {…}

inst_insr_zd_r ¶
Source

inst_insr_zd_r :: proc "contextless" (rz: u8, src: Register) -> Instruction {…}

inst_insr_zh_r ¶
Source

inst_insr_zh_r :: proc "contextless" (rz: u8, src: Register) -> Instruction {…}

inst_insr_zs_r ¶
Source

inst_insr_zs_r :: proc "contextless" (rz: u8, src: Register) -> Instruction {…}

inst_irg ¶
Source

inst_irg :: inst_irg_r_r_r

inst_irg_r_r_r ¶
Source

inst_irg_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_isb ¶
Source

inst_isb :: inst_isb_i

inst_isb_i ¶
Source

inst_isb_i :: proc "contextless" (imm: i64) -> Instruction {…}

inst_ld1_v16b_m ¶
Source

inst_ld1_v16b_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_ld1

inst_ld1_v2d_m ¶
Source

inst_ld1_v2d_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ld1_v4s_m ¶
Source

inst_ld1_v4s_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ld1_v8h_m ¶
Source

inst_ld1_v8h_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ld1_veb_i_m ¶
Source

inst_ld1_veb_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_ld1

inst_ld1_ved_i_m ¶
Source

inst_ld1_ved_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_ld1_veh_i_m ¶
Source

inst_ld1_veh_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_ld1_ves_i_m ¶
Source

inst_ld1_ves_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_ld1b_i_p_m ¶
Source

inst_ld1b_i_p_m :: proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_ld1b

inst_ld1b_zb_p_m ¶
Source

inst_ld1b_zb_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_ld1b

inst_ld1b_zd_p_m ¶
Source

inst_ld1b_zd_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ld1b_zpb_pnz_m ¶
Source

inst_ld1b_zpb_pnz_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ld1b_zqb_pnz_m ¶
Source

inst_ld1b_zqb_pnz_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ld1b_zs_p_m ¶
Source

inst_ld1b_zs_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ld1d_i_p_m ¶
Source

inst_ld1d_i_p_m :: proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_ld1d

inst_ld1d_zd_p_m ¶
Source

inst_ld1d_zd_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_ld1d

inst_ld1d_zpd_pnz_m ¶
Source

inst_ld1d_zpd_pnz_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ld1d_zqd_pnz_m ¶
Source

inst_ld1d_zqd_pnz_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ld1h_i_p_m ¶
Source

inst_ld1h_i_p_m :: proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_ld1h

inst_ld1h_zd_p_m ¶
Source

inst_ld1h_zd_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ld1h_zh_p_m ¶
Source

inst_ld1h_zh_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_ld1h

inst_ld1h_zph_pnz_m ¶
Source

inst_ld1h_zph_pnz_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ld1h_zqh_pnz_m ¶
Source

inst_ld1h_zqh_pnz_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ld1h_zs_p_m ¶
Source

inst_ld1h_zs_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ld1q ¶
Source

inst_ld1q :: inst_ld1q_i_p_m

inst_ld1q_i_p_m ¶
Source

inst_ld1q_i_p_m :: proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction {…}

inst_ld1r ¶
Source

inst_ld1r :: inst_ld1r_v16b_m

inst_ld1r_v16b_m ¶
Source

inst_ld1r_v16b_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ld1sb ¶
Source

inst_ld1sb :: inst_ld1sb_zh_p_m

inst_ld1sb_zd_p_m ¶
Source

inst_ld1sb_zd_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ld1sb_zh_p_m ¶
Source

inst_ld1sb_zh_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ld1sb_zs_p_m ¶
Source

inst_ld1sb_zs_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ld1sh ¶
Source

inst_ld1sh :: inst_ld1sh_zd_p_m

inst_ld1sh_zd_p_m ¶
Source

inst_ld1sh_zd_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ld1sh_zs_p_m ¶
Source

inst_ld1sh_zs_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ld1sw ¶
Source

inst_ld1sw :: inst_ld1sw_zd_p_m

inst_ld1sw_zd_p_m ¶
Source

inst_ld1sw_zd_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ld1w_i_p_m ¶
Source

inst_ld1w_i_p_m :: proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_ld1w

inst_ld1w_zd_p_m ¶
Source

inst_ld1w_zd_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ld1w_zps_pnz_m ¶
Source

inst_ld1w_zps_pnz_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ld1w_zqs_pnz_m ¶
Source

inst_ld1w_zqs_pnz_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ld1w_zs_p_m ¶
Source

inst_ld1w_zs_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_ld1w

inst_ld2_v16b_m ¶
Source

inst_ld2_v16b_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_ld2

inst_ld2_veb_i_m ¶
Source

inst_ld2_veb_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_ld2

inst_ld2_ved_i_m ¶
Source

inst_ld2_ved_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_ld2_veh_i_m ¶
Source

inst_ld2_veh_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_ld2_ves_i_m ¶
Source

inst_ld2_ves_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_ld2r ¶
Source

inst_ld2r :: inst_ld2r_v16b_m

inst_ld2r_v16b_m ¶
Source

inst_ld2r_v16b_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ld3_v16b_m ¶
Source

inst_ld3_v16b_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_ld3

inst_ld3_veb_i_m ¶
Source

inst_ld3_veb_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_ld3

inst_ld3_ved_i_m ¶
Source

inst_ld3_ved_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_ld3_veh_i_m ¶
Source

inst_ld3_veh_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_ld3_ves_i_m ¶
Source

inst_ld3_ves_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_ld3r ¶
Source

inst_ld3r :: inst_ld3r_v16b_m

inst_ld3r_v16b_m ¶
Source

inst_ld3r_v16b_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ld4_v16b_m ¶
Source

inst_ld4_v16b_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_ld4

inst_ld4_veb_i_m ¶
Source

inst_ld4_veb_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_ld4

inst_ld4_ved_i_m ¶
Source

inst_ld4_ved_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_ld4_veh_i_m ¶
Source

inst_ld4_veh_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_ld4_ves_i_m ¶
Source

inst_ld4_ves_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_ld4r ¶
Source

inst_ld4r :: inst_ld4r_v16b_m

inst_ld4r_v16b_m ¶
Source

inst_ld4r_v16b_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldadd ¶
Source

inst_ldadd :: inst_ldadd_r_r_m

inst_ldadd_r_r_m ¶
Source

inst_ldadd_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldadda ¶
Source

inst_ldadda :: inst_ldadda_r_r_m

inst_ldadda_r_r_m ¶
Source

inst_ldadda_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldaddal ¶
Source

inst_ldaddal :: inst_ldaddal_r_r_m

inst_ldaddal_r_r_m ¶
Source

inst_ldaddal_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldaddl ¶
Source

inst_ldaddl :: inst_ldaddl_r_r_m

inst_ldaddl_r_r_m ¶
Source

inst_ldaddl_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldapr ¶
Source

inst_ldapr :: inst_ldapr_r_m

inst_ldapr_r_m ¶
Source

inst_ldapr_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldaprb ¶
Source

inst_ldaprb :: inst_ldaprb_r_m

inst_ldaprb_r_m ¶
Source

inst_ldaprb_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldaprh ¶
Source

inst_ldaprh :: inst_ldaprh_r_m

inst_ldaprh_r_m ¶
Source

inst_ldaprh_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldapur ¶
Source

inst_ldapur :: inst_ldapur_r_m

inst_ldapur_r_m ¶
Source

inst_ldapur_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldapurb ¶
Source

inst_ldapurb :: inst_ldapurb_r_m

inst_ldapurb_r_m ¶
Source

inst_ldapurb_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldapurh ¶
Source

inst_ldapurh :: inst_ldapurh_r_m

inst_ldapurh_r_m ¶
Source

inst_ldapurh_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldapursb ¶
Source

inst_ldapursb :: inst_ldapursb_r_m

inst_ldapursb_r_m ¶
Source

inst_ldapursb_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldapursh ¶
Source

inst_ldapursh :: inst_ldapursh_r_m

inst_ldapursh_r_m ¶
Source

inst_ldapursh_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldapursw ¶
Source

inst_ldapursw :: inst_ldapursw_r_m

inst_ldapursw_r_m ¶
Source

inst_ldapursw_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldar ¶
Source

inst_ldar :: inst_ldar_r_m

inst_ldar_r_m ¶
Source

inst_ldar_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldarb ¶
Source

inst_ldarb :: inst_ldarb_r_m

inst_ldarb_r_m ¶
Source

inst_ldarb_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldarh ¶
Source

inst_ldarh :: inst_ldarh_r_m

inst_ldarh_r_m ¶
Source

inst_ldarh_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldaxp ¶
Source

inst_ldaxp :: inst_ldaxp_r_r_m

inst_ldaxp_r_r_m ¶
Source

inst_ldaxp_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldaxr ¶
Source

inst_ldaxr :: inst_ldaxr_r_m

inst_ldaxr_r_m ¶
Source

inst_ldaxr_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldaxrb ¶
Source

inst_ldaxrb :: inst_ldaxrb_r_m

inst_ldaxrb_r_m ¶
Source

inst_ldaxrb_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldaxrh ¶
Source

inst_ldaxrh :: inst_ldaxrh_r_m

inst_ldaxrh_r_m ¶
Source

inst_ldaxrh_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldclr ¶
Source

inst_ldclr :: inst_ldclr_r_r_m

inst_ldclr_r_r_m ¶
Source

inst_ldclr_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldclra ¶
Source

inst_ldclra :: inst_ldclra_r_r_m

inst_ldclra_r_r_m ¶
Source

inst_ldclra_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldclral ¶
Source

inst_ldclral :: inst_ldclral_r_r_m

inst_ldclral_r_r_m ¶
Source

inst_ldclral_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldclrl ¶
Source

inst_ldclrl :: inst_ldclrl_r_r_m

inst_ldclrl_r_r_m ¶
Source

inst_ldclrl_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldeor ¶
Source

inst_ldeor :: inst_ldeor_r_r_m

inst_ldeor_r_r_m ¶
Source

inst_ldeor_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldeora ¶
Source

inst_ldeora :: inst_ldeora_r_r_m

inst_ldeora_r_r_m ¶
Source

inst_ldeora_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldeoral ¶
Source

inst_ldeoral :: inst_ldeoral_r_r_m

inst_ldeoral_r_r_m ¶
Source

inst_ldeoral_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldeorl ¶
Source

inst_ldeorl :: inst_ldeorl_r_r_m

inst_ldeorl_r_r_m ¶
Source

inst_ldeorl_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldff1b ¶
Source

inst_ldff1b :: inst_ldff1b_zb_p_m

inst_ldff1b_zb_p_m ¶
Source

inst_ldff1b_zb_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ldff1d ¶
Source

inst_ldff1d :: inst_ldff1d_zd_p_m

inst_ldff1d_zd_p_m ¶
Source

inst_ldff1d_zd_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ldff1h ¶
Source

inst_ldff1h :: inst_ldff1h_zh_p_m

inst_ldff1h_zh_p_m ¶
Source

inst_ldff1h_zh_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ldff1w ¶
Source

inst_ldff1w :: inst_ldff1w_zs_p_m

inst_ldff1w_zs_p_m ¶
Source

inst_ldff1w_zs_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ldg ¶
Source

inst_ldg :: inst_ldg_r_m

inst_ldg_r_m ¶
Source

inst_ldg_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldgm ¶
Source

inst_ldgm :: inst_ldgm_r_m

inst_ldgm_r_m ¶
Source

inst_ldgm_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldnp ¶
Source

inst_ldnp :: inst_ldnp_r_r_m

inst_ldnp_r_r_m ¶
Source

inst_ldnp_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldnt1b ¶
Source

inst_ldnt1b :: inst_ldnt1b_zb_p_m

inst_ldnt1b_zb_p_m ¶
Source

inst_ldnt1b_zb_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ldnt1d ¶
Source

inst_ldnt1d :: inst_ldnt1d_zd_p_m

inst_ldnt1d_zd_p_m ¶
Source

inst_ldnt1d_zd_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ldnt1h ¶
Source

inst_ldnt1h :: inst_ldnt1h_zh_p_m

inst_ldnt1h_zh_p_m ¶
Source

inst_ldnt1h_zh_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ldnt1w ¶
Source

inst_ldnt1w :: inst_ldnt1w_zs_p_m

inst_ldnt1w_zs_p_m ¶
Source

inst_ldnt1w_zs_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_ldp ¶
Source

inst_ldp :: inst_ldp_r_r_m

inst_ldp_r_r_m ¶
Source

inst_ldp_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldp_stp ¶
Source

@(require_results)
inst_ldp_stp :: proc "contextless" (m: Mnemonic, rt, rt2: Register, mm: Memory) -> Instruction {…}

Load/store pair: Rt, Rt2, memory.

inst_ldpsw ¶
Source

inst_ldpsw :: inst_ldpsw_r_r_m

inst_ldpsw_r_r_m ¶
Source

inst_ldpsw_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldr_i_m ¶
Source

inst_ldr_i_m :: proc "contextless" (imm: i64, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_ldr

inst_ldr_p_m ¶
Source

inst_ldr_p_m :: proc "contextless" (rz: u8, mem: Memory) -> Instruction {…}

inst_ldr_r_l ¶
Source

inst_ldr_r_l :: proc "contextless" (dst: Register, label: u32) -> Instruction {…}

Related Procedure Groups

inst_ldr

inst_ldr_r_m ¶
Source

inst_ldr_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_ldr

inst_ldr_z_m ¶
Source

inst_ldr_z_m :: proc "contextless" (rz: u8, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_ldr

inst_ldraa ¶
Source

inst_ldraa :: inst_ldraa_r_m

inst_ldraa_r_m ¶
Source

inst_ldraa_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldrab ¶
Source

inst_ldrab :: inst_ldrab_r_m

inst_ldrab_r_m ¶
Source

inst_ldrab_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldrb ¶
Source

inst_ldrb :: inst_ldrb_r_m

inst_ldrb_r_m ¶
Source

inst_ldrb_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldrh ¶
Source

inst_ldrh :: inst_ldrh_r_m

inst_ldrh_r_m ¶
Source

inst_ldrh_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldrsb ¶
Source

inst_ldrsb :: inst_ldrsb_r_m

inst_ldrsb_r_m ¶
Source

inst_ldrsb_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldrsh ¶
Source

inst_ldrsh :: inst_ldrsh_r_m

inst_ldrsh_r_m ¶
Source

inst_ldrsh_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldrsw ¶
Source

inst_ldrsw :: inst_ldrsw_r_m

inst_ldrsw_r_m ¶
Source

inst_ldrsw_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldset ¶
Source

inst_ldset :: inst_ldset_r_r_m

inst_ldset_r_r_m ¶
Source

inst_ldset_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldseta ¶
Source

inst_ldseta :: inst_ldseta_r_r_m

inst_ldseta_r_r_m ¶
Source

inst_ldseta_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldsetal ¶
Source

inst_ldsetal :: inst_ldsetal_r_r_m

inst_ldsetal_r_r_m ¶
Source

inst_ldsetal_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldsetl ¶
Source

inst_ldsetl :: inst_ldsetl_r_r_m

inst_ldsetl_r_r_m ¶
Source

inst_ldsetl_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldsmax ¶
Source

inst_ldsmax :: inst_ldsmax_r_r_m

inst_ldsmax_r_r_m ¶
Source

inst_ldsmax_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldsmaxa ¶
Source

inst_ldsmaxa :: inst_ldsmaxa_r_r_m

inst_ldsmaxa_r_r_m ¶
Source

inst_ldsmaxa_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldsmaxal ¶
Source

inst_ldsmaxal :: inst_ldsmaxal_r_r_m

inst_ldsmaxal_r_r_m ¶
Source

inst_ldsmaxal_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldsmaxl ¶
Source

inst_ldsmaxl :: inst_ldsmaxl_r_r_m

inst_ldsmaxl_r_r_m ¶
Source

inst_ldsmaxl_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldsmin ¶
Source

inst_ldsmin :: inst_ldsmin_r_r_m

inst_ldsmin_r_r_m ¶
Source

inst_ldsmin_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldsmina ¶
Source

inst_ldsmina :: inst_ldsmina_r_r_m

inst_ldsmina_r_r_m ¶
Source

inst_ldsmina_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldsminal ¶
Source

inst_ldsminal :: inst_ldsminal_r_r_m

inst_ldsminal_r_r_m ¶
Source

inst_ldsminal_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldsminl ¶
Source

inst_ldsminl :: inst_ldsminl_r_r_m

inst_ldsminl_r_r_m ¶
Source

inst_ldsminl_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldst ¶
Source

@(require_results)
inst_ldst :: proc "contextless" (m: Mnemonic, rt: Register, mm: Memory) -> Instruction {…}

Load/store register: Rt + memory.

inst_ldumax ¶
Source

inst_ldumax :: inst_ldumax_r_r_m

inst_ldumax_r_r_m ¶
Source

inst_ldumax_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldumaxa ¶
Source

inst_ldumaxa :: inst_ldumaxa_r_r_m

inst_ldumaxa_r_r_m ¶
Source

inst_ldumaxa_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldumaxal ¶
Source

inst_ldumaxal :: inst_ldumaxal_r_r_m

inst_ldumaxal_r_r_m ¶
Source

inst_ldumaxal_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldumaxl ¶
Source

inst_ldumaxl :: inst_ldumaxl_r_r_m

inst_ldumaxl_r_r_m ¶
Source

inst_ldumaxl_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldumin ¶
Source

inst_ldumin :: inst_ldumin_r_r_m

inst_ldumin_r_r_m ¶
Source

inst_ldumin_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldumina ¶
Source

inst_ldumina :: inst_ldumina_r_r_m

inst_ldumina_r_r_m ¶
Source

inst_ldumina_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_lduminal ¶
Source

inst_lduminal :: inst_lduminal_r_r_m

inst_lduminal_r_r_m ¶
Source

inst_lduminal_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_lduminl ¶
Source

inst_lduminl :: inst_lduminl_r_r_m

inst_lduminl_r_r_m ¶
Source

inst_lduminl_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldur ¶
Source

inst_ldur :: inst_ldur_r_m

inst_ldur_r_m ¶
Source

inst_ldur_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldurb ¶
Source

inst_ldurb :: inst_ldurb_r_m

inst_ldurb_r_m ¶
Source

inst_ldurb_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldurh ¶
Source

inst_ldurh :: inst_ldurh_r_m

inst_ldurh_r_m ¶
Source

inst_ldurh_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldursb ¶
Source

inst_ldursb :: inst_ldursb_r_m

inst_ldursb_r_m ¶
Source

inst_ldursb_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldursh ¶
Source

inst_ldursh :: inst_ldursh_r_m

inst_ldursh_r_m ¶
Source

inst_ldursh_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldursw ¶
Source

inst_ldursw :: inst_ldursw_r_m

inst_ldursw_r_m ¶
Source

inst_ldursw_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldxp ¶
Source

inst_ldxp :: inst_ldxp_r_r_m

inst_ldxp_r_r_m ¶
Source

inst_ldxp_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_ldxr ¶
Source

inst_ldxr :: inst_ldxr_r_m

inst_ldxr_r_m ¶
Source

inst_ldxr_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldxrb ¶
Source

inst_ldxrb :: inst_ldxrb_r_m

inst_ldxrb_r_m ¶
Source

inst_ldxrb_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_ldxrh ¶
Source

inst_ldxrh :: inst_ldxrh_r_m

inst_ldxrh_r_m ¶
Source

inst_ldxrh_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_lsl_r_r_i ¶
Source

inst_lsl_r_r_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_lsl

inst_lsl_r_r_r ¶
Source

inst_lsl_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_lsl

inst_lsl_zb_p_zb_zb ¶
Source

inst_lsl_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_lsl

inst_lsl_zd_p_zd_zd ¶
Source

inst_lsl_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_lsl_zh_p_zh_zh ¶
Source

inst_lsl_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_lsl_zs_p_zs_zs ¶
Source

inst_lsl_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_lslr ¶
Source

inst_lslr :: inst_lslr_zb_p_zb_zb

inst_lslr_zb_p_zb_zb ¶
Source

inst_lslr_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_lslr_zd_p_zd_zd ¶
Source

inst_lslr_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_lslr_zh_p_zh_zh ¶
Source

inst_lslr_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_lslr_zs_p_zs_zs ¶
Source

inst_lslr_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_lsr_r_r_i ¶
Source

inst_lsr_r_r_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_lsr

inst_lsr_r_r_r ¶
Source

inst_lsr_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_lsr

inst_lsr_zb_p_zb_zb ¶
Source

inst_lsr_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_lsr

inst_lsr_zd_p_zd_zd ¶
Source

inst_lsr_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_lsr_zh_p_zh_zh ¶
Source

inst_lsr_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_lsr_zs_p_zs_zs ¶
Source

inst_lsr_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_lsrr ¶
Source

inst_lsrr :: inst_lsrr_zb_p_zb_zb

inst_lsrr_zb_p_zb_zb ¶
Source

inst_lsrr_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_lsrr_zd_p_zd_zd ¶
Source

inst_lsrr_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_lsrr_zh_p_zh_zh ¶
Source

inst_lsrr_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_lsrr_zs_p_zs_zs ¶
Source

inst_lsrr_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_luti2 ¶
Source

inst_luti2 :: inst_luti2_zpb_zt_z_i

inst_luti2_zpb_zt_z_i ¶
Source

inst_luti2_zpb_zt_z_i :: proc "contextless" (rz: u8, rz2: u8, imm: i64) -> Instruction {…}

inst_luti2_zph_zt_z_i ¶
Source

inst_luti2_zph_zt_z_i :: proc "contextless" (rz: u8, rz2: u8, imm: i64) -> Instruction {…}

inst_luti2_zps_zt_z_i ¶
Source

inst_luti2_zps_zt_z_i :: proc "contextless" (rz: u8, rz2: u8, imm: i64) -> Instruction {…}

inst_luti4 ¶
Source

inst_luti4 :: inst_luti4_zpb_zt_z_i

inst_luti4_zpb_zt_z_i ¶
Source

inst_luti4_zpb_zt_z_i :: proc "contextless" (rz: u8, rz2: u8, imm: i64) -> Instruction {…}

inst_luti4_zph_zt_z_i ¶
Source

inst_luti4_zph_zt_z_i :: proc "contextless" (rz: u8, rz2: u8, imm: i64) -> Instruction {…}

inst_luti4_zps_zt_z_i ¶
Source

inst_luti4_zps_zt_z_i :: proc "contextless" (rz: u8, rz2: u8, imm: i64) -> Instruction {…}

inst_madd ¶
Source

inst_madd :: inst_madd_r_r_r_r

inst_madd_r_r_r_r ¶
Source

inst_madd_r_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction {…}

inst_match ¶
Source

inst_match :: inst_match_pb_p_zb_zb

inst_match_pb_p_zb_zb ¶
Source

inst_match_pb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_match_ph_p_zh_zh ¶
Source

inst_match_ph_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_mla ¶
Source

inst_mla :: inst_mla_v8b_v8b_v8b

inst_mla_v16b_v16b_v16b ¶
Source

inst_mla_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_mla_v2s_v2s_v2s ¶
Source

inst_mla_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_mla_v4h_v4h_v4h ¶
Source

inst_mla_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_mla_v4s_v4s_v4s ¶
Source

inst_mla_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_mla_v8b_v8b_v8b ¶
Source

inst_mla_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_mla_v8h_v8h_v8h ¶
Source

inst_mla_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_mls ¶
Source

inst_mls :: inst_mls_v8b_v8b_v8b

inst_mls_v16b_v16b_v16b ¶
Source

inst_mls_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_mls_v2s_v2s_v2s ¶
Source

inst_mls_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_mls_v4h_v4h_v4h ¶
Source

inst_mls_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_mls_v4s_v4s_v4s ¶
Source

inst_mls_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_mls_v8b_v8b_v8b ¶
Source

inst_mls_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_mls_v8h_v8h_v8h ¶
Source

inst_mls_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_mov_imm ¶
Source

@(require_results)
inst_mov_imm :: proc "contextless" (m: Mnemonic, rd: Register, imm: i64, hw: u8) -> Instruction {…}

MOVZ/MOVN/MOVK with explicit hw shift (0/16/32/48).

inst_mov_pb_p ¶
Source

inst_mov_pb_p :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

Related Procedure Groups

inst_mov

inst_mov_pb_p_p ¶
Source

inst_mov_pb_p_p :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_mov_r_i ¶
Source

inst_mov_r_i :: proc "contextless" (dst: Register, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_mov

inst_mov_r_r ¶
Source

inst_mov_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_mov_v16b_v16b ¶
Source

inst_mov_v16b_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_mov_v8b_v8b ¶
Source

inst_mov_v8b_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_mov

inst_mov_zb_p_zb ¶
Source

inst_mov_zb_p_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_mov

inst_mov_zd_p_zd ¶
Source

inst_mov_zd_p_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_mov_zh_p_zh ¶
Source

inst_mov_zh_p_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_mov_zs_p_zs ¶
Source

inst_mov_zs_p_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_mova_i_p_zb ¶
Source

inst_mova_i_p_zb :: proc "contextless" (imm: i64, rz1: u8, rz2: u8) -> Instruction {…}

Related Procedure Groups

inst_mova

inst_mova_zb_p_i ¶
Source

inst_mova_zb_p_i :: proc "contextless" (rz: u8, rz2: u8, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_mova

inst_movi ¶
Source

inst_movi :: inst_movi_v8b_i

inst_movi_v16b_i ¶
Source

inst_movi_v16b_i :: proc "contextless" (dst: Register, imm: i64) -> Instruction {…}

inst_movi_v2d_i ¶
Source

inst_movi_v2d_i :: proc "contextless" (dst: Register, imm: i64) -> Instruction {…}

inst_movi_v2s_i ¶
Source

inst_movi_v2s_i :: proc "contextless" (dst: Register, imm: i64) -> Instruction {…}

inst_movi_v4h_i ¶
Source

inst_movi_v4h_i :: proc "contextless" (dst: Register, imm: i64) -> Instruction {…}

inst_movi_v4s_i ¶
Source

inst_movi_v4s_i :: proc "contextless" (dst: Register, imm: i64) -> Instruction {…}

inst_movi_v8b_i ¶
Source

inst_movi_v8b_i :: proc "contextless" (dst: Register, imm: i64) -> Instruction {…}

inst_movi_v8h_i ¶
Source

inst_movi_v8h_i :: proc "contextless" (dst: Register, imm: i64) -> Instruction {…}

inst_movk ¶
Source

inst_movk :: inst_movk_r_i_i

inst_movk_r_i_i ¶
Source

inst_movk_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

inst_movn ¶
Source

inst_movn :: inst_movn_r_i_i

inst_movn_r_i_i ¶
Source

inst_movn_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

inst_movs ¶
Source

inst_movs :: inst_movs_pb_p_p

inst_movs_pb_p_p ¶
Source

inst_movs_pb_p_p :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_movz ¶
Source

inst_movz :: inst_movz_r_i_i

inst_movz_r_i_i ¶
Source

inst_movz_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

inst_mrs ¶
Source

inst_mrs :: inst_mrs_r_s

inst_mrs_r_s ¶
Source

inst_mrs_r_s :: proc "contextless" (dst: Register, sysreg: Register) -> Instruction {…}

inst_msr_i_i ¶
Source

inst_msr_i_i :: proc "contextless" (imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_msr

inst_msr_s_r ¶
Source

inst_msr_s_r :: proc "contextless" (sysreg: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_msr

inst_msub ¶
Source

inst_msub :: inst_msub_r_r_r_r

inst_msub_r_r_r_r ¶
Source

inst_msub_r_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction {…}

inst_mul_v16b_v16b_v16b ¶
Source

inst_mul_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_mul

inst_mul_v4s_v4s_v4s ¶
Source

inst_mul_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_mul_v8h_v8h_v8h ¶
Source

inst_mul_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_mul_zb_p_zb_zb ¶
Source

inst_mul_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_mul

inst_mul_zd_p_zd_zd ¶
Source

inst_mul_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_mul_zh_p_zh_zh ¶
Source

inst_mul_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_mul_zs_p_zs_zs ¶
Source

inst_mul_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_mvn ¶
Source

inst_mvn :: inst_mvn_v8b_v8b

inst_mvn_r_r ¶
Source

inst_mvn_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_mvn_v16b_v16b ¶
Source

inst_mvn_v16b_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_mvn_v8b_v8b ¶
Source

inst_mvn_v8b_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_mvni ¶
Source

inst_mvni :: inst_mvni_v4h_i

inst_mvni_v2s_i ¶
Source

inst_mvni_v2s_i :: proc "contextless" (dst: Register, imm: i64) -> Instruction {…}

inst_mvni_v4h_i ¶
Source

inst_mvni_v4h_i :: proc "contextless" (dst: Register, imm: i64) -> Instruction {…}

inst_mvni_v4s_i ¶
Source

inst_mvni_v4s_i :: proc "contextless" (dst: Register, imm: i64) -> Instruction {…}

inst_mvni_v8h_i ¶
Source

inst_mvni_v8h_i :: proc "contextless" (dst: Register, imm: i64) -> Instruction {…}

inst_nand ¶
Source

inst_nand :: inst_nand_pb_p_pb_pb

inst_nand_pb_p_pb_pb ¶
Source

inst_nand_pb_p_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_nands ¶
Source

inst_nands :: inst_nands_pb_p_pb_pb

inst_nands_pb_p_pb_pb ¶
Source

inst_nands_pb_p_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_nbsl ¶
Source

inst_nbsl :: inst_nbsl_zd_zd_zd_zd

inst_nbsl_zd_zd_zd_zd ¶
Source

inst_nbsl_zd_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_neg_r_sh ¶
Source

inst_neg_r_sh :: proc "contextless" (dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) -> Instruction {…}

Related Procedure Groups

inst_neg

inst_neg_v16b_v16b ¶
Source

inst_neg_v16b_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_neg_v2d_v2d ¶
Source

inst_neg_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_neg_v2s_v2s ¶
Source

inst_neg_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_neg_v4h_v4h ¶
Source

inst_neg_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_neg_v4s_v4s ¶
Source

inst_neg_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_neg_v8b_v8b ¶
Source

inst_neg_v8b_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_neg

inst_neg_v8h_v8h ¶
Source

inst_neg_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_neg_zb_p_zb ¶
Source

inst_neg_zb_p_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_neg

inst_neg_zd_p_zd ¶
Source

inst_neg_zd_p_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_neg_zh_p_zh ¶
Source

inst_neg_zh_p_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_neg_zs_p_zs ¶
Source

inst_neg_zs_p_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_negs ¶
Source

inst_negs :: inst_negs_r_sh

inst_negs_r_sh ¶
Source

inst_negs_r_sh :: proc "contextless" (dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) -> Instruction {…}

inst_ngc ¶
Source

inst_ngc :: inst_ngc_r_r

inst_ngc_r_r ¶
Source

inst_ngc_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_ngcs ¶
Source

inst_ngcs :: inst_ngcs_r_r

inst_ngcs_r_r ¶
Source

inst_ngcs_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_nmatch ¶
Source

inst_nmatch :: inst_nmatch_pb_p_zb_zb

inst_nmatch_pb_p_zb_zb ¶
Source

inst_nmatch_pb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_nmatch_ph_p_zh_zh ¶
Source

inst_nmatch_ph_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_none ¶
Source

@(require_results)
inst_none :: proc "contextless" (m: Mnemonic) -> Instruction {…}

inst_nop ¶
Source

inst_nop :: inst_nop_none

inst_nop_none ¶
Source

inst_nop_none :: proc "contextless" () -> Instruction {…}

inst_nor ¶
Source

inst_nor :: inst_nor_pb_p_pb_pb

inst_nor_pb_p_pb_pb ¶
Source

inst_nor_pb_p_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_nors ¶
Source

inst_nors :: inst_nors_pb_p_pb_pb

inst_nors_pb_p_pb_pb ¶
Source

inst_nors_pb_p_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_not_pb_p_pb ¶
Source

inst_not_pb_p_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_not

inst_not_v16b_v16b ¶
Source

inst_not_v16b_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_not_v8b_v8b ¶
Source

inst_not_v8b_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_not

inst_orn_pb_p_pb_pb ¶
Source

inst_orn_pb_p_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_orn

inst_orn_r_r_sh ¶
Source

inst_orn_r_r_sh :: proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction {…}

Related Procedure Groups

inst_orn

inst_orn_v16b_v16b_v16b ¶
Source

inst_orn_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_orn

inst_orns ¶
Source

inst_orns :: inst_orns_pb_p_pb_pb

inst_orns_pb_p_pb_pb ¶
Source

inst_orns_pb_p_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_orr_pb_p_pb_pb ¶
Source

inst_orr_pb_p_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_orr_r_r_i ¶
Source

inst_orr_r_r_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_orr

inst_orr_r_r_sh ¶
Source

inst_orr_r_r_sh :: proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction {…}

Related Procedure Groups

inst_orr

inst_orr_v16b_v16b_v16b ¶
Source

inst_orr_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_orr

inst_orr_zb_p_zb_zb ¶
Source

inst_orr_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_orr

inst_orr_zd_p_zd_zd ¶
Source

inst_orr_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_orr_zh_p_zh_zh ¶
Source

inst_orr_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_orr_zs_p_zs_zs ¶
Source

inst_orr_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_orrs ¶
Source

inst_orrs :: inst_orrs_pb_p_pb_pb

inst_orrs_pb_p_pb_pb ¶
Source

inst_orrs_pb_p_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_pacda ¶
Source

inst_pacda :: inst_pacda_r_r

inst_pacda_r_r ¶
Source

inst_pacda_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_pacdb ¶
Source

inst_pacdb :: inst_pacdb_r_r

inst_pacdb_r_r ¶
Source

inst_pacdb_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_pacdza ¶
Source

inst_pacdza :: inst_pacdza_r

inst_pacdza_r ¶
Source

inst_pacdza_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_pacdzb ¶
Source

inst_pacdzb :: inst_pacdzb_r

inst_pacdzb_r ¶
Source

inst_pacdzb_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_pacga ¶
Source

inst_pacga :: inst_pacga_r_r_r

inst_pacga_r_r_r ¶
Source

inst_pacga_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_pacia ¶
Source

inst_pacia :: inst_pacia_r_r

inst_pacia1716 ¶
Source

inst_pacia1716 :: inst_pacia1716_none

inst_pacia1716_none ¶
Source

inst_pacia1716_none :: proc "contextless" () -> Instruction {…}

inst_pacia_r_r ¶
Source

inst_pacia_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_paciasp ¶
Source

inst_paciasp :: inst_paciasp_none

inst_paciasp_none ¶
Source

inst_paciasp_none :: proc "contextless" () -> Instruction {…}

inst_pacib ¶
Source

inst_pacib :: inst_pacib_r_r

inst_pacib1716 ¶
Source

inst_pacib1716 :: inst_pacib1716_none

inst_pacib1716_none ¶
Source

inst_pacib1716_none :: proc "contextless" () -> Instruction {…}

inst_pacib_r_r ¶
Source

inst_pacib_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_pacibsp ¶
Source

inst_pacibsp :: inst_pacibsp_none

inst_pacibsp_none ¶
Source

inst_pacibsp_none :: proc "contextless" () -> Instruction {…}

inst_paciza ¶
Source

inst_paciza :: inst_paciza_r

inst_paciza_r ¶
Source

inst_paciza_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_pacizb ¶
Source

inst_pacizb :: inst_pacizb_r

inst_pacizb_r ¶
Source

inst_pacizb_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_pfalse ¶
Source

inst_pfalse :: inst_pfalse_pb

inst_pfalse_pb ¶
Source

inst_pfalse_pb :: proc "contextless" (rz: u8) -> Instruction {…}

inst_pfirst ¶
Source

inst_pfirst :: inst_pfirst_pb_p_pb

inst_pfirst_pb_p_pb ¶
Source

inst_pfirst_pb_p_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_pmul ¶
Source

inst_pmul :: inst_pmul_zb_zb_zb

inst_pmul_zb_zb_zb ¶
Source

inst_pmul_zb_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_pmull ¶
Source

inst_pmull :: inst_pmull_v8h_v8b_v8b

inst_pmull2 ¶
Source

inst_pmull2 :: inst_pmull2_v8h_v16b_v16b

inst_pmull2_v1q_v2d_v2d ¶
Source

inst_pmull2_v1q_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_pmull2_v8h_v16b_v16b ¶
Source

inst_pmull2_v8h_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_pmull_v1q_v1d_v1d ¶
Source

inst_pmull_v1q_v1d_v1d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_pmull_v8h_v8b_v8b ¶
Source

inst_pmull_v8h_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_pmullb ¶
Source

inst_pmullb :: inst_pmullb_zd_zs_zs

inst_pmullb_zd_zs_zs ¶
Source

inst_pmullb_zd_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_pmullt ¶
Source

inst_pmullt :: inst_pmullt_zd_zs_zs

inst_pmullt_zd_zs_zs ¶
Source

inst_pmullt_zd_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_pnext ¶
Source

inst_pnext :: inst_pnext_pb_p_pb

inst_pnext_pb_p_pb ¶
Source

inst_pnext_pb_p_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_prfb ¶
Source

inst_prfb :: inst_prfb_i_p_m

inst_prfb_i_p_m ¶
Source

inst_prfb_i_p_m :: proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction {…}

inst_prfd ¶
Source

inst_prfd :: inst_prfd_i_p_m

inst_prfd_i_p_m ¶
Source

inst_prfd_i_p_m :: proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction {…}

inst_prfh ¶
Source

inst_prfh :: inst_prfh_i_p_m

inst_prfh_i_p_m ¶
Source

inst_prfh_i_p_m :: proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction {…}

inst_prfm_i_l ¶
Source

inst_prfm_i_l :: proc "contextless" (imm: i64, label: u32) -> Instruction {…}

Related Procedure Groups

inst_prfm

inst_prfm_i_m ¶
Source

inst_prfm_i_m :: proc "contextless" (imm: i64, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_prfm

inst_prfum ¶
Source

inst_prfum :: inst_prfum_i_m

inst_prfum_i_m ¶
Source

inst_prfum_i_m :: proc "contextless" (imm: i64, mem: Memory) -> Instruction {…}

inst_prfw ¶
Source

inst_prfw :: inst_prfw_i_p_m

inst_prfw_i_p_m ¶
Source

inst_prfw_i_p_m :: proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction {…}

inst_psb_csync ¶
Source

inst_psb_csync :: inst_psb_csync_none

inst_psb_csync_none ¶
Source

inst_psb_csync_none :: proc "contextless" () -> Instruction {…}

inst_ptrue ¶
Source

inst_ptrue :: inst_ptrue_pb_i

inst_ptrue_pb_i ¶
Source

inst_ptrue_pb_i :: proc "contextless" (rz: u8, imm: i64) -> Instruction {…}

inst_ptrues ¶
Source

inst_ptrues :: inst_ptrues_pb_i

inst_ptrues_pb_i ¶
Source

inst_ptrues_pb_i :: proc "contextless" (rz: u8, imm: i64) -> Instruction {…}

inst_r ¶
Source

@(require_results)
inst_r :: proc "contextless" (m: Mnemonic, r: Register) -> Instruction {…}

Single-register (e.g. BR, BLR).

inst_r_i ¶
Source

@(require_results)
inst_r_i :: proc "contextless" (m: Mnemonic, rd: Register, imm: i64) -> Instruction {…}

1-register + immediate (e.g. MOVZ).

inst_r_r ¶
Source

@(require_results)
inst_r_r :: proc "contextless" (m: Mnemonic, rd, rn: Register) -> Instruction {…}

2-register (e.g. CLZ, RBIT).

inst_r_r_i ¶
Source

@(require_results)
inst_r_r_i :: proc "contextless" (m: Mnemonic, rd, rn: Register, imm: i64) -> Instruction {…}

2-register + immediate (e.g. ADD imm).

inst_r_r_r ¶
Source

@(require_results)
inst_r_r_r :: proc "contextless" (m: Mnemonic, rd, rn, rm: Register) -> Instruction {…}

3-register (e.g. ADD shifted, MUL, UDIV, ASRV).

inst_r_r_r_r ¶
Source

@(require_results)
inst_r_r_r_r :: proc "contextless" (m: Mnemonic, rd, rn, rm, ra: Register) -> Instruction {…}

4-register R4-type (MADD, MSUB, SMADDL, ...).

inst_raddhn ¶
Source

inst_raddhn :: inst_raddhn_v8b_v8h_v8h

inst_raddhn2 ¶
Source

inst_raddhn2 :: inst_raddhn2_v16b_v8h_v8h

inst_raddhn2_v16b_v8h_v8h ¶
Source

inst_raddhn2_v16b_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_raddhn2_v4s_v2d_v2d ¶
Source

inst_raddhn2_v4s_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_raddhn2_v8h_v4s_v4s ¶
Source

inst_raddhn2_v8h_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_raddhn_v2s_v2d_v2d ¶
Source

inst_raddhn_v2s_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_raddhn_v4h_v4s_v4s ¶
Source

inst_raddhn_v4h_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_raddhn_v8b_v8h_v8h ¶
Source

inst_raddhn_v8b_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_rax1 ¶
Source

inst_rax1 :: inst_rax1_v2d_v2d_v2d

inst_rax1_v2d_v2d_v2d ¶
Source

inst_rax1_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_rbit ¶
Source

inst_rbit :: inst_rbit_r_r

inst_rbit_r_r ¶
Source

inst_rbit_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_rbit_v16b_v16b ¶
Source

inst_rbit_v16b_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_rbit_v8b_v8b ¶
Source

inst_rbit_v8b_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_rdffr ¶
Source

inst_rdffr :: inst_rdffr_pb

inst_rdffr_pb ¶
Source

inst_rdffr_pb :: proc "contextless" (rz: u8) -> Instruction {…}

inst_rdsvl ¶
Source

inst_rdsvl :: inst_rdsvl_r_i

inst_rdsvl_r_i ¶
Source

inst_rdsvl_r_i :: proc "contextless" (dst: Register, imm: i64) -> Instruction {…}

inst_ret_none ¶
Source

inst_ret_none :: proc "contextless" () -> Instruction {…}

Related Procedure Groups

inst_ret

inst_ret_r ¶
Source

inst_ret_r :: proc "contextless" (dst: Register) -> Instruction {…}

Related Procedure Groups

inst_ret

inst_retaa ¶
Source

inst_retaa :: inst_retaa_none

inst_retaa_none ¶
Source

inst_retaa_none :: proc "contextless" () -> Instruction {…}

inst_retab ¶
Source

inst_retab :: inst_retab_none

inst_retab_none ¶
Source

inst_retab_none :: proc "contextless" () -> Instruction {…}

inst_rev16 ¶
Source

inst_rev16 :: inst_rev16_r_r

inst_rev16_r_r ¶
Source

inst_rev16_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_rev16_v16b_v16b ¶
Source

inst_rev16_v16b_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_rev16_v8b_v8b ¶
Source

inst_rev16_v8b_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_rev32 ¶
Source

inst_rev32 :: inst_rev32_r_r

inst_rev32_r_r ¶
Source

inst_rev32_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_rev32_v16b_v16b ¶
Source

inst_rev32_v16b_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_rev32_v4h_v4h ¶
Source

inst_rev32_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_rev32_v8b_v8b ¶
Source

inst_rev32_v8b_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_rev32_v8h_v8h ¶
Source

inst_rev32_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_rev64 ¶
Source

inst_rev64 :: inst_rev64_v8b_v8b

inst_rev64_v16b_v16b ¶
Source

inst_rev64_v16b_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_rev64_v2s_v2s ¶
Source

inst_rev64_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_rev64_v4h_v4h ¶
Source

inst_rev64_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_rev64_v4s_v4s ¶
Source

inst_rev64_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_rev64_v8b_v8b ¶
Source

inst_rev64_v8b_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_rev64_v8h_v8h ¶
Source

inst_rev64_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_rev_pb_pb ¶
Source

inst_rev_pb_pb :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

inst_rev_r_r ¶
Source

inst_rev_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

Related Procedure Groups

inst_rev

inst_rev_zb_zb ¶
Source

inst_rev_zb_zb :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

Related Procedure Groups

inst_rev

inst_rev_zd_zd ¶
Source

inst_rev_zd_zd :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

inst_rev_zh_zh ¶
Source

inst_rev_zh_zh :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

inst_rev_zs_zs ¶
Source

inst_rev_zs_zs :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

inst_ror_r_r_i ¶
Source

inst_ror_r_r_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_ror

inst_ror_r_r_r ¶
Source

inst_ror_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_ror

inst_rshrn ¶
Source

inst_rshrn :: inst_rshrn_v8b_v8h_i

inst_rshrn2 ¶
Source

inst_rshrn2 :: inst_rshrn2_v16b_v8h_i

inst_rshrn2_v16b_v8h_i ¶
Source

inst_rshrn2_v16b_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_rshrn2_v4s_v2d_i ¶
Source

inst_rshrn2_v4s_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_rshrn2_v8h_v4s_i ¶
Source

inst_rshrn2_v8h_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_rshrn_v2s_v2d_i ¶
Source

inst_rshrn_v2s_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_rshrn_v4h_v4s_i ¶
Source

inst_rshrn_v4h_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_rshrn_v8b_v8h_i ¶
Source

inst_rshrn_v8b_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_rsubhn ¶
Source

inst_rsubhn :: inst_rsubhn_v8b_v8h_v8h

inst_rsubhn2 ¶
Source

inst_rsubhn2 :: inst_rsubhn2_v16b_v8h_v8h

inst_rsubhn2_v16b_v8h_v8h ¶
Source

inst_rsubhn2_v16b_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_rsubhn2_v4s_v2d_v2d ¶
Source

inst_rsubhn2_v4s_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_rsubhn2_v8h_v4s_v4s ¶
Source

inst_rsubhn2_v8h_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_rsubhn_v2s_v2d_v2d ¶
Source

inst_rsubhn_v2s_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_rsubhn_v4h_v4s_v4s ¶
Source

inst_rsubhn_v4h_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_rsubhn_v8b_v8h_v8h ¶
Source

inst_rsubhn_v8b_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_saba ¶
Source

inst_saba :: inst_saba_v8b_v8b_v8b

inst_saba_v16b_v16b_v16b ¶
Source

inst_saba_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_saba_v2s_v2s_v2s ¶
Source

inst_saba_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_saba_v4h_v4h_v4h ¶
Source

inst_saba_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_saba_v4s_v4s_v4s ¶
Source

inst_saba_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_saba_v8b_v8b_v8b ¶
Source

inst_saba_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_saba_v8h_v8h_v8h ¶
Source

inst_saba_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sabd_v16b_v16b_v16b ¶
Source

inst_sabd_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sabd_v2s_v2s_v2s ¶
Source

inst_sabd_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sabd_v4h_v4h_v4h ¶
Source

inst_sabd_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sabd_v4s_v4s_v4s ¶
Source

inst_sabd_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sabd_v8b_v8b_v8b ¶
Source

inst_sabd_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_sabd

inst_sabd_v8h_v8h_v8h ¶
Source

inst_sabd_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sabd_zb_p_zb_zb ¶
Source

inst_sabd_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_sabd

inst_sabd_zd_p_zd_zd ¶
Source

inst_sabd_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_sabd_zh_p_zh_zh ¶
Source

inst_sabd_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_sabd_zs_p_zs_zs ¶
Source

inst_sabd_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_sadalp ¶
Source

inst_sadalp :: inst_sadalp_v4h_v8b

inst_sadalp_v1d_v2s ¶
Source

inst_sadalp_v1d_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sadalp_v2d_v4s ¶
Source

inst_sadalp_v2d_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sadalp_v2s_v4h ¶
Source

inst_sadalp_v2s_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sadalp_v4h_v8b ¶
Source

inst_sadalp_v4h_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sadalp_v4s_v8h ¶
Source

inst_sadalp_v4s_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sadalp_v8h_v16b ¶
Source

inst_sadalp_v8h_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_saddl ¶
Source

inst_saddl :: inst_saddl_v8h_v8b_v8b

inst_saddl2 ¶
Source

inst_saddl2 :: inst_saddl2_v8h_v16b_v16b

inst_saddl2_v2d_v4s_v4s ¶
Source

inst_saddl2_v2d_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_saddl2_v4s_v8h_v8h ¶
Source

inst_saddl2_v4s_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_saddl2_v8h_v16b_v16b ¶
Source

inst_saddl2_v8h_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_saddl_v2d_v2s_v2s ¶
Source

inst_saddl_v2d_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_saddl_v4s_v4h_v4h ¶
Source

inst_saddl_v4s_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_saddl_v8h_v8b_v8b ¶
Source

inst_saddl_v8h_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_saddlp ¶
Source

inst_saddlp :: inst_saddlp_v4h_v8b

inst_saddlp_v1d_v2s ¶
Source

inst_saddlp_v1d_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_saddlp_v2d_v4s ¶
Source

inst_saddlp_v2d_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_saddlp_v2s_v4h ¶
Source

inst_saddlp_v2s_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_saddlp_v4h_v8b ¶
Source

inst_saddlp_v4h_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_saddlp_v4s_v8h ¶
Source

inst_saddlp_v4s_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_saddlp_v8h_v16b ¶
Source

inst_saddlp_v8h_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_saddlv ¶
Source

inst_saddlv :: inst_saddlv_r_v8b

inst_saddlv_r_v16b ¶
Source

inst_saddlv_r_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_saddlv_r_v4h ¶
Source

inst_saddlv_r_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_saddlv_r_v4s ¶
Source

inst_saddlv_r_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_saddlv_r_v8b ¶
Source

inst_saddlv_r_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_saddlv_r_v8h ¶
Source

inst_saddlv_r_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_saddw ¶
Source

inst_saddw :: inst_saddw_v8h_v8h_v8b

inst_saddw2 ¶
Source

inst_saddw2 :: inst_saddw2_v8h_v8h_v16b

inst_saddw2_v2d_v2d_v4s ¶
Source

inst_saddw2_v2d_v2d_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_saddw2_v4s_v4s_v8h ¶
Source

inst_saddw2_v4s_v4s_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_saddw2_v8h_v8h_v16b ¶
Source

inst_saddw2_v8h_v8h_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_saddw_v2d_v2d_v2s ¶
Source

inst_saddw_v2d_v2d_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_saddw_v4s_v4s_v4h ¶
Source

inst_saddw_v4s_v4s_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_saddw_v8h_v8h_v8b ¶
Source

inst_saddw_v8h_v8h_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sb ¶
Source

inst_sb :: inst_sb_none

inst_sb_none ¶
Source

inst_sb_none :: proc "contextless" () -> Instruction {…}

inst_sbc ¶
Source

inst_sbc :: inst_sbc_r_r_r

inst_sbc_r_r_r ¶
Source

inst_sbc_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sbclb ¶
Source

inst_sbclb :: inst_sbclb_zs_zs_zs

inst_sbclb_zd_zd_zd ¶
Source

inst_sbclb_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_sbclb_zs_zs_zs ¶
Source

inst_sbclb_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_sbclt ¶
Source

inst_sbclt :: inst_sbclt_zs_zs_zs

inst_sbclt_zd_zd_zd ¶
Source

inst_sbclt_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_sbclt_zs_zs_zs ¶
Source

inst_sbclt_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_sbcs ¶
Source

inst_sbcs :: inst_sbcs_r_r_r

inst_sbcs_r_r_r ¶
Source

inst_sbcs_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_scvtf ¶
Source

inst_scvtf :: inst_scvtf_r_r

inst_scvtf_r_r ¶
Source

inst_scvtf_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_scvtf_v2d_v2d ¶
Source

inst_scvtf_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_scvtf_v2s_v2s ¶
Source

inst_scvtf_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_scvtf_v4h_v4h ¶
Source

inst_scvtf_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_scvtf_v4s_v4s ¶
Source

inst_scvtf_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_scvtf_v8h_v8h ¶
Source

inst_scvtf_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sdiv_r_r_r ¶
Source

inst_sdiv_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_sdiv

inst_sdiv_zd_p_zd_zd ¶
Source

inst_sdiv_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_sdiv_zs_p_zs_zs ¶
Source

inst_sdiv_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_sdiv

inst_sdot ¶
Source

inst_sdot :: inst_sdot_v2s_v8b_v8b

inst_sdot_v2s_v8b_v8b ¶
Source

inst_sdot_v2s_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sdot_v4s_v16b_v16b ¶
Source

inst_sdot_v4s_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sel ¶
Source

inst_sel :: inst_sel_pb_p_pb_pb

inst_sel_pb_p_pb_pb ¶
Source

inst_sel_pb_p_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_sete ¶
Source

inst_sete :: inst_sete_r_r_r

inst_sete_r_r_r ¶
Source

inst_sete_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_setffr ¶
Source

inst_setffr :: inst_setffr_none

inst_setffr_none ¶
Source

inst_setffr_none :: proc "contextless" () -> Instruction {…}

inst_setm ¶
Source

inst_setm :: inst_setm_r_r_r

inst_setm_r_r_r ¶
Source

inst_setm_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_setp ¶
Source

inst_setp :: inst_setp_r_r_r

inst_setp_r_r_r ¶
Source

inst_setp_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sev ¶
Source

inst_sev :: inst_sev_none

inst_sev_none ¶
Source

inst_sev_none :: proc "contextless" () -> Instruction {…}

inst_sevl ¶
Source

inst_sevl :: inst_sevl_none

inst_sevl_none ¶
Source

inst_sevl_none :: proc "contextless" () -> Instruction {…}

inst_sha1c ¶
Source

inst_sha1c :: inst_sha1c_r_r_v4s

inst_sha1c_r_r_v4s ¶
Source

inst_sha1c_r_r_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sha1h ¶
Source

inst_sha1h :: inst_sha1h_r_r

inst_sha1h_r_r ¶
Source

inst_sha1h_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sha1m ¶
Source

inst_sha1m :: inst_sha1m_r_r_v4s

inst_sha1m_r_r_v4s ¶
Source

inst_sha1m_r_r_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sha1p ¶
Source

inst_sha1p :: inst_sha1p_r_r_v4s

inst_sha1p_r_r_v4s ¶
Source

inst_sha1p_r_r_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sha1su0 ¶
Source

inst_sha1su0 :: inst_sha1su0_v4s_v4s_v4s

inst_sha1su0_v4s_v4s_v4s ¶
Source

inst_sha1su0_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sha1su1 ¶
Source

inst_sha1su1 :: inst_sha1su1_v4s_v4s

inst_sha1su1_v4s_v4s ¶
Source

inst_sha1su1_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sha256h ¶
Source

inst_sha256h :: inst_sha256h_r_r_v4s

inst_sha256h2 ¶
Source

inst_sha256h2 :: inst_sha256h2_r_r_v4s

inst_sha256h2_r_r_v4s ¶
Source

inst_sha256h2_r_r_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sha256h_r_r_v4s ¶
Source

inst_sha256h_r_r_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sha256su0 ¶
Source

inst_sha256su0 :: inst_sha256su0_v4s_v4s

inst_sha256su0_v4s_v4s ¶
Source

inst_sha256su0_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sha256su1 ¶
Source

inst_sha256su1 :: inst_sha256su1_v4s_v4s_v4s

inst_sha256su1_v4s_v4s_v4s ¶
Source

inst_sha256su1_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sha512h ¶
Source

inst_sha512h :: inst_sha512h_r_r_v2d

inst_sha512h2 ¶
Source

inst_sha512h2 :: inst_sha512h2_r_r_v2d

inst_sha512h2_r_r_v2d ¶
Source

inst_sha512h2_r_r_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sha512h_r_r_v2d ¶
Source

inst_sha512h_r_r_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sha512su0 ¶
Source

inst_sha512su0 :: inst_sha512su0_v2d_v2d

inst_sha512su0_v2d_v2d ¶
Source

inst_sha512su0_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sha512su1 ¶
Source

inst_sha512su1 :: inst_sha512su1_v2d_v2d_v2d

inst_sha512su1_v2d_v2d_v2d ¶
Source

inst_sha512su1_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_shadd ¶
Source

inst_shadd :: inst_shadd_v8b_v8b_v8b

inst_shadd_v16b_v16b_v16b ¶
Source

inst_shadd_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_shadd_v2s_v2s_v2s ¶
Source

inst_shadd_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_shadd_v4h_v4h_v4h ¶
Source

inst_shadd_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_shadd_v4s_v4s_v4s ¶
Source

inst_shadd_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_shadd_v8b_v8b_v8b ¶
Source

inst_shadd_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_shadd_v8h_v8h_v8h ¶
Source

inst_shadd_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_shl ¶
Source

inst_shl :: inst_shl_v8b_v8b_i

inst_shl_v16b_v16b_i ¶
Source

inst_shl_v16b_v16b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_shl_v2d_v2d_i ¶
Source

inst_shl_v2d_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_shl_v2s_v2s_i ¶
Source

inst_shl_v2s_v2s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_shl_v4h_v4h_i ¶
Source

inst_shl_v4h_v4h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_shl_v4s_v4s_i ¶
Source

inst_shl_v4s_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_shl_v8b_v8b_i ¶
Source

inst_shl_v8b_v8b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_shl_v8h_v8h_i ¶
Source

inst_shl_v8h_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_shrn ¶
Source

inst_shrn :: inst_shrn_v8b_v8h_i

inst_shrn2 ¶
Source

inst_shrn2 :: inst_shrn2_v16b_v8h_i

inst_shrn2_v16b_v8h_i ¶
Source

inst_shrn2_v16b_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_shrn2_v4s_v2d_i ¶
Source

inst_shrn2_v4s_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_shrn2_v8h_v4s_i ¶
Source

inst_shrn2_v8h_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_shrn_v2s_v2d_i ¶
Source

inst_shrn_v2s_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_shrn_v4h_v4s_i ¶
Source

inst_shrn_v4h_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_shrn_v8b_v8h_i ¶
Source

inst_shrn_v8b_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_shsub ¶
Source

inst_shsub :: inst_shsub_v8b_v8b_v8b

inst_shsub_v16b_v16b_v16b ¶
Source

inst_shsub_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_shsub_v2s_v2s_v2s ¶
Source

inst_shsub_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_shsub_v4h_v4h_v4h ¶
Source

inst_shsub_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_shsub_v4s_v4s_v4s ¶
Source

inst_shsub_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_shsub_v8b_v8b_v8b ¶
Source

inst_shsub_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_shsub_v8h_v8h_v8h ¶
Source

inst_shsub_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sli ¶
Source

inst_sli :: inst_sli_v8b_v8b_i

inst_sli_v16b_v16b_i ¶
Source

inst_sli_v16b_v16b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sli_v2d_v2d_i ¶
Source

inst_sli_v2d_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sli_v2s_v2s_i ¶
Source

inst_sli_v2s_v2s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sli_v4h_v4h_i ¶
Source

inst_sli_v4h_v4h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sli_v4s_v4s_i ¶
Source

inst_sli_v4s_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sli_v8b_v8b_i ¶
Source

inst_sli_v8b_v8b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sli_v8h_v8h_i ¶
Source

inst_sli_v8h_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sm3partw1 ¶
Source

inst_sm3partw1 :: inst_sm3partw1_v4s_v4s_v4s

inst_sm3partw1_v4s_v4s_v4s ¶
Source

inst_sm3partw1_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sm3partw2 ¶
Source

inst_sm3partw2 :: inst_sm3partw2_v4s_v4s_v4s

inst_sm3partw2_v4s_v4s_v4s ¶
Source

inst_sm3partw2_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sm3ss1 ¶
Source

inst_sm3ss1 :: inst_sm3ss1_v4s_v4s_v4s_v4s

inst_sm3ss1_v4s_v4s_v4s_v4s ¶
Source

inst_sm3ss1_v4s_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction {…}

inst_sm3tt1a ¶
Source

inst_sm3tt1a :: inst_sm3tt1a_v4s_v4s_ves_i

inst_sm3tt1a_v4s_v4s_ves_i ¶
Source

inst_sm3tt1a_v4s_v4s_ves_i :: proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction {…}

inst_sm3tt1b ¶
Source

inst_sm3tt1b :: inst_sm3tt1b_v4s_v4s_ves_i

inst_sm3tt1b_v4s_v4s_ves_i ¶
Source

inst_sm3tt1b_v4s_v4s_ves_i :: proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction {…}

inst_sm3tt2a ¶
Source

inst_sm3tt2a :: inst_sm3tt2a_v4s_v4s_ves_i

inst_sm3tt2a_v4s_v4s_ves_i ¶
Source

inst_sm3tt2a_v4s_v4s_ves_i :: proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction {…}

inst_sm3tt2b ¶
Source

inst_sm3tt2b :: inst_sm3tt2b_v4s_v4s_ves_i

inst_sm3tt2b_v4s_v4s_ves_i ¶
Source

inst_sm3tt2b_v4s_v4s_ves_i :: proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction {…}

inst_sm4e ¶
Source

inst_sm4e :: inst_sm4e_v4s_v4s

inst_sm4e_v4s_v4s ¶
Source

inst_sm4e_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sm4ekey ¶
Source

inst_sm4ekey :: inst_sm4ekey_v4s_v4s_v4s

inst_sm4ekey_v4s_v4s_v4s ¶
Source

inst_sm4ekey_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smaddl ¶
Source

inst_smaddl :: inst_smaddl_r_r_r_r

inst_smaddl_r_r_r_r ¶
Source

inst_smaddl_r_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction {…}

inst_smax_v16b_v16b_v16b ¶
Source

inst_smax_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smax_v2s_v2s_v2s ¶
Source

inst_smax_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smax_v4h_v4h_v4h ¶
Source

inst_smax_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smax_v4s_v4s_v4s ¶
Source

inst_smax_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smax_v8b_v8b_v8b ¶
Source

inst_smax_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_smax

inst_smax_v8h_v8h_v8h ¶
Source

inst_smax_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smax_zb_p_zb_zb ¶
Source

inst_smax_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_smax

inst_smax_zd_p_zd_zd ¶
Source

inst_smax_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_smax_zh_p_zh_zh ¶
Source

inst_smax_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_smax_zs_p_zs_zs ¶
Source

inst_smax_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_smaxp ¶
Source

inst_smaxp :: inst_smaxp_v8b_v8b_v8b

inst_smaxp_v16b_v16b_v16b ¶
Source

inst_smaxp_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smaxp_v2s_v2s_v2s ¶
Source

inst_smaxp_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smaxp_v4h_v4h_v4h ¶
Source

inst_smaxp_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smaxp_v4s_v4s_v4s ¶
Source

inst_smaxp_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smaxp_v8b_v8b_v8b ¶
Source

inst_smaxp_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smaxp_v8h_v8h_v8h ¶
Source

inst_smaxp_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smaxv ¶
Source

inst_smaxv :: inst_smaxv_r_v8b

inst_smaxv_r_v16b ¶
Source

inst_smaxv_r_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_smaxv_r_v4h ¶
Source

inst_smaxv_r_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_smaxv_r_v4s ¶
Source

inst_smaxv_r_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_smaxv_r_v8b ¶
Source

inst_smaxv_r_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_smaxv_r_v8h ¶
Source

inst_smaxv_r_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_smc ¶
Source

inst_smc :: inst_smc_i

inst_smc_i ¶
Source

inst_smc_i :: proc "contextless" (imm: i64) -> Instruction {…}

inst_smin_v16b_v16b_v16b ¶
Source

inst_smin_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smin_v2s_v2s_v2s ¶
Source

inst_smin_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smin_v4h_v4h_v4h ¶
Source

inst_smin_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smin_v4s_v4s_v4s ¶
Source

inst_smin_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smin_v8b_v8b_v8b ¶
Source

inst_smin_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_smin

inst_smin_v8h_v8h_v8h ¶
Source

inst_smin_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smin_zb_p_zb_zb ¶
Source

inst_smin_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_smin

inst_smin_zd_p_zd_zd ¶
Source

inst_smin_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_smin_zh_p_zh_zh ¶
Source

inst_smin_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_smin_zs_p_zs_zs ¶
Source

inst_smin_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_sminp ¶
Source

inst_sminp :: inst_sminp_v8b_v8b_v8b

inst_sminp_v16b_v16b_v16b ¶
Source

inst_sminp_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sminp_v2s_v2s_v2s ¶
Source

inst_sminp_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sminp_v4h_v4h_v4h ¶
Source

inst_sminp_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sminp_v4s_v4s_v4s ¶
Source

inst_sminp_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sminp_v8b_v8b_v8b ¶
Source

inst_sminp_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sminp_v8h_v8h_v8h ¶
Source

inst_sminp_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sminv ¶
Source

inst_sminv :: inst_sminv_r_v8b

inst_sminv_r_v16b ¶
Source

inst_sminv_r_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sminv_r_v4h ¶
Source

inst_sminv_r_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sminv_r_v4s ¶
Source

inst_sminv_r_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sminv_r_v8b ¶
Source

inst_sminv_r_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sminv_r_v8h ¶
Source

inst_sminv_r_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_smlal ¶
Source

inst_smlal :: inst_smlal_v8h_v8b_v8b

inst_smlal2 ¶
Source

inst_smlal2 :: inst_smlal2_v8h_v16b_v16b

inst_smlal2_v2d_v4s_v4s ¶
Source

inst_smlal2_v2d_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smlal2_v4s_v8h_v8h ¶
Source

inst_smlal2_v4s_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smlal2_v8h_v16b_v16b ¶
Source

inst_smlal2_v8h_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smlal_v2d_v2s_v2s ¶
Source

inst_smlal_v2d_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smlal_v4s_v4h_v4h ¶
Source

inst_smlal_v4s_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smlal_v8h_v8b_v8b ¶
Source

inst_smlal_v8h_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smlsl ¶
Source

inst_smlsl :: inst_smlsl_v8h_v8b_v8b

inst_smlsl2 ¶
Source

inst_smlsl2 :: inst_smlsl2_v8h_v16b_v16b

inst_smlsl2_v2d_v4s_v4s ¶
Source

inst_smlsl2_v2d_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smlsl2_v4s_v8h_v8h ¶
Source

inst_smlsl2_v4s_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smlsl2_v8h_v16b_v16b ¶
Source

inst_smlsl2_v8h_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smlsl_v2d_v2s_v2s ¶
Source

inst_smlsl_v2d_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smlsl_v4s_v4h_v4h ¶
Source

inst_smlsl_v4s_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smlsl_v8h_v8b_v8b ¶
Source

inst_smlsl_v8h_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smopa ¶
Source

inst_smopa :: inst_smopa_i_p_p_zb_zb

inst_smopa_i_p_p_zb_zb ¶
Source

inst_smopa_i_p_p_zb_zb :: proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_smopa_i_p_p_zh_zh ¶
Source

inst_smopa_i_p_p_zh_zh :: proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_smops ¶
Source

inst_smops :: inst_smops_i_p_p_zb_zb

inst_smops_i_p_p_zb_zb ¶
Source

inst_smops_i_p_p_zb_zb :: proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_smops_i_p_p_zh_zh ¶
Source

inst_smops_i_p_p_zh_zh :: proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_smstart ¶
Source

inst_smstart :: inst_smstart_none

inst_smstart_none ¶
Source

inst_smstart_none :: proc "contextless" () -> Instruction {…}

inst_smstop ¶
Source

inst_smstop :: inst_smstop_none

inst_smstop_none ¶
Source

inst_smstop_none :: proc "contextless" () -> Instruction {…}

inst_smsubl ¶
Source

inst_smsubl :: inst_smsubl_r_r_r_r

inst_smsubl_r_r_r_r ¶
Source

inst_smsubl_r_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction {…}

inst_smulh_r_r_r ¶
Source

inst_smulh_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_smulh

inst_smulh_zb_p_zb_zb ¶
Source

inst_smulh_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_smulh

inst_smulh_zd_p_zd_zd ¶
Source

inst_smulh_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_smulh_zh_p_zh_zh ¶
Source

inst_smulh_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_smulh_zs_p_zs_zs ¶
Source

inst_smulh_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_smull ¶
Source

inst_smull :: inst_smull_v8h_v8b_v8b

inst_smull2 ¶
Source

inst_smull2 :: inst_smull2_v8h_v16b_v16b

inst_smull2_v2d_v4s_v4s ¶
Source

inst_smull2_v2d_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smull2_v4s_v8h_v8h ¶
Source

inst_smull2_v4s_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smull2_v8h_v16b_v16b ¶
Source

inst_smull2_v8h_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smull_v2d_v2s_v2s ¶
Source

inst_smull_v2d_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smull_v4s_v4h_v4h ¶
Source

inst_smull_v4s_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_smull_v8h_v8b_v8b ¶
Source

inst_smull_v8h_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_splice ¶
Source

inst_splice :: inst_splice_zb_p_zb_zb

inst_splice_zb_p_zb_zb ¶
Source

inst_splice_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_sqadd_v16b_v16b_v16b ¶
Source

inst_sqadd_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqadd_v2d_v2d_v2d ¶
Source

inst_sqadd_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqadd_v2s_v2s_v2s ¶
Source

inst_sqadd_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqadd_v4h_v4h_v4h ¶
Source

inst_sqadd_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqadd_v4s_v4s_v4s ¶
Source

inst_sqadd_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqadd_v8b_v8b_v8b ¶
Source

inst_sqadd_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_sqadd

inst_sqadd_v8h_v8h_v8h ¶
Source

inst_sqadd_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqadd_zb_zb_zb ¶
Source

inst_sqadd_zb_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_sqadd

inst_sqadd_zd_zd_zd ¶
Source

inst_sqadd_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_sqadd_zh_zh_zh ¶
Source

inst_sqadd_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_sqadd_zs_zs_zs ¶
Source

inst_sqadd_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_sqdecb_r_i_i ¶
Source

inst_sqdecb_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_sqdecb

inst_sqdecb_r_r_i_i ¶
Source

inst_sqdecb_r_r_i_i :: proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_sqdecb

inst_sqdecd_r_i_i ¶
Source

inst_sqdecd_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_sqdecd

inst_sqdecd_r_r_i_i ¶
Source

inst_sqdecd_r_r_i_i :: proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_sqdecd

inst_sqdecd_zd_i_i ¶
Source

inst_sqdecd_zd_i_i :: proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_sqdecd

inst_sqdech_r_i_i ¶
Source

inst_sqdech_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_sqdech

inst_sqdech_r_r_i_i ¶
Source

inst_sqdech_r_r_i_i :: proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_sqdech

inst_sqdech_zh_i_i ¶
Source

inst_sqdech_zh_i_i :: proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_sqdech

inst_sqdecp_r_pb ¶
Source

inst_sqdecp_r_pb :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

Related Procedure Groups

inst_sqdecp

inst_sqdecp_r_pb_r ¶
Source

inst_sqdecp_r_pb_r :: proc "contextless" (dst: Register, rz1: u8, src: Register) -> Instruction {…}

Related Procedure Groups

inst_sqdecp

inst_sqdecp_r_pd ¶
Source

inst_sqdecp_r_pd :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

inst_sqdecp_r_pd_r ¶
Source

inst_sqdecp_r_pd_r :: proc "contextless" (dst: Register, rz1: u8, src: Register) -> Instruction {…}

inst_sqdecp_r_ph ¶
Source

inst_sqdecp_r_ph :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

inst_sqdecp_r_ph_r ¶
Source

inst_sqdecp_r_ph_r :: proc "contextless" (dst: Register, rz1: u8, src: Register) -> Instruction {…}

inst_sqdecp_r_ps ¶
Source

inst_sqdecp_r_ps :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

inst_sqdecp_r_ps_r ¶
Source

inst_sqdecp_r_ps_r :: proc "contextless" (dst: Register, rz1: u8, src: Register) -> Instruction {…}

inst_sqdecp_zd_pd ¶
Source

inst_sqdecp_zd_pd :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

inst_sqdecp_zh_ph ¶
Source

inst_sqdecp_zh_ph :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

Related Procedure Groups

inst_sqdecp

inst_sqdecp_zs_ps ¶
Source

inst_sqdecp_zs_ps :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

inst_sqdecw_r_i_i ¶
Source

inst_sqdecw_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_sqdecw

inst_sqdecw_r_r_i_i ¶
Source

inst_sqdecw_r_r_i_i :: proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_sqdecw

inst_sqdecw_zs_i_i ¶
Source

inst_sqdecw_zs_i_i :: proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_sqdecw

inst_sqdmlal ¶
Source

inst_sqdmlal :: inst_sqdmlal_v4s_v4h_v4h

inst_sqdmlal2 ¶
Source

inst_sqdmlal2 :: inst_sqdmlal2_v4s_v8h_v8h

inst_sqdmlal2_v2d_v4s_v4s ¶
Source

inst_sqdmlal2_v2d_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqdmlal2_v4s_v8h_v8h ¶
Source

inst_sqdmlal2_v4s_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqdmlal_v2d_v2s_v2s ¶
Source

inst_sqdmlal_v2d_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqdmlal_v4s_v4h_v4h ¶
Source

inst_sqdmlal_v4s_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqdmlsl ¶
Source

inst_sqdmlsl :: inst_sqdmlsl_v4s_v4h_v4h

inst_sqdmlsl2 ¶
Source

inst_sqdmlsl2 :: inst_sqdmlsl2_v4s_v8h_v8h

inst_sqdmlsl2_v2d_v4s_v4s ¶
Source

inst_sqdmlsl2_v2d_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqdmlsl2_v4s_v8h_v8h ¶
Source

inst_sqdmlsl2_v4s_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqdmlsl_v2d_v2s_v2s ¶
Source

inst_sqdmlsl_v2d_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqdmlsl_v4s_v4h_v4h ¶
Source

inst_sqdmlsl_v4s_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqdmulh ¶
Source

inst_sqdmulh :: inst_sqdmulh_v4h_v4h_v4h

inst_sqdmulh_v2s_v2s_v2s ¶
Source

inst_sqdmulh_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqdmulh_v4h_v4h_v4h ¶
Source

inst_sqdmulh_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqdmulh_v4s_v4s_v4s ¶
Source

inst_sqdmulh_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqdmulh_v8h_v8h_v8h ¶
Source

inst_sqdmulh_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqdmull ¶
Source

inst_sqdmull :: inst_sqdmull_v4s_v4h_v4h

inst_sqdmull2 ¶
Source

inst_sqdmull2 :: inst_sqdmull2_v4s_v8h_v8h

inst_sqdmull2_v2d_v4s_v4s ¶
Source

inst_sqdmull2_v2d_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqdmull2_v4s_v8h_v8h ¶
Source

inst_sqdmull2_v4s_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqdmull_v2d_v2s_v2s ¶
Source

inst_sqdmull_v2d_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqdmull_v4s_v4h_v4h ¶
Source

inst_sqdmull_v4s_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqincb_r_i_i ¶
Source

inst_sqincb_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_sqincb

inst_sqincb_r_r_i_i ¶
Source

inst_sqincb_r_r_i_i :: proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_sqincb

inst_sqincd_r_i_i ¶
Source

inst_sqincd_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_sqincd

inst_sqincd_r_r_i_i ¶
Source

inst_sqincd_r_r_i_i :: proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_sqincd

inst_sqincd_zd_i_i ¶
Source

inst_sqincd_zd_i_i :: proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_sqincd

inst_sqinch_r_i_i ¶
Source

inst_sqinch_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_sqinch

inst_sqinch_r_r_i_i ¶
Source

inst_sqinch_r_r_i_i :: proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_sqinch

inst_sqinch_zh_i_i ¶
Source

inst_sqinch_zh_i_i :: proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_sqinch

inst_sqincp_r_pb ¶
Source

inst_sqincp_r_pb :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

Related Procedure Groups

inst_sqincp

inst_sqincp_r_pb_r ¶
Source

inst_sqincp_r_pb_r :: proc "contextless" (dst: Register, rz1: u8, src: Register) -> Instruction {…}

Related Procedure Groups

inst_sqincp

inst_sqincp_r_pd ¶
Source

inst_sqincp_r_pd :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

inst_sqincp_r_pd_r ¶
Source

inst_sqincp_r_pd_r :: proc "contextless" (dst: Register, rz1: u8, src: Register) -> Instruction {…}

inst_sqincp_r_ph ¶
Source

inst_sqincp_r_ph :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

inst_sqincp_r_ph_r ¶
Source

inst_sqincp_r_ph_r :: proc "contextless" (dst: Register, rz1: u8, src: Register) -> Instruction {…}

inst_sqincp_r_ps ¶
Source

inst_sqincp_r_ps :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

inst_sqincp_r_ps_r ¶
Source

inst_sqincp_r_ps_r :: proc "contextless" (dst: Register, rz1: u8, src: Register) -> Instruction {…}

inst_sqincp_zd_pd ¶
Source

inst_sqincp_zd_pd :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

inst_sqincp_zh_ph ¶
Source

inst_sqincp_zh_ph :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

Related Procedure Groups

inst_sqincp

inst_sqincp_zs_ps ¶
Source

inst_sqincp_zs_ps :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

inst_sqincw_r_i_i ¶
Source

inst_sqincw_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_sqincw

inst_sqincw_r_r_i_i ¶
Source

inst_sqincw_r_r_i_i :: proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_sqincw

inst_sqincw_zs_i_i ¶
Source

inst_sqincw_zs_i_i :: proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_sqincw

inst_sqrdmlah ¶
Source

inst_sqrdmlah :: inst_sqrdmlah_zb_zb_zb

inst_sqrdmlah_zb_zb_zb ¶
Source

inst_sqrdmlah_zb_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_sqrdmlah_zd_zd_zd ¶
Source

inst_sqrdmlah_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_sqrdmlah_zh_zh_zh ¶
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inst_sqrdmlah_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_sqrdmlah_zs_zs_zs ¶
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inst_sqrdmlah_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_sqrdmlsh ¶
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inst_sqrdmlsh :: inst_sqrdmlsh_zb_zb_zb

inst_sqrdmlsh_zb_zb_zb ¶
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inst_sqrdmlsh_zb_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_sqrdmlsh_zd_zd_zd ¶
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inst_sqrdmlsh_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_sqrdmlsh_zh_zh_zh ¶
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inst_sqrdmlsh_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_sqrdmlsh_zs_zs_zs ¶
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inst_sqrdmlsh_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_sqrdmulh ¶
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inst_sqrdmulh :: inst_sqrdmulh_v4h_v4h_v4h

inst_sqrdmulh_v2s_v2s_v2s ¶
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inst_sqrdmulh_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqrdmulh_v4h_v4h_v4h ¶
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inst_sqrdmulh_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqrdmulh_v4s_v4s_v4s ¶
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inst_sqrdmulh_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqrdmulh_v8h_v8h_v8h ¶
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inst_sqrdmulh_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqrshrn ¶
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inst_sqrshrn :: inst_sqrshrn_v8b_v8h_i

inst_sqrshrn2 ¶
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inst_sqrshrn2 :: inst_sqrshrn2_v16b_v8h_i

inst_sqrshrn2_v16b_v8h_i ¶
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inst_sqrshrn2_v16b_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqrshrn2_v4s_v2d_i ¶
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inst_sqrshrn2_v4s_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqrshrn2_v8h_v4s_i ¶
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inst_sqrshrn2_v8h_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqrshrn_v2s_v2d_i ¶
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inst_sqrshrn_v2s_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqrshrn_v4h_v4s_i ¶
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inst_sqrshrn_v4h_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqrshrn_v8b_v8h_i ¶
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inst_sqrshrn_v8b_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqrshrun ¶
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inst_sqrshrun :: inst_sqrshrun_v8b_v8h_i

inst_sqrshrun2 ¶
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inst_sqrshrun2 :: inst_sqrshrun2_v16b_v8h_i

inst_sqrshrun2_v16b_v8h_i ¶
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inst_sqrshrun2_v16b_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqrshrun2_v4s_v2d_i ¶
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inst_sqrshrun2_v4s_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqrshrun2_v8h_v4s_i ¶
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inst_sqrshrun2_v8h_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqrshrun_v2s_v2d_i ¶
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inst_sqrshrun_v2s_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqrshrun_v4h_v4s_i ¶
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inst_sqrshrun_v4h_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqrshrun_v8b_v8h_i ¶
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inst_sqrshrun_v8b_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshl ¶
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inst_sqshl :: inst_sqshl_v8b_v8b_i

inst_sqshl_v16b_v16b_i ¶
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inst_sqshl_v16b_v16b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshl_v2d_v2d_i ¶
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inst_sqshl_v2d_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshl_v2s_v2s_i ¶
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inst_sqshl_v2s_v2s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshl_v4h_v4h_i ¶
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inst_sqshl_v4h_v4h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshl_v4s_v4s_i ¶
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inst_sqshl_v4s_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshl_v8b_v8b_i ¶
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inst_sqshl_v8b_v8b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshl_v8h_v8h_i ¶
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inst_sqshl_v8h_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshlu ¶
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inst_sqshlu :: inst_sqshlu_v8b_v8b_i

inst_sqshlu_v16b_v16b_i ¶
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inst_sqshlu_v16b_v16b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshlu_v2d_v2d_i ¶
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inst_sqshlu_v2d_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshlu_v2s_v2s_i ¶
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inst_sqshlu_v2s_v2s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshlu_v4h_v4h_i ¶
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inst_sqshlu_v4h_v4h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshlu_v4s_v4s_i ¶
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inst_sqshlu_v4s_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshlu_v8b_v8b_i ¶
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inst_sqshlu_v8b_v8b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshlu_v8h_v8h_i ¶
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inst_sqshlu_v8h_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshrn ¶
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inst_sqshrn :: inst_sqshrn_v8b_v8h_i

inst_sqshrn2 ¶
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inst_sqshrn2 :: inst_sqshrn2_v16b_v8h_i

inst_sqshrn2_v16b_v8h_i ¶
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inst_sqshrn2_v16b_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshrn2_v4s_v2d_i ¶
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inst_sqshrn2_v4s_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshrn2_v8h_v4s_i ¶
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inst_sqshrn2_v8h_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshrn_v2s_v2d_i ¶
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inst_sqshrn_v2s_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshrn_v4h_v4s_i ¶
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inst_sqshrn_v4h_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshrn_v8b_v8h_i ¶
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inst_sqshrn_v8b_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshrun ¶
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inst_sqshrun :: inst_sqshrun_v8b_v8h_i

inst_sqshrun2 ¶
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inst_sqshrun2 :: inst_sqshrun2_v16b_v8h_i

inst_sqshrun2_v16b_v8h_i ¶
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inst_sqshrun2_v16b_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshrun2_v4s_v2d_i ¶
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inst_sqshrun2_v4s_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshrun2_v8h_v4s_i ¶
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inst_sqshrun2_v8h_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshrun_v2s_v2d_i ¶
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inst_sqshrun_v2s_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshrun_v4h_v4s_i ¶
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inst_sqshrun_v4h_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqshrun_v8b_v8h_i ¶
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inst_sqshrun_v8b_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sqsub_v16b_v16b_v16b ¶
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inst_sqsub_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqsub_v2d_v2d_v2d ¶
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inst_sqsub_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqsub_v2s_v2s_v2s ¶
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inst_sqsub_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqsub_v4h_v4h_v4h ¶
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inst_sqsub_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqsub_v4s_v4s_v4s ¶
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inst_sqsub_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqsub_v8b_v8b_v8b ¶
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inst_sqsub_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_sqsub

inst_sqsub_v8h_v8h_v8h ¶
Source

inst_sqsub_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sqsub_zb_zb_zb ¶
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inst_sqsub_zb_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_sqsub

inst_sqsub_zd_zd_zd ¶
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inst_sqsub_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_sqsub_zh_zh_zh ¶
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inst_sqsub_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_sqsub_zs_zs_zs ¶
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inst_sqsub_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_sqxtn ¶
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inst_sqxtn :: inst_sqxtn_v8b_v8h

inst_sqxtn2 ¶
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inst_sqxtn2 :: inst_sqxtn2_v16b_v8h

inst_sqxtn2_v16b_v8h ¶
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inst_sqxtn2_v16b_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sqxtn2_v4s_v2d ¶
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inst_sqxtn2_v4s_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sqxtn2_v8h_v4s ¶
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inst_sqxtn2_v8h_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sqxtn_v2s_v2d ¶
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inst_sqxtn_v2s_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sqxtn_v4h_v4s ¶
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inst_sqxtn_v4h_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sqxtn_v8b_v8h ¶
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inst_sqxtn_v8b_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sqxtun ¶
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inst_sqxtun :: inst_sqxtun_v8b_v8h

inst_sqxtun2 ¶
Source

inst_sqxtun2 :: inst_sqxtun2_v16b_v8h

inst_sqxtun2_v16b_v8h ¶
Source

inst_sqxtun2_v16b_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sqxtun2_v4s_v2d ¶
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inst_sqxtun2_v4s_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sqxtun2_v8h_v4s ¶
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inst_sqxtun2_v8h_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sqxtun_v2s_v2d ¶
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inst_sqxtun_v2s_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sqxtun_v4h_v4s ¶
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inst_sqxtun_v4h_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sqxtun_v8b_v8h ¶
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inst_sqxtun_v8b_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_srhadd ¶
Source

inst_srhadd :: inst_srhadd_v8b_v8b_v8b

inst_srhadd_v16b_v16b_v16b ¶
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inst_srhadd_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_srhadd_v2s_v2s_v2s ¶
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inst_srhadd_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_srhadd_v4h_v4h_v4h ¶
Source

inst_srhadd_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_srhadd_v4s_v4s_v4s ¶
Source

inst_srhadd_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_srhadd_v8b_v8b_v8b ¶
Source

inst_srhadd_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_srhadd_v8h_v8h_v8h ¶
Source

inst_srhadd_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sri ¶
Source

inst_sri :: inst_sri_v8b_v8b_i

inst_sri_v16b_v16b_i ¶
Source

inst_sri_v16b_v16b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sri_v2d_v2d_i ¶
Source

inst_sri_v2d_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sri_v2s_v2s_i ¶
Source

inst_sri_v2s_v2s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sri_v4h_v4h_i ¶
Source

inst_sri_v4h_v4h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sri_v4s_v4s_i ¶
Source

inst_sri_v4s_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sri_v8b_v8b_i ¶
Source

inst_sri_v8b_v8b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sri_v8h_v8h_i ¶
Source

inst_sri_v8h_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_srshl ¶
Source

inst_srshl :: inst_srshl_v8b_v8b_v8b

inst_srshl_v16b_v16b_v16b ¶
Source

inst_srshl_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_srshl_v2d_v2d_v2d ¶
Source

inst_srshl_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_srshl_v2s_v2s_v2s ¶
Source

inst_srshl_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_srshl_v4h_v4h_v4h ¶
Source

inst_srshl_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_srshl_v4s_v4s_v4s ¶
Source

inst_srshl_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_srshl_v8b_v8b_v8b ¶
Source

inst_srshl_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_srshl_v8h_v8h_v8h ¶
Source

inst_srshl_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_srshr ¶
Source

inst_srshr :: inst_srshr_v8b_v8b_i

inst_srshr_v16b_v16b_i ¶
Source

inst_srshr_v16b_v16b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_srshr_v2d_v2d_i ¶
Source

inst_srshr_v2d_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_srshr_v2s_v2s_i ¶
Source

inst_srshr_v2s_v2s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_srshr_v4h_v4h_i ¶
Source

inst_srshr_v4h_v4h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_srshr_v4s_v4s_i ¶
Source

inst_srshr_v4s_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_srshr_v8b_v8b_i ¶
Source

inst_srshr_v8b_v8b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_srshr_v8h_v8h_i ¶
Source

inst_srshr_v8h_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_srsra ¶
Source

inst_srsra :: inst_srsra_v8b_v8b_i

inst_srsra_v16b_v16b_i ¶
Source

inst_srsra_v16b_v16b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_srsra_v2d_v2d_i ¶
Source

inst_srsra_v2d_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_srsra_v2s_v2s_i ¶
Source

inst_srsra_v2s_v2s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_srsra_v4h_v4h_i ¶
Source

inst_srsra_v4h_v4h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_srsra_v4s_v4s_i ¶
Source

inst_srsra_v4s_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_srsra_v8b_v8b_i ¶
Source

inst_srsra_v8b_v8b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_srsra_v8h_v8h_i ¶
Source

inst_srsra_v8h_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sshl ¶
Source

inst_sshl :: inst_sshl_v8b_v8b_v8b

inst_sshl_v16b_v16b_v16b ¶
Source

inst_sshl_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sshl_v2d_v2d_v2d ¶
Source

inst_sshl_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sshl_v2s_v2s_v2s ¶
Source

inst_sshl_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sshl_v4h_v4h_v4h ¶
Source

inst_sshl_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sshl_v4s_v4s_v4s ¶
Source

inst_sshl_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sshl_v8b_v8b_v8b ¶
Source

inst_sshl_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sshl_v8h_v8h_v8h ¶
Source

inst_sshl_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sshll ¶
Source

inst_sshll :: inst_sshll_v8h_v8b_i

inst_sshll2 ¶
Source

inst_sshll2 :: inst_sshll2_v8h_v16b_i

inst_sshll2_v2d_v4s_i ¶
Source

inst_sshll2_v2d_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sshll2_v4s_v8h_i ¶
Source

inst_sshll2_v4s_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sshll2_v8h_v16b_i ¶
Source

inst_sshll2_v8h_v16b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sshll_v2d_v2s_i ¶
Source

inst_sshll_v2d_v2s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sshll_v4s_v4h_i ¶
Source

inst_sshll_v4s_v4h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sshll_v8h_v8b_i ¶
Source

inst_sshll_v8h_v8b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sshr ¶
Source

inst_sshr :: inst_sshr_v8b_v8b_i

inst_sshr_v16b_v16b_i ¶
Source

inst_sshr_v16b_v16b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sshr_v2d_v2d_i ¶
Source

inst_sshr_v2d_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sshr_v2s_v2s_i ¶
Source

inst_sshr_v2s_v2s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sshr_v4h_v4h_i ¶
Source

inst_sshr_v4h_v4h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sshr_v4s_v4s_i ¶
Source

inst_sshr_v4s_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sshr_v8b_v8b_i ¶
Source

inst_sshr_v8b_v8b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_sshr_v8h_v8h_i ¶
Source

inst_sshr_v8h_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ssra ¶
Source

inst_ssra :: inst_ssra_v8b_v8b_i

inst_ssra_v16b_v16b_i ¶
Source

inst_ssra_v16b_v16b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ssra_v2d_v2d_i ¶
Source

inst_ssra_v2d_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ssra_v2s_v2s_i ¶
Source

inst_ssra_v2s_v2s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ssra_v4h_v4h_i ¶
Source

inst_ssra_v4h_v4h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ssra_v4s_v4s_i ¶
Source

inst_ssra_v4s_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ssra_v8b_v8b_i ¶
Source

inst_ssra_v8b_v8b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ssra_v8h_v8h_i ¶
Source

inst_ssra_v8h_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ssubl ¶
Source

inst_ssubl :: inst_ssubl_v8h_v8b_v8b

inst_ssubl2 ¶
Source

inst_ssubl2 :: inst_ssubl2_v8h_v16b_v16b

inst_ssubl2_v2d_v4s_v4s ¶
Source

inst_ssubl2_v2d_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_ssubl2_v4s_v8h_v8h ¶
Source

inst_ssubl2_v4s_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_ssubl2_v8h_v16b_v16b ¶
Source

inst_ssubl2_v8h_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_ssubl_v2d_v2s_v2s ¶
Source

inst_ssubl_v2d_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_ssubl_v4s_v4h_v4h ¶
Source

inst_ssubl_v4s_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_ssubl_v8h_v8b_v8b ¶
Source

inst_ssubl_v8h_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_ssubw ¶
Source

inst_ssubw :: inst_ssubw_v8h_v8h_v8b

inst_ssubw2 ¶
Source

inst_ssubw2 :: inst_ssubw2_v8h_v8h_v16b

inst_ssubw2_v2d_v2d_v4s ¶
Source

inst_ssubw2_v2d_v2d_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_ssubw2_v4s_v4s_v8h ¶
Source

inst_ssubw2_v4s_v4s_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_ssubw2_v8h_v8h_v16b ¶
Source

inst_ssubw2_v8h_v8h_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_ssubw_v2d_v2d_v2s ¶
Source

inst_ssubw_v2d_v2d_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_ssubw_v4s_v4s_v4h ¶
Source

inst_ssubw_v4s_v4s_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_ssubw_v8h_v8h_v8b ¶
Source

inst_ssubw_v8h_v8h_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_st1_v16b_m ¶
Source

inst_st1_v16b_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_st1

inst_st1_v2d_m ¶
Source

inst_st1_v2d_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_st1_v4s_m ¶
Source

inst_st1_v4s_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_st1_v8h_m ¶
Source

inst_st1_v8h_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_st1_veb_i_m ¶
Source

inst_st1_veb_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_st1

inst_st1_ved_i_m ¶
Source

inst_st1_ved_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_st1_veh_i_m ¶
Source

inst_st1_veh_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_st1_ves_i_m ¶
Source

inst_st1_ves_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_st1b_i_p_m ¶
Source

inst_st1b_i_p_m :: proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_st1b

inst_st1b_zb_p_m ¶
Source

inst_st1b_zb_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_st1b

inst_st1b_zd_p_m ¶
Source

inst_st1b_zd_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_st1b_zpb_pn_m ¶
Source

inst_st1b_zpb_pn_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_st1b_zqb_pn_m ¶
Source

inst_st1b_zqb_pn_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_st1b_zs_p_m ¶
Source

inst_st1b_zs_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_st1d_i_p_m ¶
Source

inst_st1d_i_p_m :: proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_st1d

inst_st1d_zd_p_m ¶
Source

inst_st1d_zd_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_st1d

inst_st1d_zpd_pn_m ¶
Source

inst_st1d_zpd_pn_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_st1d_zqd_pn_m ¶
Source

inst_st1d_zqd_pn_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_st1h_i_p_m ¶
Source

inst_st1h_i_p_m :: proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_st1h

inst_st1h_zd_p_m ¶
Source

inst_st1h_zd_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_st1h_zh_p_m ¶
Source

inst_st1h_zh_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_st1h

inst_st1h_zph_pn_m ¶
Source

inst_st1h_zph_pn_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_st1h_zqh_pn_m ¶
Source

inst_st1h_zqh_pn_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_st1h_zs_p_m ¶
Source

inst_st1h_zs_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_st1q ¶
Source

inst_st1q :: inst_st1q_i_p_m

inst_st1q_i_p_m ¶
Source

inst_st1q_i_p_m :: proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction {…}

inst_st1w_i_p_m ¶
Source

inst_st1w_i_p_m :: proc "contextless" (imm: i64, rz1: u8, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_st1w

inst_st1w_zd_p_m ¶
Source

inst_st1w_zd_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_st1w_zps_pn_m ¶
Source

inst_st1w_zps_pn_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_st1w_zqs_pn_m ¶
Source

inst_st1w_zqs_pn_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_st1w_zs_p_m ¶
Source

inst_st1w_zs_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_st1w

inst_st2_v16b_m ¶
Source

inst_st2_v16b_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_st2

inst_st2_veb_i_m ¶
Source

inst_st2_veb_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_st2

inst_st2_ved_i_m ¶
Source

inst_st2_ved_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_st2_veh_i_m ¶
Source

inst_st2_veh_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_st2_ves_i_m ¶
Source

inst_st2_ves_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_st2g ¶
Source

inst_st2g :: inst_st2g_r_m

inst_st2g_r_m ¶
Source

inst_st2g_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_st3_v16b_m ¶
Source

inst_st3_v16b_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_st3

inst_st3_veb_i_m ¶
Source

inst_st3_veb_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_st3

inst_st3_ved_i_m ¶
Source

inst_st3_ved_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_st3_veh_i_m ¶
Source

inst_st3_veh_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_st3_ves_i_m ¶
Source

inst_st3_ves_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_st4_v16b_m ¶
Source

inst_st4_v16b_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_st4

inst_st4_veb_i_m ¶
Source

inst_st4_veb_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_st4

inst_st4_ved_i_m ¶
Source

inst_st4_ved_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_st4_veh_i_m ¶
Source

inst_st4_veh_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_st4_ves_i_m ¶
Source

inst_st4_ves_i_m :: proc "contextless" (dst: Register, imm: i64, mem: Memory) -> Instruction {…}

inst_stg ¶
Source

inst_stg :: inst_stg_r_m

inst_stg_r_m ¶
Source

inst_stg_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_stgm ¶
Source

inst_stgm :: inst_stgm_r_m

inst_stgm_r_m ¶
Source

inst_stgm_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_stgp ¶
Source

inst_stgp :: inst_stgp_r_r_m

inst_stgp_r_r_m ¶
Source

inst_stgp_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_stlr ¶
Source

inst_stlr :: inst_stlr_r_m

inst_stlr_r_m ¶
Source

inst_stlr_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_stlrb ¶
Source

inst_stlrb :: inst_stlrb_r_m

inst_stlrb_r_m ¶
Source

inst_stlrb_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_stlrh ¶
Source

inst_stlrh :: inst_stlrh_r_m

inst_stlrh_r_m ¶
Source

inst_stlrh_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_stlur ¶
Source

inst_stlur :: inst_stlur_r_m

inst_stlur_r_m ¶
Source

inst_stlur_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_stlurb ¶
Source

inst_stlurb :: inst_stlurb_r_m

inst_stlurb_r_m ¶
Source

inst_stlurb_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_stlurh ¶
Source

inst_stlurh :: inst_stlurh_r_m

inst_stlurh_r_m ¶
Source

inst_stlurh_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_stlxp ¶
Source

inst_stlxp :: inst_stlxp_r_r_r_m

inst_stlxp_r_r_r_m ¶
Source

inst_stlxp_r_r_r_m :: proc "contextless" (dst: Register, src: Register, src2: Register, mem: Memory) -> Instruction {…}

inst_stlxr ¶
Source

inst_stlxr :: inst_stlxr_r_r_m

inst_stlxr_r_r_m ¶
Source

inst_stlxr_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_stlxrb ¶
Source

inst_stlxrb :: inst_stlxrb_r_r_m

inst_stlxrb_r_r_m ¶
Source

inst_stlxrb_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_stlxrh ¶
Source

inst_stlxrh :: inst_stlxrh_r_r_m

inst_stlxrh_r_r_m ¶
Source

inst_stlxrh_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_stnp ¶
Source

inst_stnp :: inst_stnp_r_r_m

inst_stnp_r_r_m ¶
Source

inst_stnp_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_stnt1b ¶
Source

inst_stnt1b :: inst_stnt1b_zb_p_m

inst_stnt1b_zb_p_m ¶
Source

inst_stnt1b_zb_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_stnt1d ¶
Source

inst_stnt1d :: inst_stnt1d_zd_p_m

inst_stnt1d_zd_p_m ¶
Source

inst_stnt1d_zd_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_stnt1h ¶
Source

inst_stnt1h :: inst_stnt1h_zh_p_m

inst_stnt1h_zh_p_m ¶
Source

inst_stnt1h_zh_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_stnt1w ¶
Source

inst_stnt1w :: inst_stnt1w_zs_p_m

inst_stnt1w_zs_p_m ¶
Source

inst_stnt1w_zs_p_m :: proc "contextless" (rz: u8, rz2: u8, mem: Memory) -> Instruction {…}

inst_stp ¶
Source

inst_stp :: inst_stp_r_r_m

inst_stp_r_r_m ¶
Source

inst_stp_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_str_i_m ¶
Source

inst_str_i_m :: proc "contextless" (imm: i64, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_str

inst_str_p_m ¶
Source

inst_str_p_m :: proc "contextless" (rz: u8, mem: Memory) -> Instruction {…}

inst_str_r_m ¶
Source

inst_str_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_str

inst_str_z_m ¶
Source

inst_str_z_m :: proc "contextless" (rz: u8, mem: Memory) -> Instruction {…}

Related Procedure Groups

inst_str

inst_strb ¶
Source

inst_strb :: inst_strb_r_m

inst_strb_r_m ¶
Source

inst_strb_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_strh ¶
Source

inst_strh :: inst_strh_r_m

inst_strh_r_m ¶
Source

inst_strh_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_stur ¶
Source

inst_stur :: inst_stur_r_m

inst_stur_r_m ¶
Source

inst_stur_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_sturb ¶
Source

inst_sturb :: inst_sturb_r_m

inst_sturb_r_m ¶
Source

inst_sturb_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_sturh ¶
Source

inst_sturh :: inst_sturh_r_m

inst_sturh_r_m ¶
Source

inst_sturh_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_stxp ¶
Source

inst_stxp :: inst_stxp_r_r_r_m

inst_stxp_r_r_r_m ¶
Source

inst_stxp_r_r_r_m :: proc "contextless" (dst: Register, src: Register, src2: Register, mem: Memory) -> Instruction {…}

inst_stxr ¶
Source

inst_stxr :: inst_stxr_r_r_m

inst_stxr_r_r_m ¶
Source

inst_stxr_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_stxrb ¶
Source

inst_stxrb :: inst_stxrb_r_r_m

inst_stxrb_r_r_m ¶
Source

inst_stxrb_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_stxrh ¶
Source

inst_stxrh :: inst_stxrh_r_r_m

inst_stxrh_r_r_m ¶
Source

inst_stxrh_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_stz2g ¶
Source

inst_stz2g :: inst_stz2g_r_m

inst_stz2g_r_m ¶
Source

inst_stz2g_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_stzg ¶
Source

inst_stzg :: inst_stzg_r_m

inst_stzg_r_m ¶
Source

inst_stzg_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_stzgm ¶
Source

inst_stzgm :: inst_stzgm_r_m

inst_stzgm_r_m ¶
Source

inst_stzgm_r_m :: proc "contextless" (dst: Register, mem: Memory) -> Instruction {…}

inst_sub_r_r_ex ¶
Source

inst_sub_r_r_ex :: proc "contextless" (dst: Register, src: Register, src2: Register, src2_ext: Extend, src2_amount: u8) -> Instruction {…}

Related Procedure Groups

inst_sub

inst_sub_r_r_i ¶
Source

inst_sub_r_r_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_sub

inst_sub_r_r_sh ¶
Source

inst_sub_r_r_sh :: proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction {…}

Related Procedure Groups

inst_sub

inst_sub_v16b_v16b_v16b ¶
Source

inst_sub_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_sub

inst_sub_v2d_v2d_v2d ¶
Source

inst_sub_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sub_v4s_v4s_v4s ¶
Source

inst_sub_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sub_v8h_v8h_v8h ¶
Source

inst_sub_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_sub_zb_p_zb_zb ¶
Source

inst_sub_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_sub

inst_sub_zb_zb_zb ¶
Source

inst_sub_zb_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_sub

inst_sub_zd_p_zd_zd ¶
Source

inst_sub_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_sub_zd_zd_zd ¶
Source

inst_sub_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_sub_zh_p_zh_zh ¶
Source

inst_sub_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_sub_zh_zh_zh ¶
Source

inst_sub_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_sub_zs_p_zs_zs ¶
Source

inst_sub_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_sub_zs_zs_zs ¶
Source

inst_sub_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_subg ¶
Source

inst_subg :: inst_subg_r_r_i_i

inst_subg_r_r_i_i ¶
Source

inst_subg_r_r_i_i :: proc "contextless" (dst: Register, src: Register, imm: i64, imm2: i64) -> Instruction {…}

inst_subhn ¶
Source

inst_subhn :: inst_subhn_v8b_v8h_v8h

inst_subhn2 ¶
Source

inst_subhn2 :: inst_subhn2_v16b_v8h_v8h

inst_subhn2_v16b_v8h_v8h ¶
Source

inst_subhn2_v16b_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_subhn2_v4s_v2d_v2d ¶
Source

inst_subhn2_v4s_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_subhn2_v8h_v4s_v4s ¶
Source

inst_subhn2_v8h_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_subhn_v2s_v2d_v2d ¶
Source

inst_subhn_v2s_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_subhn_v4h_v4s_v4s ¶
Source

inst_subhn_v4h_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_subhn_v8b_v8h_v8h ¶
Source

inst_subhn_v8b_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_subp ¶
Source

inst_subp :: inst_subp_r_r_r

inst_subp_r_r_r ¶
Source

inst_subp_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_subps ¶
Source

inst_subps :: inst_subps_r_r_r

inst_subps_r_r_r ¶
Source

inst_subps_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_subr ¶
Source

inst_subr :: inst_subr_zb_p_zb_zb

inst_subr_zb_p_zb_zb ¶
Source

inst_subr_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_subr_zd_p_zd_zd ¶
Source

inst_subr_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_subr_zh_p_zh_zh ¶
Source

inst_subr_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_subr_zs_p_zs_zs ¶
Source

inst_subr_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_subs_r_r_ex ¶
Source

inst_subs_r_r_ex :: proc "contextless" (dst: Register, src: Register, src2: Register, src2_ext: Extend, src2_amount: u8) -> Instruction {…}

Related Procedure Groups

inst_subs

inst_subs_r_r_i ¶
Source

inst_subs_r_r_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_subs

inst_subs_r_r_sh ¶
Source

inst_subs_r_r_sh :: proc "contextless" (dst: Register, src: Register, src2: Register, src2_shift: Shift_Type, src2_amount: u8) -> Instruction {…}

Related Procedure Groups

inst_subs

inst_sumopa ¶
Source

inst_sumopa :: inst_sumopa_i_p_p_zb_zb

inst_sumopa_i_p_p_zb_zb ¶
Source

inst_sumopa_i_p_p_zb_zb :: proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_svc ¶
Source

inst_svc :: inst_svc_i

inst_svc_i ¶
Source

inst_svc_i :: proc "contextless" (imm: i64) -> Instruction {…}

inst_swp ¶
Source

inst_swp :: inst_swp_r_r_m

inst_swp_r_r_m ¶
Source

inst_swp_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_swpa ¶
Source

inst_swpa :: inst_swpa_r_r_m

inst_swpa_r_r_m ¶
Source

inst_swpa_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_swpal ¶
Source

inst_swpal :: inst_swpal_r_r_m

inst_swpal_r_r_m ¶
Source

inst_swpal_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_swpl ¶
Source

inst_swpl :: inst_swpl_r_r_m

inst_swpl_r_r_m ¶
Source

inst_swpl_r_r_m :: proc "contextless" (dst: Register, src: Register, mem: Memory) -> Instruction {…}

inst_sxtb ¶
Source

inst_sxtb :: inst_sxtb_r_r

inst_sxtb_r_r ¶
Source

inst_sxtb_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sxth ¶
Source

inst_sxth :: inst_sxth_r_r

inst_sxth_r_r ¶
Source

inst_sxth_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sxtl ¶
Source

inst_sxtl :: inst_sxtl_v8h_v8b

inst_sxtl2 ¶
Source

inst_sxtl2 :: inst_sxtl2_v8h_v16b

inst_sxtl2_v2d_v4s ¶
Source

inst_sxtl2_v2d_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sxtl2_v4s_v8h ¶
Source

inst_sxtl2_v4s_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sxtl2_v8h_v16b ¶
Source

inst_sxtl2_v8h_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sxtl_v2d_v2s ¶
Source

inst_sxtl_v2d_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sxtl_v4s_v4h ¶
Source

inst_sxtl_v4s_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sxtl_v8h_v8b ¶
Source

inst_sxtl_v8h_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_sxtw ¶
Source

inst_sxtw :: inst_sxtw_r_r

inst_sxtw_r_r ¶
Source

inst_sxtw_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_tbl_v16b_v16b_v16b ¶
Source

inst_tbl_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_tbl_v8b_v16b_v8b ¶
Source

inst_tbl_v8b_v16b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_tbl

inst_tbl_zb_zl1b_zb ¶
Source

inst_tbl_zb_zl1b_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_tbl

inst_tbl_zb_zl2b_zb ¶
Source

inst_tbl_zb_zl2b_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_tbl_zd_zl1d_zd ¶
Source

inst_tbl_zd_zl1d_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_tbl_zh_zl1h_zh ¶
Source

inst_tbl_zh_zl1h_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_tbl_zs_zl1s_zs ¶
Source

inst_tbl_zs_zl1s_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_tbnz ¶
Source

inst_tbnz :: inst_tbnz_r_i_l

inst_tbnz_r_i_l ¶
Source

inst_tbnz_r_i_l :: proc "contextless" (dst: Register, imm: i64, label: u32) -> Instruction {…}

inst_tbx_v16b_v16b_v16b ¶
Source

inst_tbx_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_tbx_v8b_v16b_v8b ¶
Source

inst_tbx_v8b_v16b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_tbx

inst_tbx_zb_zb_zb ¶
Source

inst_tbx_zb_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_tbx

inst_tbz ¶
Source

inst_tbz :: inst_tbz_r_i_l

inst_tbz_r_i_l ¶
Source

inst_tbz_r_i_l :: proc "contextless" (dst: Register, imm: i64, label: u32) -> Instruction {…}

inst_tcancel ¶
Source

inst_tcancel :: inst_tcancel_i

inst_tcancel_i ¶
Source

inst_tcancel_i :: proc "contextless" (imm: i64) -> Instruction {…}

inst_tcommit ¶
Source

inst_tcommit :: inst_tcommit_none

inst_tcommit_none ¶
Source

inst_tcommit_none :: proc "contextless" () -> Instruction {…}

inst_tlbi_alle1 ¶
Source

inst_tlbi_alle1 :: inst_tlbi_alle1_none

inst_tlbi_alle1_none ¶
Source

inst_tlbi_alle1_none :: proc "contextless" () -> Instruction {…}

inst_tlbi_alle1is ¶
Source

inst_tlbi_alle1is :: inst_tlbi_alle1is_none

inst_tlbi_alle1is_none ¶
Source

inst_tlbi_alle1is_none :: proc "contextless" () -> Instruction {…}

inst_tlbi_alle2 ¶
Source

inst_tlbi_alle2 :: inst_tlbi_alle2_none

inst_tlbi_alle2_none ¶
Source

inst_tlbi_alle2_none :: proc "contextless" () -> Instruction {…}

inst_tlbi_alle2is ¶
Source

inst_tlbi_alle2is :: inst_tlbi_alle2is_none

inst_tlbi_alle2is_none ¶
Source

inst_tlbi_alle2is_none :: proc "contextless" () -> Instruction {…}

inst_tlbi_alle3 ¶
Source

inst_tlbi_alle3 :: inst_tlbi_alle3_none

inst_tlbi_alle3_none ¶
Source

inst_tlbi_alle3_none :: proc "contextless" () -> Instruction {…}

inst_tlbi_alle3is ¶
Source

inst_tlbi_alle3is :: inst_tlbi_alle3is_none

inst_tlbi_alle3is_none ¶
Source

inst_tlbi_alle3is_none :: proc "contextless" () -> Instruction {…}

inst_tlbi_aside1 ¶
Source

inst_tlbi_aside1 :: inst_tlbi_aside1_r

inst_tlbi_aside1_r ¶
Source

inst_tlbi_aside1_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_tlbi_aside1is ¶
Source

inst_tlbi_aside1is :: inst_tlbi_aside1is_r

inst_tlbi_aside1is_r ¶
Source

inst_tlbi_aside1is_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_tlbi_paall ¶
Source

inst_tlbi_paall :: inst_tlbi_paall_none

inst_tlbi_paall_none ¶
Source

inst_tlbi_paall_none :: proc "contextless" () -> Instruction {…}

inst_tlbi_paallos ¶
Source

inst_tlbi_paallos :: inst_tlbi_paallos_none

inst_tlbi_paallos_none ¶
Source

inst_tlbi_paallos_none :: proc "contextless" () -> Instruction {…}

inst_tlbi_rpalos ¶
Source

inst_tlbi_rpalos :: inst_tlbi_rpalos_r

inst_tlbi_rpalos_r ¶
Source

inst_tlbi_rpalos_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_tlbi_rpaos ¶
Source

inst_tlbi_rpaos :: inst_tlbi_rpaos_r

inst_tlbi_rpaos_r ¶
Source

inst_tlbi_rpaos_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_tlbi_vaae1 ¶
Source

inst_tlbi_vaae1 :: inst_tlbi_vaae1_r

inst_tlbi_vaae1_r ¶
Source

inst_tlbi_vaae1_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_tlbi_vaae1is ¶
Source

inst_tlbi_vaae1is :: inst_tlbi_vaae1is_r

inst_tlbi_vaae1is_r ¶
Source

inst_tlbi_vaae1is_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_tlbi_vaale1 ¶
Source

inst_tlbi_vaale1 :: inst_tlbi_vaale1_r

inst_tlbi_vaale1_r ¶
Source

inst_tlbi_vaale1_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_tlbi_vaale1is ¶
Source

inst_tlbi_vaale1is :: inst_tlbi_vaale1is_r

inst_tlbi_vaale1is_r ¶
Source

inst_tlbi_vaale1is_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_tlbi_vae1 ¶
Source

inst_tlbi_vae1 :: inst_tlbi_vae1_r

inst_tlbi_vae1_r ¶
Source

inst_tlbi_vae1_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_tlbi_vae1is ¶
Source

inst_tlbi_vae1is :: inst_tlbi_vae1is_r

inst_tlbi_vae1is_r ¶
Source

inst_tlbi_vae1is_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_tlbi_vale1 ¶
Source

inst_tlbi_vale1 :: inst_tlbi_vale1_r

inst_tlbi_vale1_r ¶
Source

inst_tlbi_vale1_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_tlbi_vale1is ¶
Source

inst_tlbi_vale1is :: inst_tlbi_vale1is_r

inst_tlbi_vale1is_r ¶
Source

inst_tlbi_vale1is_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_tlbi_vmalle1 ¶
Source

inst_tlbi_vmalle1 :: inst_tlbi_vmalle1_none

inst_tlbi_vmalle1_none ¶
Source

inst_tlbi_vmalle1_none :: proc "contextless" () -> Instruction {…}

inst_tlbi_vmalle1is ¶
Source

inst_tlbi_vmalle1is :: inst_tlbi_vmalle1is_none

inst_tlbi_vmalle1is_none ¶
Source

inst_tlbi_vmalle1is_none :: proc "contextless" () -> Instruction {…}

inst_trn1_pb_pb_pb ¶
Source

inst_trn1_pb_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_trn1_v16b_v16b_v16b ¶
Source

inst_trn1_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_trn1_v2d_v2d_v2d ¶
Source

inst_trn1_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_trn1_v2s_v2s_v2s ¶
Source

inst_trn1_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_trn1_v4h_v4h_v4h ¶
Source

inst_trn1_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_trn1_v4s_v4s_v4s ¶
Source

inst_trn1_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_trn1_v8b_v8b_v8b ¶
Source

inst_trn1_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_trn1

inst_trn1_v8h_v8h_v8h ¶
Source

inst_trn1_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_trn1_zb_zb_zb ¶
Source

inst_trn1_zb_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_trn1

inst_trn1_zd_zd_zd ¶
Source

inst_trn1_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_trn1_zh_zh_zh ¶
Source

inst_trn1_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_trn1_zs_zs_zs ¶
Source

inst_trn1_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_trn2_pb_pb_pb ¶
Source

inst_trn2_pb_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_trn2_v16b_v16b_v16b ¶
Source

inst_trn2_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_trn2_v2d_v2d_v2d ¶
Source

inst_trn2_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_trn2_v2s_v2s_v2s ¶
Source

inst_trn2_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_trn2_v4h_v4h_v4h ¶
Source

inst_trn2_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_trn2_v4s_v4s_v4s ¶
Source

inst_trn2_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_trn2_v8b_v8b_v8b ¶
Source

inst_trn2_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_trn2

inst_trn2_v8h_v8h_v8h ¶
Source

inst_trn2_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_trn2_zb_zb_zb ¶
Source

inst_trn2_zb_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_trn2

inst_trn2_zd_zd_zd ¶
Source

inst_trn2_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_trn2_zh_zh_zh ¶
Source

inst_trn2_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_trn2_zs_zs_zs ¶
Source

inst_trn2_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_tsb_csync ¶
Source

inst_tsb_csync :: inst_tsb_csync_none

inst_tsb_csync_none ¶
Source

inst_tsb_csync_none :: proc "contextless" () -> Instruction {…}

inst_tst_r_i ¶
Source

inst_tst_r_i :: proc "contextless" (dst: Register, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_tst

inst_tst_r_sh ¶
Source

inst_tst_r_sh :: proc "contextless" (dst: Register, src: Register, src_shift: Shift_Type, src_amount: u8) -> Instruction {…}

Related Procedure Groups

inst_tst

inst_tstart ¶
Source

inst_tstart :: inst_tstart_r

inst_tstart_r ¶
Source

inst_tstart_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_ttest ¶
Source

inst_ttest :: inst_ttest_r

inst_ttest_r ¶
Source

inst_ttest_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_uaba ¶
Source

inst_uaba :: inst_uaba_v8b_v8b_v8b

inst_uaba_v16b_v16b_v16b ¶
Source

inst_uaba_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uaba_v2s_v2s_v2s ¶
Source

inst_uaba_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uaba_v4h_v4h_v4h ¶
Source

inst_uaba_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uaba_v4s_v4s_v4s ¶
Source

inst_uaba_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uaba_v8b_v8b_v8b ¶
Source

inst_uaba_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uaba_v8h_v8h_v8h ¶
Source

inst_uaba_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uabd_v16b_v16b_v16b ¶
Source

inst_uabd_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uabd_v2s_v2s_v2s ¶
Source

inst_uabd_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uabd_v4h_v4h_v4h ¶
Source

inst_uabd_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uabd_v4s_v4s_v4s ¶
Source

inst_uabd_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uabd_v8b_v8b_v8b ¶
Source

inst_uabd_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_uabd

inst_uabd_v8h_v8h_v8h ¶
Source

inst_uabd_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uabd_zb_p_zb_zb ¶
Source

inst_uabd_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_uabd

inst_uabd_zd_p_zd_zd ¶
Source

inst_uabd_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_uabd_zh_p_zh_zh ¶
Source

inst_uabd_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_uabd_zs_p_zs_zs ¶
Source

inst_uabd_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_uadalp ¶
Source

inst_uadalp :: inst_uadalp_v4h_v8b

inst_uadalp_v1d_v2s ¶
Source

inst_uadalp_v1d_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uadalp_v2d_v4s ¶
Source

inst_uadalp_v2d_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uadalp_v2s_v4h ¶
Source

inst_uadalp_v2s_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uadalp_v4h_v8b ¶
Source

inst_uadalp_v4h_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uadalp_v4s_v8h ¶
Source

inst_uadalp_v4s_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uadalp_v8h_v16b ¶
Source

inst_uadalp_v8h_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uaddl ¶
Source

inst_uaddl :: inst_uaddl_v8h_v8b_v8b

inst_uaddl2 ¶
Source

inst_uaddl2 :: inst_uaddl2_v8h_v16b_v16b

inst_uaddl2_v2d_v4s_v4s ¶
Source

inst_uaddl2_v2d_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uaddl2_v4s_v8h_v8h ¶
Source

inst_uaddl2_v4s_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uaddl2_v8h_v16b_v16b ¶
Source

inst_uaddl2_v8h_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uaddl_v2d_v2s_v2s ¶
Source

inst_uaddl_v2d_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uaddl_v4s_v4h_v4h ¶
Source

inst_uaddl_v4s_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uaddl_v8h_v8b_v8b ¶
Source

inst_uaddl_v8h_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uaddlp ¶
Source

inst_uaddlp :: inst_uaddlp_v4h_v8b

inst_uaddlp_v1d_v2s ¶
Source

inst_uaddlp_v1d_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uaddlp_v2d_v4s ¶
Source

inst_uaddlp_v2d_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uaddlp_v2s_v4h ¶
Source

inst_uaddlp_v2s_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uaddlp_v4h_v8b ¶
Source

inst_uaddlp_v4h_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uaddlp_v4s_v8h ¶
Source

inst_uaddlp_v4s_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uaddlp_v8h_v16b ¶
Source

inst_uaddlp_v8h_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uaddlv ¶
Source

inst_uaddlv :: inst_uaddlv_r_v8b

inst_uaddlv_r_v16b ¶
Source

inst_uaddlv_r_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uaddlv_r_v4h ¶
Source

inst_uaddlv_r_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uaddlv_r_v4s ¶
Source

inst_uaddlv_r_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uaddlv_r_v8b ¶
Source

inst_uaddlv_r_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uaddlv_r_v8h ¶
Source

inst_uaddlv_r_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uaddw ¶
Source

inst_uaddw :: inst_uaddw_v8h_v8h_v8b

inst_uaddw2 ¶
Source

inst_uaddw2 :: inst_uaddw2_v8h_v8h_v16b

inst_uaddw2_v2d_v2d_v4s ¶
Source

inst_uaddw2_v2d_v2d_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uaddw2_v4s_v4s_v8h ¶
Source

inst_uaddw2_v4s_v4s_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uaddw2_v8h_v8h_v16b ¶
Source

inst_uaddw2_v8h_v8h_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uaddw_v2d_v2d_v2s ¶
Source

inst_uaddw_v2d_v2d_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uaddw_v4s_v4s_v4h ¶
Source

inst_uaddw_v4s_v4s_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uaddw_v8h_v8h_v8b ¶
Source

inst_uaddw_v8h_v8h_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_ucvtf ¶
Source

inst_ucvtf :: inst_ucvtf_r_r

inst_ucvtf_r_r ¶
Source

inst_ucvtf_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_ucvtf_v2d_v2d ¶
Source

inst_ucvtf_v2d_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_ucvtf_v2s_v2s ¶
Source

inst_ucvtf_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_ucvtf_v4h_v4h ¶
Source

inst_ucvtf_v4h_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_ucvtf_v4s_v4s ¶
Source

inst_ucvtf_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_ucvtf_v8h_v8h ¶
Source

inst_ucvtf_v8h_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_udiv_r_r_r ¶
Source

inst_udiv_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_udiv

inst_udiv_zd_p_zd_zd ¶
Source

inst_udiv_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_udiv_zs_p_zs_zs ¶
Source

inst_udiv_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_udiv

inst_udot ¶
Source

inst_udot :: inst_udot_v2s_v8b_v8b

inst_udot_v2s_v8b_v8b ¶
Source

inst_udot_v2s_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_udot_v4s_v16b_v16b ¶
Source

inst_udot_v4s_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uhadd ¶
Source

inst_uhadd :: inst_uhadd_v8b_v8b_v8b

inst_uhadd_v16b_v16b_v16b ¶
Source

inst_uhadd_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uhadd_v2s_v2s_v2s ¶
Source

inst_uhadd_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uhadd_v4h_v4h_v4h ¶
Source

inst_uhadd_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uhadd_v4s_v4s_v4s ¶
Source

inst_uhadd_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uhadd_v8b_v8b_v8b ¶
Source

inst_uhadd_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uhadd_v8h_v8h_v8h ¶
Source

inst_uhadd_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uhsub ¶
Source

inst_uhsub :: inst_uhsub_v8b_v8b_v8b

inst_uhsub_v16b_v16b_v16b ¶
Source

inst_uhsub_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uhsub_v2s_v2s_v2s ¶
Source

inst_uhsub_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uhsub_v4h_v4h_v4h ¶
Source

inst_uhsub_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uhsub_v4s_v4s_v4s ¶
Source

inst_uhsub_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uhsub_v8b_v8b_v8b ¶
Source

inst_uhsub_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uhsub_v8h_v8h_v8h ¶
Source

inst_uhsub_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umaddl ¶
Source

inst_umaddl :: inst_umaddl_r_r_r_r

inst_umaddl_r_r_r_r ¶
Source

inst_umaddl_r_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction {…}

inst_umax_v16b_v16b_v16b ¶
Source

inst_umax_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umax_v2s_v2s_v2s ¶
Source

inst_umax_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umax_v4h_v4h_v4h ¶
Source

inst_umax_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umax_v4s_v4s_v4s ¶
Source

inst_umax_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umax_v8b_v8b_v8b ¶
Source

inst_umax_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_umax

inst_umax_v8h_v8h_v8h ¶
Source

inst_umax_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umax_zb_p_zb_zb ¶
Source

inst_umax_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_umax

inst_umax_zd_p_zd_zd ¶
Source

inst_umax_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_umax_zh_p_zh_zh ¶
Source

inst_umax_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_umax_zs_p_zs_zs ¶
Source

inst_umax_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_umaxp ¶
Source

inst_umaxp :: inst_umaxp_v8b_v8b_v8b

inst_umaxp_v16b_v16b_v16b ¶
Source

inst_umaxp_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umaxp_v2s_v2s_v2s ¶
Source

inst_umaxp_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umaxp_v4h_v4h_v4h ¶
Source

inst_umaxp_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umaxp_v4s_v4s_v4s ¶
Source

inst_umaxp_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umaxp_v8b_v8b_v8b ¶
Source

inst_umaxp_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umaxp_v8h_v8h_v8h ¶
Source

inst_umaxp_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umaxv ¶
Source

inst_umaxv :: inst_umaxv_r_v8b

inst_umaxv_r_v16b ¶
Source

inst_umaxv_r_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_umaxv_r_v4h ¶
Source

inst_umaxv_r_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_umaxv_r_v4s ¶
Source

inst_umaxv_r_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_umaxv_r_v8b ¶
Source

inst_umaxv_r_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_umaxv_r_v8h ¶
Source

inst_umaxv_r_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_umin_v16b_v16b_v16b ¶
Source

inst_umin_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umin_v2s_v2s_v2s ¶
Source

inst_umin_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umin_v4h_v4h_v4h ¶
Source

inst_umin_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umin_v4s_v4s_v4s ¶
Source

inst_umin_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umin_v8b_v8b_v8b ¶
Source

inst_umin_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_umin

inst_umin_v8h_v8h_v8h ¶
Source

inst_umin_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umin_zb_p_zb_zb ¶
Source

inst_umin_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_umin

inst_umin_zd_p_zd_zd ¶
Source

inst_umin_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_umin_zh_p_zh_zh ¶
Source

inst_umin_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_umin_zs_p_zs_zs ¶
Source

inst_umin_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_uminp ¶
Source

inst_uminp :: inst_uminp_v8b_v8b_v8b

inst_uminp_v16b_v16b_v16b ¶
Source

inst_uminp_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uminp_v2s_v2s_v2s ¶
Source

inst_uminp_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uminp_v4h_v4h_v4h ¶
Source

inst_uminp_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uminp_v4s_v4s_v4s ¶
Source

inst_uminp_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uminp_v8b_v8b_v8b ¶
Source

inst_uminp_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uminp_v8h_v8h_v8h ¶
Source

inst_uminp_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uminv ¶
Source

inst_uminv :: inst_uminv_r_v8b

inst_uminv_r_v16b ¶
Source

inst_uminv_r_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uminv_r_v4h ¶
Source

inst_uminv_r_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uminv_r_v4s ¶
Source

inst_uminv_r_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uminv_r_v8b ¶
Source

inst_uminv_r_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uminv_r_v8h ¶
Source

inst_uminv_r_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_umlal ¶
Source

inst_umlal :: inst_umlal_v8h_v8b_v8b

inst_umlal2 ¶
Source

inst_umlal2 :: inst_umlal2_v8h_v16b_v16b

inst_umlal2_v2d_v4s_v4s ¶
Source

inst_umlal2_v2d_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umlal2_v4s_v8h_v8h ¶
Source

inst_umlal2_v4s_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umlal2_v8h_v16b_v16b ¶
Source

inst_umlal2_v8h_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umlal_v2d_v2s_v2s ¶
Source

inst_umlal_v2d_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umlal_v4s_v4h_v4h ¶
Source

inst_umlal_v4s_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umlal_v8h_v8b_v8b ¶
Source

inst_umlal_v8h_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umlsl ¶
Source

inst_umlsl :: inst_umlsl_v8h_v8b_v8b

inst_umlsl2 ¶
Source

inst_umlsl2 :: inst_umlsl2_v8h_v16b_v16b

inst_umlsl2_v2d_v4s_v4s ¶
Source

inst_umlsl2_v2d_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umlsl2_v4s_v8h_v8h ¶
Source

inst_umlsl2_v4s_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umlsl2_v8h_v16b_v16b ¶
Source

inst_umlsl2_v8h_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umlsl_v2d_v2s_v2s ¶
Source

inst_umlsl_v2d_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umlsl_v4s_v4h_v4h ¶
Source

inst_umlsl_v4s_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umlsl_v8h_v8b_v8b ¶
Source

inst_umlsl_v8h_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umopa ¶
Source

inst_umopa :: inst_umopa_i_p_p_zb_zb

inst_umopa_i_p_p_zb_zb ¶
Source

inst_umopa_i_p_p_zb_zb :: proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_umopa_i_p_p_zh_zh ¶
Source

inst_umopa_i_p_p_zh_zh :: proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_umops ¶
Source

inst_umops :: inst_umops_i_p_p_zb_zb

inst_umops_i_p_p_zb_zb ¶
Source

inst_umops_i_p_p_zb_zb :: proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_umops_i_p_p_zh_zh ¶
Source

inst_umops_i_p_p_zh_zh :: proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_umsubl ¶
Source

inst_umsubl :: inst_umsubl_r_r_r_r

inst_umsubl_r_r_r_r ¶
Source

inst_umsubl_r_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register, src3: Register) -> Instruction {…}

inst_umulh_r_r_r ¶
Source

inst_umulh_r_r_r :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_umulh

inst_umulh_zb_p_zb_zb ¶
Source

inst_umulh_zb_p_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

Related Procedure Groups

inst_umulh

inst_umulh_zd_p_zd_zd ¶
Source

inst_umulh_zd_p_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_umulh_zh_p_zh_zh ¶
Source

inst_umulh_zh_p_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_umulh_zs_p_zs_zs ¶
Source

inst_umulh_zs_p_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_umull ¶
Source

inst_umull :: inst_umull_v8h_v8b_v8b

inst_umull2 ¶
Source

inst_umull2 :: inst_umull2_v8h_v16b_v16b

inst_umull2_v2d_v4s_v4s ¶
Source

inst_umull2_v2d_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umull2_v4s_v8h_v8h ¶
Source

inst_umull2_v4s_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umull2_v8h_v16b_v16b ¶
Source

inst_umull2_v8h_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umull_v2d_v2s_v2s ¶
Source

inst_umull_v2d_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umull_v4s_v4h_v4h ¶
Source

inst_umull_v4s_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_umull_v8h_v8b_v8b ¶
Source

inst_umull_v8h_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uqadd_v16b_v16b_v16b ¶
Source

inst_uqadd_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uqadd_v2d_v2d_v2d ¶
Source

inst_uqadd_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uqadd_v2s_v2s_v2s ¶
Source

inst_uqadd_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uqadd_v4h_v4h_v4h ¶
Source

inst_uqadd_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uqadd_v4s_v4s_v4s ¶
Source

inst_uqadd_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uqadd_v8b_v8b_v8b ¶
Source

inst_uqadd_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_uqadd

inst_uqadd_v8h_v8h_v8h ¶
Source

inst_uqadd_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uqadd_zb_zb_zb ¶
Source

inst_uqadd_zb_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_uqadd

inst_uqadd_zd_zd_zd ¶
Source

inst_uqadd_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_uqadd_zh_zh_zh ¶
Source

inst_uqadd_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_uqadd_zs_zs_zs ¶
Source

inst_uqadd_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_uqdecb ¶
Source

inst_uqdecb :: inst_uqdecb_r_i_i

inst_uqdecb_r_i_i ¶
Source

inst_uqdecb_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

inst_uqdecd_r_i_i ¶
Source

inst_uqdecd_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_uqdecd

inst_uqdecd_zd_i_i ¶
Source

inst_uqdecd_zd_i_i :: proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_uqdecd

inst_uqdech_r_i_i ¶
Source

inst_uqdech_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_uqdech

inst_uqdech_zh_i_i ¶
Source

inst_uqdech_zh_i_i :: proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_uqdech

inst_uqdecp_r_pb ¶
Source

inst_uqdecp_r_pb :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

Related Procedure Groups

inst_uqdecp

inst_uqdecp_r_pd ¶
Source

inst_uqdecp_r_pd :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

inst_uqdecp_r_ph ¶
Source

inst_uqdecp_r_ph :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

inst_uqdecp_r_ps ¶
Source

inst_uqdecp_r_ps :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

inst_uqdecp_zd_pd ¶
Source

inst_uqdecp_zd_pd :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

inst_uqdecp_zh_ph ¶
Source

inst_uqdecp_zh_ph :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

Related Procedure Groups

inst_uqdecp

inst_uqdecp_zs_ps ¶
Source

inst_uqdecp_zs_ps :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

inst_uqdecw_r_i_i ¶
Source

inst_uqdecw_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_uqdecw

inst_uqdecw_zs_i_i ¶
Source

inst_uqdecw_zs_i_i :: proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_uqdecw

inst_uqincb ¶
Source

inst_uqincb :: inst_uqincb_r_i_i

inst_uqincb_r_i_i ¶
Source

inst_uqincb_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

inst_uqincd_r_i_i ¶
Source

inst_uqincd_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_uqincd

inst_uqincd_zd_i_i ¶
Source

inst_uqincd_zd_i_i :: proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_uqincd

inst_uqinch_r_i_i ¶
Source

inst_uqinch_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_uqinch

inst_uqinch_zh_i_i ¶
Source

inst_uqinch_zh_i_i :: proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_uqinch

inst_uqincp_r_pb ¶
Source

inst_uqincp_r_pb :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

Related Procedure Groups

inst_uqincp

inst_uqincp_r_pd ¶
Source

inst_uqincp_r_pd :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

inst_uqincp_r_ph ¶
Source

inst_uqincp_r_ph :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

inst_uqincp_r_ps ¶
Source

inst_uqincp_r_ps :: proc "contextless" (dst: Register, rz1: u8) -> Instruction {…}

inst_uqincp_zd_pd ¶
Source

inst_uqincp_zd_pd :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

inst_uqincp_zh_ph ¶
Source

inst_uqincp_zh_ph :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

Related Procedure Groups

inst_uqincp

inst_uqincp_zs_ps ¶
Source

inst_uqincp_zs_ps :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

inst_uqincw_r_i_i ¶
Source

inst_uqincw_r_i_i :: proc "contextless" (dst: Register, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_uqincw

inst_uqincw_zs_i_i ¶
Source

inst_uqincw_zs_i_i :: proc "contextless" (rz: u8, imm: i64, imm2: i64) -> Instruction {…}

Related Procedure Groups

inst_uqincw

inst_uqrshrn ¶
Source

inst_uqrshrn :: inst_uqrshrn_v8b_v8h_i

inst_uqrshrn2 ¶
Source

inst_uqrshrn2 :: inst_uqrshrn2_v16b_v8h_i

inst_uqrshrn2_v16b_v8h_i ¶
Source

inst_uqrshrn2_v16b_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_uqrshrn2_v4s_v2d_i ¶
Source

inst_uqrshrn2_v4s_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_uqrshrn2_v8h_v4s_i ¶
Source

inst_uqrshrn2_v8h_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_uqrshrn_v2s_v2d_i ¶
Source

inst_uqrshrn_v2s_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_uqrshrn_v4h_v4s_i ¶
Source

inst_uqrshrn_v4h_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_uqrshrn_v8b_v8h_i ¶
Source

inst_uqrshrn_v8b_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_uqshrn ¶
Source

inst_uqshrn :: inst_uqshrn_v8b_v8h_i

inst_uqshrn2 ¶
Source

inst_uqshrn2 :: inst_uqshrn2_v16b_v8h_i

inst_uqshrn2_v16b_v8h_i ¶
Source

inst_uqshrn2_v16b_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_uqshrn2_v4s_v2d_i ¶
Source

inst_uqshrn2_v4s_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_uqshrn2_v8h_v4s_i ¶
Source

inst_uqshrn2_v8h_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_uqshrn_v2s_v2d_i ¶
Source

inst_uqshrn_v2s_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_uqshrn_v4h_v4s_i ¶
Source

inst_uqshrn_v4h_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_uqshrn_v8b_v8h_i ¶
Source

inst_uqshrn_v8b_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_uqsub_v16b_v16b_v16b ¶
Source

inst_uqsub_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uqsub_v2d_v2d_v2d ¶
Source

inst_uqsub_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uqsub_v2s_v2s_v2s ¶
Source

inst_uqsub_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uqsub_v4h_v4h_v4h ¶
Source

inst_uqsub_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uqsub_v4s_v4s_v4s ¶
Source

inst_uqsub_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uqsub_v8b_v8b_v8b ¶
Source

inst_uqsub_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_uqsub

inst_uqsub_v8h_v8h_v8h ¶
Source

inst_uqsub_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uqsub_zb_zb_zb ¶
Source

inst_uqsub_zb_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_uqsub

inst_uqsub_zd_zd_zd ¶
Source

inst_uqsub_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_uqsub_zh_zh_zh ¶
Source

inst_uqsub_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_uqsub_zs_zs_zs ¶
Source

inst_uqsub_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_uqxtn ¶
Source

inst_uqxtn :: inst_uqxtn_v8b_v8h

inst_uqxtn2 ¶
Source

inst_uqxtn2 :: inst_uqxtn2_v16b_v8h

inst_uqxtn2_v16b_v8h ¶
Source

inst_uqxtn2_v16b_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uqxtn2_v4s_v2d ¶
Source

inst_uqxtn2_v4s_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uqxtn2_v8h_v4s ¶
Source

inst_uqxtn2_v8h_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uqxtn_v2s_v2d ¶
Source

inst_uqxtn_v2s_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uqxtn_v4h_v4s ¶
Source

inst_uqxtn_v4h_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uqxtn_v8b_v8h ¶
Source

inst_uqxtn_v8b_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_urecpe ¶
Source

inst_urecpe :: inst_urecpe_v2s_v2s

inst_urecpe_v2s_v2s ¶
Source

inst_urecpe_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_urecpe_v4s_v4s ¶
Source

inst_urecpe_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_urhadd ¶
Source

inst_urhadd :: inst_urhadd_v8b_v8b_v8b

inst_urhadd_v16b_v16b_v16b ¶
Source

inst_urhadd_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_urhadd_v2s_v2s_v2s ¶
Source

inst_urhadd_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_urhadd_v4h_v4h_v4h ¶
Source

inst_urhadd_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_urhadd_v4s_v4s_v4s ¶
Source

inst_urhadd_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_urhadd_v8b_v8b_v8b ¶
Source

inst_urhadd_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_urhadd_v8h_v8h_v8h ¶
Source

inst_urhadd_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_urshl ¶
Source

inst_urshl :: inst_urshl_v8b_v8b_v8b

inst_urshl_v16b_v16b_v16b ¶
Source

inst_urshl_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_urshl_v2d_v2d_v2d ¶
Source

inst_urshl_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_urshl_v2s_v2s_v2s ¶
Source

inst_urshl_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_urshl_v4h_v4h_v4h ¶
Source

inst_urshl_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_urshl_v4s_v4s_v4s ¶
Source

inst_urshl_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_urshl_v8b_v8b_v8b ¶
Source

inst_urshl_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_urshl_v8h_v8h_v8h ¶
Source

inst_urshl_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_urshr ¶
Source

inst_urshr :: inst_urshr_v8b_v8b_i

inst_urshr_v16b_v16b_i ¶
Source

inst_urshr_v16b_v16b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_urshr_v2d_v2d_i ¶
Source

inst_urshr_v2d_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_urshr_v2s_v2s_i ¶
Source

inst_urshr_v2s_v2s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_urshr_v4h_v4h_i ¶
Source

inst_urshr_v4h_v4h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_urshr_v4s_v4s_i ¶
Source

inst_urshr_v4s_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_urshr_v8b_v8b_i ¶
Source

inst_urshr_v8b_v8b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_urshr_v8h_v8h_i ¶
Source

inst_urshr_v8h_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ursqrte ¶
Source

inst_ursqrte :: inst_ursqrte_v2s_v2s

inst_ursqrte_v2s_v2s ¶
Source

inst_ursqrte_v2s_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_ursqrte_v4s_v4s ¶
Source

inst_ursqrte_v4s_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_ursra ¶
Source

inst_ursra :: inst_ursra_v8b_v8b_i

inst_ursra_v16b_v16b_i ¶
Source

inst_ursra_v16b_v16b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ursra_v2d_v2d_i ¶
Source

inst_ursra_v2d_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ursra_v2s_v2s_i ¶
Source

inst_ursra_v2s_v2s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ursra_v4h_v4h_i ¶
Source

inst_ursra_v4h_v4h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ursra_v4s_v4s_i ¶
Source

inst_ursra_v4s_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ursra_v8b_v8b_i ¶
Source

inst_ursra_v8b_v8b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ursra_v8h_v8h_i ¶
Source

inst_ursra_v8h_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_usdot ¶
Source

inst_usdot :: inst_usdot_v2s_v8b_v8b

inst_usdot_v2s_v8b_v8b ¶
Source

inst_usdot_v2s_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_usdot_v4s_v16b_v16b ¶
Source

inst_usdot_v4s_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_ushl ¶
Source

inst_ushl :: inst_ushl_v8b_v8b_v8b

inst_ushl_v16b_v16b_v16b ¶
Source

inst_ushl_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_ushl_v2d_v2d_v2d ¶
Source

inst_ushl_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_ushl_v2s_v2s_v2s ¶
Source

inst_ushl_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_ushl_v4h_v4h_v4h ¶
Source

inst_ushl_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_ushl_v4s_v4s_v4s ¶
Source

inst_ushl_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_ushl_v8b_v8b_v8b ¶
Source

inst_ushl_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_ushl_v8h_v8h_v8h ¶
Source

inst_ushl_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_ushll ¶
Source

inst_ushll :: inst_ushll_v8h_v8b_i

inst_ushll2 ¶
Source

inst_ushll2 :: inst_ushll2_v8h_v16b_i

inst_ushll2_v2d_v4s_i ¶
Source

inst_ushll2_v2d_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ushll2_v4s_v8h_i ¶
Source

inst_ushll2_v4s_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ushll2_v8h_v16b_i ¶
Source

inst_ushll2_v8h_v16b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ushll_v2d_v2s_i ¶
Source

inst_ushll_v2d_v2s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ushll_v4s_v4h_i ¶
Source

inst_ushll_v4s_v4h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ushll_v8h_v8b_i ¶
Source

inst_ushll_v8h_v8b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ushr ¶
Source

inst_ushr :: inst_ushr_v8b_v8b_i

inst_ushr_v16b_v16b_i ¶
Source

inst_ushr_v16b_v16b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ushr_v2d_v2d_i ¶
Source

inst_ushr_v2d_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ushr_v2s_v2s_i ¶
Source

inst_ushr_v2s_v2s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ushr_v4h_v4h_i ¶
Source

inst_ushr_v4h_v4h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ushr_v4s_v4s_i ¶
Source

inst_ushr_v4s_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ushr_v8b_v8b_i ¶
Source

inst_ushr_v8b_v8b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_ushr_v8h_v8h_i ¶
Source

inst_ushr_v8h_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_usmopa ¶
Source

inst_usmopa :: inst_usmopa_i_p_p_zb_zb

inst_usmopa_i_p_p_zb_zb ¶
Source

inst_usmopa_i_p_p_zb_zb :: proc "contextless" (imm: i64, rz1: u8, rz2: u8, rz3: u8, rz4: u8) -> Instruction {…}

inst_usra ¶
Source

inst_usra :: inst_usra_v8b_v8b_i

inst_usra_v16b_v16b_i ¶
Source

inst_usra_v16b_v16b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_usra_v2d_v2d_i ¶
Source

inst_usra_v2d_v2d_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_usra_v2s_v2s_i ¶
Source

inst_usra_v2s_v2s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_usra_v4h_v4h_i ¶
Source

inst_usra_v4h_v4h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_usra_v4s_v4s_i ¶
Source

inst_usra_v4s_v4s_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_usra_v8b_v8b_i ¶
Source

inst_usra_v8b_v8b_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_usra_v8h_v8h_i ¶
Source

inst_usra_v8h_v8h_i :: proc "contextless" (dst: Register, src: Register, imm: i64) -> Instruction {…}

inst_usubl ¶
Source

inst_usubl :: inst_usubl_v8h_v8b_v8b

inst_usubl2 ¶
Source

inst_usubl2 :: inst_usubl2_v8h_v16b_v16b

inst_usubl2_v2d_v4s_v4s ¶
Source

inst_usubl2_v2d_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_usubl2_v4s_v8h_v8h ¶
Source

inst_usubl2_v4s_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_usubl2_v8h_v16b_v16b ¶
Source

inst_usubl2_v8h_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_usubl_v2d_v2s_v2s ¶
Source

inst_usubl_v2d_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_usubl_v4s_v4h_v4h ¶
Source

inst_usubl_v4s_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_usubl_v8h_v8b_v8b ¶
Source

inst_usubl_v8h_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_usubw ¶
Source

inst_usubw :: inst_usubw_v8h_v8h_v8b

inst_usubw2 ¶
Source

inst_usubw2 :: inst_usubw2_v8h_v8h_v16b

inst_usubw2_v2d_v2d_v4s ¶
Source

inst_usubw2_v2d_v2d_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_usubw2_v4s_v4s_v8h ¶
Source

inst_usubw2_v4s_v4s_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_usubw2_v8h_v8h_v16b ¶
Source

inst_usubw2_v8h_v8h_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_usubw_v2d_v2d_v2s ¶
Source

inst_usubw_v2d_v2d_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_usubw_v4s_v4s_v4h ¶
Source

inst_usubw_v4s_v4s_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_usubw_v8h_v8h_v8b ¶
Source

inst_usubw_v8h_v8h_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uxtb ¶
Source

inst_uxtb :: inst_uxtb_r_r

inst_uxtb_r_r ¶
Source

inst_uxtb_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uxth ¶
Source

inst_uxth :: inst_uxth_r_r

inst_uxth_r_r ¶
Source

inst_uxth_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uxtl ¶
Source

inst_uxtl :: inst_uxtl_v8h_v8b

inst_uxtl2 ¶
Source

inst_uxtl2 :: inst_uxtl2_v8h_v16b

inst_uxtl2_v2d_v4s ¶
Source

inst_uxtl2_v2d_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uxtl2_v4s_v8h ¶
Source

inst_uxtl2_v4s_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uxtl2_v8h_v16b ¶
Source

inst_uxtl2_v8h_v16b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uxtl_v2d_v2s ¶
Source

inst_uxtl_v2d_v2s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uxtl_v4s_v4h ¶
Source

inst_uxtl_v4s_v4h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uxtl_v8h_v8b ¶
Source

inst_uxtl_v8h_v8b :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uxtw ¶
Source

inst_uxtw :: inst_uxtw_r_r

inst_uxtw_r_r ¶
Source

inst_uxtw_r_r :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_uzp1_pb_pb_pb ¶
Source

inst_uzp1_pb_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_uzp1_v16b_v16b_v16b ¶
Source

inst_uzp1_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uzp1_v2d_v2d_v2d ¶
Source

inst_uzp1_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uzp1_v2s_v2s_v2s ¶
Source

inst_uzp1_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uzp1_v4h_v4h_v4h ¶
Source

inst_uzp1_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uzp1_v4s_v4s_v4s ¶
Source

inst_uzp1_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uzp1_v8b_v8b_v8b ¶
Source

inst_uzp1_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_uzp1

inst_uzp1_v8h_v8h_v8h ¶
Source

inst_uzp1_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uzp1_zb_zb_zb ¶
Source

inst_uzp1_zb_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_uzp1

inst_uzp1_zd_zd_zd ¶
Source

inst_uzp1_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_uzp1_zh_zh_zh ¶
Source

inst_uzp1_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_uzp1_zs_zs_zs ¶
Source

inst_uzp1_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_uzp2_pb_pb_pb ¶
Source

inst_uzp2_pb_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_uzp2_v16b_v16b_v16b ¶
Source

inst_uzp2_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uzp2_v2d_v2d_v2d ¶
Source

inst_uzp2_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uzp2_v2s_v2s_v2s ¶
Source

inst_uzp2_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uzp2_v4h_v4h_v4h ¶
Source

inst_uzp2_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uzp2_v4s_v4s_v4s ¶
Source

inst_uzp2_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uzp2_v8b_v8b_v8b ¶
Source

inst_uzp2_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_uzp2

inst_uzp2_v8h_v8h_v8h ¶
Source

inst_uzp2_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_uzp2_zb_zb_zb ¶
Source

inst_uzp2_zb_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_uzp2

inst_uzp2_zd_zd_zd ¶
Source

inst_uzp2_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_uzp2_zh_zh_zh ¶
Source

inst_uzp2_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_uzp2_zs_zs_zs ¶
Source

inst_uzp2_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_uzp_zpb_zb_zb ¶
Source

inst_uzp_zpb_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_uzp

inst_uzp_zqb_zqb ¶
Source

inst_uzp_zqb_zqb :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

Related Procedure Groups

inst_uzp

inst_wfe ¶
Source

inst_wfe :: inst_wfe_none

inst_wfe_none ¶
Source

inst_wfe_none :: proc "contextless" () -> Instruction {…}

inst_wfet ¶
Source

inst_wfet :: inst_wfet_r

inst_wfet_r ¶
Source

inst_wfet_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_wfi ¶
Source

inst_wfi :: inst_wfi_none

inst_wfi_none ¶
Source

inst_wfi_none :: proc "contextless" () -> Instruction {…}

inst_wfit ¶
Source

inst_wfit :: inst_wfit_r

inst_wfit_r ¶
Source

inst_wfit_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_whilege ¶
Source

inst_whilege :: inst_whilege_pb_r_r

inst_whilege_pb_r_r ¶
Source

inst_whilege_pb_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilege_pd_r_r ¶
Source

inst_whilege_pd_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilege_ph_r_r ¶
Source

inst_whilege_ph_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilege_ps_r_r ¶
Source

inst_whilege_ps_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilegt ¶
Source

inst_whilegt :: inst_whilegt_pb_r_r

inst_whilegt_pb_r_r ¶
Source

inst_whilegt_pb_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilegt_pd_r_r ¶
Source

inst_whilegt_pd_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilegt_ph_r_r ¶
Source

inst_whilegt_ph_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilegt_ps_r_r ¶
Source

inst_whilegt_ps_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilehi ¶
Source

inst_whilehi :: inst_whilehi_pb_r_r

inst_whilehi_pb_r_r ¶
Source

inst_whilehi_pb_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilehi_pd_r_r ¶
Source

inst_whilehi_pd_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilehi_ph_r_r ¶
Source

inst_whilehi_ph_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilehi_ps_r_r ¶
Source

inst_whilehi_ps_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilehs ¶
Source

inst_whilehs :: inst_whilehs_pb_r_r

inst_whilehs_pb_r_r ¶
Source

inst_whilehs_pb_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilehs_pd_r_r ¶
Source

inst_whilehs_pd_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilehs_ph_r_r ¶
Source

inst_whilehs_ph_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilehs_ps_r_r ¶
Source

inst_whilehs_ps_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilele ¶
Source

inst_whilele :: inst_whilele_pb_r_r

inst_whilele_pb_r_r ¶
Source

inst_whilele_pb_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilele_pd_r_r ¶
Source

inst_whilele_pd_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilele_ph_r_r ¶
Source

inst_whilele_ph_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilele_ps_r_r ¶
Source

inst_whilele_ps_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilelo ¶
Source

inst_whilelo :: inst_whilelo_pb_r_r

inst_whilelo_pb_r_r ¶
Source

inst_whilelo_pb_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilelo_pd_r_r ¶
Source

inst_whilelo_pd_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilelo_ph_r_r ¶
Source

inst_whilelo_ph_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilelo_ps_r_r ¶
Source

inst_whilelo_ps_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilels ¶
Source

inst_whilels :: inst_whilels_pb_r_r

inst_whilels_pb_r_r ¶
Source

inst_whilels_pb_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilels_pd_r_r ¶
Source

inst_whilels_pd_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilels_ph_r_r ¶
Source

inst_whilels_ph_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilels_ps_r_r ¶
Source

inst_whilels_ps_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilelt ¶
Source

inst_whilelt :: inst_whilelt_pb_r_r

inst_whilelt_pb_r_r ¶
Source

inst_whilelt_pb_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilelt_pd_r_r ¶
Source

inst_whilelt_pd_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilelt_ph_r_r ¶
Source

inst_whilelt_ph_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_whilelt_ps_r_r ¶
Source

inst_whilelt_ps_r_r :: proc "contextless" (rz: u8, src: Register, src2: Register) -> Instruction {…}

inst_wrffr ¶
Source

inst_wrffr :: inst_wrffr_pb

inst_wrffr_pb ¶
Source

inst_wrffr_pb :: proc "contextless" (rz: u8) -> Instruction {…}

inst_xar_v2d_v2d_v2d_i ¶
Source

inst_xar_v2d_v2d_v2d_i :: proc "contextless" (dst: Register, src: Register, src2: Register, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_xar

inst_xar_zb_zb_zb_i ¶
Source

inst_xar_zb_zb_zb_i :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, imm: i64) -> Instruction {…}

inst_xar_zd_zd_zd_i ¶
Source

inst_xar_zd_zd_zd_i :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, imm: i64) -> Instruction {…}

Related Procedure Groups

inst_xar

inst_xar_zh_zh_zh_i ¶
Source

inst_xar_zh_zh_zh_i :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, imm: i64) -> Instruction {…}

inst_xar_zs_zs_zs_i ¶
Source

inst_xar_zs_zs_zs_i :: proc "contextless" (rz: u8, rz2: u8, rz3: u8, imm: i64) -> Instruction {…}

inst_xpacd ¶
Source

inst_xpacd :: inst_xpacd_r

inst_xpacd_r ¶
Source

inst_xpacd_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_xpaci ¶
Source

inst_xpaci :: inst_xpaci_r

inst_xpaci_r ¶
Source

inst_xpaci_r :: proc "contextless" (dst: Register) -> Instruction {…}

inst_xpaclri ¶
Source

inst_xpaclri :: inst_xpaclri_none

inst_xpaclri_none ¶
Source

inst_xpaclri_none :: proc "contextless" () -> Instruction {…}

inst_xtn ¶
Source

inst_xtn :: inst_xtn_v8b_v8h

inst_xtn2 ¶
Source

inst_xtn2 :: inst_xtn2_v16b_v8h

inst_xtn2_v16b_v8h ¶
Source

inst_xtn2_v16b_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_xtn2_v4s_v2d ¶
Source

inst_xtn2_v4s_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_xtn2_v8h_v4s ¶
Source

inst_xtn2_v8h_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_xtn_v2s_v2d ¶
Source

inst_xtn_v2s_v2d :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_xtn_v4h_v4s ¶
Source

inst_xtn_v4h_v4s :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_xtn_v8b_v8h ¶
Source

inst_xtn_v8b_v8h :: proc "contextless" (dst: Register, src: Register) -> Instruction {…}

inst_yield ¶
Source

inst_yield :: inst_yield_none

inst_yield_none ¶
Source

inst_yield_none :: proc "contextless" () -> Instruction {…}

inst_zero ¶
Source

inst_zero :: inst_zero_i

inst_zero_i ¶
Source

inst_zero_i :: proc "contextless" (imm: i64) -> Instruction {…}

inst_zip1_pb_pb_pb ¶
Source

inst_zip1_pb_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_zip1_v16b_v16b_v16b ¶
Source

inst_zip1_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_zip1_v2d_v2d_v2d ¶
Source

inst_zip1_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_zip1_v2s_v2s_v2s ¶
Source

inst_zip1_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_zip1_v4h_v4h_v4h ¶
Source

inst_zip1_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_zip1_v4s_v4s_v4s ¶
Source

inst_zip1_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_zip1_v8b_v8b_v8b ¶
Source

inst_zip1_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_zip1

inst_zip1_v8h_v8h_v8h ¶
Source

inst_zip1_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_zip1_zb_zb_zb ¶
Source

inst_zip1_zb_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_zip1

inst_zip1_zd_zd_zd ¶
Source

inst_zip1_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_zip1_zh_zh_zh ¶
Source

inst_zip1_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_zip1_zs_zs_zs ¶
Source

inst_zip1_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_zip2_pb_pb_pb ¶
Source

inst_zip2_pb_pb_pb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_zip2_v16b_v16b_v16b ¶
Source

inst_zip2_v16b_v16b_v16b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_zip2_v2d_v2d_v2d ¶
Source

inst_zip2_v2d_v2d_v2d :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_zip2_v2s_v2s_v2s ¶
Source

inst_zip2_v2s_v2s_v2s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_zip2_v4h_v4h_v4h ¶
Source

inst_zip2_v4h_v4h_v4h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_zip2_v4s_v4s_v4s ¶
Source

inst_zip2_v4s_v4s_v4s :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_zip2_v8b_v8b_v8b ¶
Source

inst_zip2_v8b_v8b_v8b :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

Related Procedure Groups

inst_zip2

inst_zip2_v8h_v8h_v8h ¶
Source

inst_zip2_v8h_v8h_v8h :: proc "contextless" (dst: Register, src: Register, src2: Register) -> Instruction {…}

inst_zip2_zb_zb_zb ¶
Source

inst_zip2_zb_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_zip2

inst_zip2_zd_zd_zd ¶
Source

inst_zip2_zd_zd_zd :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_zip2_zh_zh_zh ¶
Source

inst_zip2_zh_zh_zh :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_zip2_zs_zs_zs ¶
Source

inst_zip2_zs_zs_zs :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

inst_zip_zpb_zb_zb ¶
Source

inst_zip_zpb_zb_zb :: proc "contextless" (rz: u8, rz2: u8, rz3: u8) -> Instruction {…}

Related Procedure Groups

inst_zip

inst_zip_zqb_zqb ¶
Source

inst_zip_zqb_zqb :: proc "contextless" (rz: u8, rz2: u8) -> Instruction {…}

Related Procedure Groups

inst_zip

is_valid_bitmask_imm ¶
Source

is_valid_bitmask_imm :: proc "contextless" (value: u64, is_64: bool) -> bool {…}

is_valid_bitmask_imm returns true if value is a valid AArch64 logical- immediate when interpreted at the given width.

mem_ext ¶
Source

@(require_results)
mem_ext :: proc "contextless" (base, index: Register, ext: Extend, shift_amount: u8 = 0) -> Memory {…}

mem_offset ¶
Source

@(require_results)
mem_offset :: proc "contextless" (base: Register, disp: i32 = 0) -> Memory {…}

mem_post ¶
Source

@(require_results)
mem_post :: proc "contextless" (base: Register, disp: i32) -> Memory {…}

mem_pre ¶
Source

@(require_results)
mem_pre :: proc "contextless" (base: Register, disp: i32) -> Memory {…}

mem_reg ¶
Source

@(require_results)
mem_reg :: proc "contextless" (base, index: Register, shift_amount: u8 = 0) -> Memory {…}

mnemonic_to_string ¶
Source

mnemonic_to_string :: proc(m: Mnemonic, lowercase: bool = true, allocator := context.temp_allocator) -> string {…}

op_cond ¶
Source

@(require_results)
op_cond :: proc "contextless" (c: Cond) -> Operand {…}

op_extended ¶
Source

@(require_results)
op_extended :: proc "contextless" (r: Register, ext: Extend, amount: u8) -> Operand {…}

op_imm ¶
Source

@(require_results)
op_imm :: proc "contextless" (v: i64, size: u8 = 4) -> Operand {…}

op_label ¶
Source

@(require_results)
op_label :: proc "contextless" (label_id: u32, size: u8 = 4) -> Operand {…}

op_lane_index ¶
Source

@(require_results)
op_lane_index :: proc "contextless" (index: i64) -> Operand {…}

op_mem ¶
Source

@(require_results)
op_mem :: proc "contextless" (m: Memory) -> Operand {…}

op_reg ¶
Source

@(require_results)
op_reg :: proc "contextless" (r: Register) -> Operand {…}

op_rel_offset ¶
Source

@(require_results)
op_rel_offset :: proc "contextless" (off: i64) -> Operand {…}

op_shifted ¶
Source

@(require_results)
op_shifted :: proc "contextless" (r: Register, type: Shift_Type, amount: u8) -> Operand {…}

op_sysreg ¶
Source

@(require_results)
op_sysreg :: proc "contextless" (sr: Register) -> Operand {…}

A system register operand -- op_reg with the intent in the name, kept so MRS/MSR call sites read as what they are.

op_v_16b ¶
Source

@(require_results)
op_v_16b :: proc "contextless" (r: Register) -> Operand {…}

op_v_1d ¶
Source

@(require_results)
op_v_1d :: proc "contextless" (r: Register) -> Operand {…}

op_v_1q ¶
Source

@(require_results)
op_v_1q :: proc "contextless" (r: Register) -> Operand {…}

.1q breaks the laneselem-bytes rule the others follow (116 would collide with 16B), so it gets the next free multiple of 8.

op_v_2d ¶
Source

@(require_results)
op_v_2d :: proc "contextless" (r: Register) -> Operand {…}

op_v_2s ¶
Source

@(require_results)
op_v_2s :: proc "contextless" (r: Register) -> Operand {…}

op_v_4h ¶
Source

@(require_results)
op_v_4h :: proc "contextless" (r: Register) -> Operand {…}

op_v_4s ¶
Source

@(require_results)
op_v_4s :: proc "contextless" (r: Register) -> Operand {…}

op_v_8b ¶
Source

@(require_results)
op_v_8b :: proc "contextless" (r: Register) -> Operand {…}

op_v_8h ¶
Source

@(require_results)
op_v_8h :: proc "contextless" (r: Register) -> Operand {…}

op_v_elem_b ¶
Source

@(require_results)
op_v_elem_b :: proc "contextless" (r: Register) -> Operand {…}

Element-indexed V views (V0.B[i]/.H[i]/.S[i]/.D[i]). The element size rides in op.size so the matcher can disambiguate DUP/INS forms; the lane index is a separate immediate operand.

The codes are ODD (1/3/5/7) on purpose: arrangement operands above use multiples of 8, so a size can never mean both. They used to be 1/2/4/8, which made an element-D view indistinguishable from an 8B arrangement -- the printer cannot tell .d from .8b if both are size 8.

op_v_elem_d ¶
Source

@(require_results)
op_v_elem_d :: proc "contextless" (r: Register) -> Operand {…}

op_v_elem_h ¶
Source

@(require_results)
op_v_elem_h :: proc "contextless" (r: Register) -> Operand {…}

op_v_elem_s ¶
Source

@(require_results)
op_v_elem_s :: proc "contextless" (r: Register) -> Operand {…}

op_v_list ¶
Source

@(require_results)
op_v_list :: proc "contextless" (first: Register, shape, count: u8) -> Operand {…}

A run of count consecutive registers written as a list, {v0.16b, v1.16b}. shape is one of the VSHAPE_* codes.

op_z_b ¶
Source

@(require_results)
op_z_b :: proc "contextless" (n: u8) -> Operand {…}

op_z_d ¶
Source

@(require_results)
op_z_d :: proc "contextless" (n: u8) -> Operand {…}

op_z_h ¶
Source

@(require_results)
op_z_h :: proc "contextless" (n: u8) -> Operand {…}

op_z_s ¶
Source

@(require_results)
op_z_s :: proc "contextless" (n: u8) -> Operand {…}

op_za_slice ¶
Source

@(require_results)
op_za_slice :: proc "contextless" (tile, ws, offset, elem: u8, vertical: bool = false) -> Operand {…}

pack_bitmask_fields ¶
Source

pack_bitmask_fields :: proc "contextless" (n, immr, imms: u8) -> i64 {…}

pack_bitmask_fields packs N:immr:imms into the 13-bit BITMASK_FIELD operand-immediate format consumed by the encoder packer.

pack_operand_inline ¶
Source

pack_operand_inline :: proc(
	op:       ^Operand, 
	enc:      Operand_Encoding, 
	form:     ^Encoding, 
	pc:       u32, 
	inst_idx: u16, 
	relocs:   ^[dynamic]Relocation, 
	inst:     ^Instruction, 
) -> u32 {…}

print ¶
Source

print :: proc(
	instructions: []Instruction, 
	inst_info:    []Instruction_Info, 
	label_defs:   []rexcode_isa.Label_Definition, 
	tokens:       ^[dynamic]rexcode_isa.Token = nil, 
	options:      ^rexcode_isa.Print_Options = nil, 
	label_names:  ^map[rexcode_isa.Label_Offset]string = nil, 
) {…}

println ¶
Source

println :: proc(
	instructions: []Instruction, 
	inst_info:    []Instruction_Info, 
	label_defs:   []rexcode_isa.Label_Definition, 
	tokens:       ^[dynamic]rexcode_isa.Token = nil, 
	options:      ^rexcode_isa.Print_Options = nil, 
	label_names:  ^map[rexcode_isa.Label_Offset]string = nil, 
) {…}

q_reg ¶
Source

@(require_results)
q_reg :: proc "contextless" (n: u8) -> Register {…}

reg_class ¶
Source

@(require_results)
reg_class :: proc "contextless" (r: Register) -> u16 {…}

reg_hw ¶
Source

@(require_results)
reg_hw :: proc "contextless" (r: Register) -> u8 {…}

reg_is_w ¶
Source

@(require_results)
reg_is_w :: proc "contextless" (r: Register) -> bool {…}

reg_is_wsp ¶
Source

@(require_results)
reg_is_wsp :: proc "contextless" (r: Register) -> bool {…}

reg_is_x ¶
Source

@(require_results)
reg_is_x :: proc "contextless" (r: Register) -> bool {…}

reg_is_xsp ¶
Source

@(require_results)
reg_is_xsp :: proc "contextless" (r: Register) -> bool {…}

register_name ¶
Source

register_name :: proc(r: Register, lowercase: bool = true, allocator := context.temp_allocator) -> string {…}

s_reg ¶
Source

@(require_results)
s_reg :: proc "contextless" (n: u8) -> Register {…}

sbprint ¶
Source

sbprint :: proc(
	sb:           ^strings.Builder, 
	instructions: []Instruction, 
	inst_info:    []Instruction_Info, 
	label_defs:   []rexcode_isa.Label_Definition, 
	tokens:       ^[dynamic]rexcode_isa.Token = nil, 
	options:      ^rexcode_isa.Print_Options = nil, 
	label_names:  ^map[rexcode_isa.Label_Offset]string = nil, 
) {…}

sbprintln ¶
Source

sbprintln :: proc(
	sb:           ^strings.Builder, 
	instructions: []Instruction, 
	inst_info:    []Instruction_Info, 
	label_defs:   []rexcode_isa.Label_Definition, 
	tokens:       ^[dynamic]rexcode_isa.Token = nil, 
	options:      ^rexcode_isa.Print_Options = nil, 
	label_names:  ^map[rexcode_isa.Label_Offset]string = nil, 
) {…}

sve_esize_code ¶
Source

@(require_results)
sve_esize_code :: proc "contextless" (esize: u32) -> u8 {…}

The SVE element-width code (the size an operand carries) for a width in bits: .b = 1, .h = 2, .s = 4, .d = 8.

sve_tsz_esize ¶
Source

@(require_results)
sve_tsz_esize :: proc "contextless" (v: u32) -> u32 {…}

The element width, in bits, that a packed tsz value names.

sve_tsz_pack ¶
Source

@(require_results)
sve_tsz_pack :: proc "contextless" (esize, shift: u32) -> u32 {…}

The packed tsz value for an element width and shift.

sve_tsz_shift ¶
Source

@(require_results)
sve_tsz_shift :: proc "contextless" (v: u32) -> u32 {…}

The shift amount a packed tsz value names.

sysreg_bits ¶
Source

@(require_results)
sysreg_bits :: proc "contextless" (r: Register) -> u32 {…}

The 15-bit field MRS/MSR carry at bits 19:5 of the instruction word.

sysreg_field ¶
Source

@(require_results)
sysreg_field :: proc "contextless" (op0, op1, CRn, CRm, op2: u32) -> Register {…}

sysreg_from_bits ¶
Source

@(require_results)
sysreg_from_bits :: proc "contextless" (bits: u32) -> Register {…}

The register a decoded 15-bit MRS/MSR field names.

sysreg_name ¶
Source

@(require_results)
sysreg_name :: proc "contextless" (sr: Register) -> (name: string, ok: bool) {…}

Name for a system register, or ok=false when it is not one we know -- callers should fall back to printing the raw field.

tprint ¶
Source

tprint :: proc(
	instructions: []Instruction, 
	inst_info:    []Instruction_Info, 
	label_defs:   []rexcode_isa.Label_Definition, 
	tokens:       ^[dynamic]rexcode_isa.Token = nil, 
	options:      ^rexcode_isa.Print_Options = nil, 
	label_names:  ^map[rexcode_isa.Label_Offset]string = nil, 
) -> string {…}

tprintln ¶
Source

tprintln :: proc(
	instructions: []Instruction, 
	inst_info:    []Instruction_Info, 
	label_defs:   []rexcode_isa.Label_Definition, 
	tokens:       ^[dynamic]rexcode_isa.Token = nil, 
	options:      ^rexcode_isa.Print_Options = nil, 
	label_names:  ^map[rexcode_isa.Label_Offset]string = nil, 
) -> string {…}

unpack_bitmask_fields ¶
Source

unpack_bitmask_fields :: proc "contextless" (v: i64) -> (n, immr, imms: u8) {…}

unpack_bitmask_fields inverts pack_bitmask_fields.

v_reg ¶
Source

@(require_results)
v_reg :: proc "contextless" (n: u8) -> Register {…}

w_reg ¶
Source

@(require_results)
w_reg :: proc "contextless" (n: u8) -> Register {…}

wprint ¶
Source

wprint :: proc(
	w:            io.Stream, 
	instructions: []Instruction, 
	inst_info:    []Instruction_Info, 
	label_defs:   []rexcode_isa.Label_Definition, 
	tokens:       ^[dynamic]rexcode_isa.Token = nil, 
	options:      ^rexcode_isa.Print_Options = nil, 
	label_names:  ^map[rexcode_isa.Label_Offset]string = nil, 
) {…}

wprintln ¶
Source

wprintln :: proc(
	w:            io.Stream, 
	instructions: []Instruction, 
	inst_info:    []Instruction_Info, 
	label_defs:   []rexcode_isa.Label_Definition, 
	tokens:       ^[dynamic]rexcode_isa.Token = nil, 
	options:      ^rexcode_isa.Print_Options = nil, 
	label_names:  ^map[rexcode_isa.Label_Offset]string = nil, 
) {…}

x_reg ¶
Source

@(require_results)
x_reg :: proc "contextless" (n: u8) -> Register {…}

emit_abs ¶
Source

emit_abs :: proc{
	emit_abs_v8b_v8b,
	emit_abs_zb_p_zb,
}

emit_add ¶
Source

emit_add :: proc{
	emit_add_r_r_i,
	emit_add_r_r_sh,
	emit_add_r_r_ex,
	emit_add_v16b_v16b_v16b,
	emit_add_zb_zb_zb,
	emit_add_zb_p_zb_zb,
}

emit_adds ¶
Source

emit_adds :: proc{
	emit_adds_r_r_i,
	emit_adds_r_r_sh,
	emit_adds_r_r_ex,
}

emit_aesd ¶
Source

emit_aesd :: proc{
	emit_aesd_v16b_v16b,
	emit_aesd_zb_zb_zb,
}

emit_aese ¶
Source

emit_aese :: proc{
	emit_aese_v16b_v16b,
	emit_aese_zb_zb_zb,
}

emit_aesimc ¶
Source

emit_aesimc :: proc{
	emit_aesimc_v16b_v16b,
	emit_aesimc_zb_zb,
}

emit_aesmc ¶
Source

emit_aesmc :: proc{
	emit_aesmc_v16b_v16b,
	emit_aesmc_zb_zb,
}

emit_and ¶
Source

emit_and :: proc{
	emit_and_r_r_sh,
	emit_and_r_r_i,
	emit_and_v16b_v16b_v16b,
	emit_and_zb_p_zb_zb,
}

emit_ands ¶
Source

emit_ands :: proc{
	emit_ands_r_r_sh,
	emit_ands_r_r_i,
	emit_ands_pb_p_pb_pb,
}

emit_asr ¶
Source

emit_asr :: proc{
	emit_asr_r_r_r,
	emit_asr_zb_p_zb_zb,
	emit_asr_r_r_i,
}

emit_bcax ¶
Source

emit_bcax :: proc{
	emit_bcax_v16b_v16b_v16b_v16b,
	emit_bcax_zd_zd_zd_zd,
}

emit_bfadd ¶
Source

emit_bfadd :: proc{
	emit_bfadd_zh_p_zh_zh,
	emit_bfadd_zh_zh_zh,
}

emit_bfcvt ¶
Source

emit_bfcvt :: proc{
	emit_bfcvt_r_r,
	emit_bfcvt_zh_p_zs,
}

emit_bfmul ¶
Source

emit_bfmul :: proc{
	emit_bfmul_zh_p_zh_zh,
	emit_bfmul_zh_zh_zh,
}

emit_bfsub ¶
Source

emit_bfsub :: proc{
	emit_bfsub_zh_p_zh_zh,
	emit_bfsub_zh_zh_zh,
}

emit_bic ¶
Source

emit_bic :: proc{
	emit_bic_r_r_sh,
	emit_bic_v16b_v16b_v16b,
	emit_bic_zb_p_zb_zb,
}

emit_bics ¶
Source

emit_bics :: proc{
	emit_bics_r_r_sh,
	emit_bics_pb_p_pb_pb,
}

emit_bsl ¶
Source

emit_bsl :: proc{
	emit_bsl_v16b_v16b_v16b,
	emit_bsl_zd_zd_zd_zd,
}

emit_ccmn ¶
Source

emit_ccmn :: proc{
	emit_ccmn_r_r_i_c,
	emit_ccmn_r_i_i_c,
}

emit_ccmp ¶
Source

emit_ccmp :: proc{
	emit_ccmp_r_r_i_c,
	emit_ccmp_r_i_i_c,
}

emit_cls ¶
Source

emit_cls :: proc{
	emit_cls_r_r,
	emit_cls_zb_p_zb,
}

emit_clz ¶
Source

emit_clz :: proc{
	emit_clz_r_r,
	emit_clz_zb_p_zb,
}

emit_cmn ¶
Source

emit_cmn :: proc{
	emit_cmn_r_sh,
	emit_cmn_r_ex,
	emit_cmn_r_i,
}

emit_cmp ¶
Source

emit_cmp :: proc{
	emit_cmp_r_sh,
	emit_cmp_r_ex,
	emit_cmp_r_i,
}

emit_cnt ¶
Source

emit_cnt :: proc{
	emit_cnt_v8b_v8b,
	emit_cnt_zb_p_zb,
}

emit_decd ¶
Source

emit_decd :: proc{
	emit_decd_r_i_i,
	emit_decd_zd_i_i,
}

emit_dech ¶
Source

emit_dech :: proc{
	emit_dech_r_i_i,
	emit_dech_zh_i_i,
}

emit_decp ¶
Source

emit_decp :: proc{
	emit_decp_r_pb,
	emit_decp_zh_ph,
}

emit_decw ¶
Source

emit_decw :: proc{
	emit_decw_r_i_i,
	emit_decw_zs_i_i,
}

emit_dup ¶
Source

emit_dup :: proc{
	emit_dup_v8b_veb_i,
	emit_dup_v8b_r,
	emit_dup_zb_r,
}

emit_eor ¶
Source

emit_eor :: proc{
	emit_eor_r_r_sh,
	emit_eor_r_r_i,
	emit_eor_v16b_v16b_v16b,
	emit_eor_zb_p_zb_zb,
}

emit_eor3 ¶
Source

emit_eor3 :: proc{
	emit_eor3_v16b_v16b_v16b_v16b,
	emit_eor3_zd_zd_zd_zd,
}

emit_ext ¶
Source

emit_ext :: proc{
	emit_ext_v8b_v8b_v8b_i,
	emit_ext_zb_zb_zb_i,
}

emit_fabs ¶
Source

emit_fabs :: proc{
	emit_fabs_r_r,
	emit_fabs_zh_p_zh,
}

emit_fadd ¶
Source

emit_fadd :: proc{
	emit_fadd_r_r_r,
	emit_fadd_zh_zh_zh,
	emit_fadd_zh_p_zh_zh,
}

emit_fcmeq ¶
Source

emit_fcmeq :: proc{
	emit_fcmeq_v2s_v2s_v2s,
	emit_fcmeq_ph_p_zh_zh,
}

emit_fcmge ¶
Source

emit_fcmge :: proc{
	emit_fcmge_v2s_v2s_v2s,
	emit_fcmge_ph_p_zh_zh,
}

emit_fcmgt ¶
Source

emit_fcmgt :: proc{
	emit_fcmgt_v2s_v2s_v2s,
	emit_fcmgt_ph_p_zh_zh,
}

emit_fcmle ¶
Source

emit_fcmle :: proc{
	emit_fcmle_v2s_v2s,
	emit_fcmle_ph_p_zh,
}

emit_fcmlt ¶
Source

emit_fcmlt :: proc{
	emit_fcmlt_v2s_v2s,
	emit_fcmlt_ph_p_zh,
}

emit_fdiv ¶
Source

emit_fdiv :: proc{
	emit_fdiv_r_r_r,
	emit_fdiv_zh_p_zh_zh,
}

emit_fmax ¶
Source

emit_fmax :: proc{
	emit_fmax_r_r_r,
	emit_fmax_zh_p_zh_zh,
}

emit_fmaxnm ¶
Source

emit_fmaxnm :: proc{
	emit_fmaxnm_r_r_r,
	emit_fmaxnm_zh_p_zh_zh,
}

emit_fmin ¶
Source

emit_fmin :: proc{
	emit_fmin_r_r_r,
	emit_fmin_zh_p_zh_zh,
}

emit_fminnm ¶
Source

emit_fminnm :: proc{
	emit_fminnm_r_r_r,
	emit_fminnm_zh_p_zh_zh,
}

emit_fmla ¶
Source

emit_fmla :: proc{
	emit_fmla_v4s_v4s_v4s,
	emit_fmla_zh_p_zh_zh,
	emit_fmla_zh_zh_zh_i,
}

emit_fmls ¶
Source

emit_fmls :: proc{
	emit_fmls_v4s_v4s_v4s,
	emit_fmls_zh_p_zh_zh,
	emit_fmls_zh_zh_zh_i,
}

emit_fmov ¶
Source

emit_fmov :: proc{
	emit_fmov_r_r,
	emit_fmov_r_i,
}

emit_fmul ¶
Source

emit_fmul :: proc{
	emit_fmul_r_r_r,
	emit_fmul_zh_zh_zh,
	emit_fmul_zh_p_zh_zh,
}

emit_fneg ¶
Source

emit_fneg :: proc{
	emit_fneg_r_r,
	emit_fneg_zh_p_zh,
}

emit_frecps ¶
Source

emit_frecps :: proc{
	emit_frecps_v2s_v2s_v2s,
	emit_frecps_zh_zh_zh,
}

emit_frecpx ¶
Source

emit_frecpx :: proc{
	emit_frecpx_r_r,
	emit_frecpx_zh_p_zh,
}

emit_frinta ¶
Source

emit_frinta :: proc{
	emit_frinta_r_r,
	emit_frinta_zh_p_zh,
}

emit_frinti ¶
Source

emit_frinti :: proc{
	emit_frinti_r_r,
	emit_frinti_zh_p_zh,
}

emit_frintm ¶
Source

emit_frintm :: proc{
	emit_frintm_r_r,
	emit_frintm_zh_p_zh,
}

emit_frintn ¶
Source

emit_frintn :: proc{
	emit_frintn_r_r,
	emit_frintn_zh_p_zh,
}

emit_frintp ¶
Source

emit_frintp :: proc{
	emit_frintp_r_r,
	emit_frintp_zh_p_zh,
}

emit_frintx ¶
Source

emit_frintx :: proc{
	emit_frintx_r_r,
	emit_frintx_zh_p_zh,
}

emit_frintz ¶
Source

emit_frintz :: proc{
	emit_frintz_r_r,
	emit_frintz_zh_p_zh,
}

emit_frsqrts ¶
Source

emit_frsqrts :: proc{
	emit_frsqrts_v2s_v2s_v2s,
	emit_frsqrts_zh_zh_zh,
}

emit_fsqrt ¶
Source

emit_fsqrt :: proc{
	emit_fsqrt_r_r,
	emit_fsqrt_zh_p_zh,
}

emit_fsub ¶
Source

emit_fsub :: proc{
	emit_fsub_r_r_r,
	emit_fsub_zh_zh_zh,
	emit_fsub_zh_p_zh_zh,
}

emit_incd ¶
Source

emit_incd :: proc{
	emit_incd_r_i_i,
	emit_incd_zd_i_i,
}

emit_inch ¶
Source

emit_inch :: proc{
	emit_inch_r_i_i,
	emit_inch_zh_i_i,
}

emit_incp ¶
Source

emit_incp :: proc{
	emit_incp_r_pb,
	emit_incp_zh_ph,
}

emit_incw ¶
Source

emit_incw :: proc{
	emit_incw_r_i_i,
	emit_incw_zs_i_i,
}

emit_index ¶
Source

emit_index :: proc{
	emit_index_zb_i_i,
	emit_index_zb_i_r,
	emit_index_zb_r_i,
	emit_index_zb_r_r,
}

emit_ins ¶
Source

emit_ins :: proc{
	emit_ins_veb_i_veb_i,
	emit_ins_veb_i_r,
}

emit_ld1 ¶
Source

emit_ld1 :: proc{
	emit_ld1_v16b_m,
	emit_ld1_veb_i_m,
}

emit_ld1b ¶
Source

emit_ld1b :: proc{
	emit_ld1b_zb_p_m,
	emit_ld1b_i_p_m,
}

emit_ld1d ¶
Source

emit_ld1d :: proc{
	emit_ld1d_zd_p_m,
	emit_ld1d_i_p_m,
}

emit_ld1h ¶
Source

emit_ld1h :: proc{
	emit_ld1h_zh_p_m,
	emit_ld1h_i_p_m,
}

emit_ld1w ¶
Source

emit_ld1w :: proc{
	emit_ld1w_zs_p_m,
	emit_ld1w_i_p_m,
}

emit_ld2 ¶
Source

emit_ld2 :: proc{
	emit_ld2_v16b_m,
	emit_ld2_veb_i_m,
}

emit_ld3 ¶
Source

emit_ld3 :: proc{
	emit_ld3_v16b_m,
	emit_ld3_veb_i_m,
}

emit_ld4 ¶
Source

emit_ld4 :: proc{
	emit_ld4_v16b_m,
	emit_ld4_veb_i_m,
}

emit_ldr ¶
Source

emit_ldr :: proc{
	emit_ldr_r_m,
	emit_ldr_r_l,
	emit_ldr_z_m,
	emit_ldr_i_m,
}

emit_lsl ¶
Source

emit_lsl :: proc{
	emit_lsl_r_r_r,
	emit_lsl_zb_p_zb_zb,
	emit_lsl_r_r_i,
}

emit_lsr ¶
Source

emit_lsr :: proc{
	emit_lsr_r_r_r,
	emit_lsr_zb_p_zb_zb,
	emit_lsr_r_r_i,
}

emit_mov ¶
Source

emit_mov :: proc{
	emit_mov_v8b_v8b,
	emit_mov_zb_p_zb,
	emit_mov_pb_p,
	emit_mov_r_i,
}

emit_mova ¶
Source

emit_mova :: proc{
	emit_mova_zb_p_i,
	emit_mova_i_p_zb,
}

emit_msr ¶
Source

emit_msr :: proc{
	emit_msr_i_i,
	emit_msr_s_r,
}

emit_mul ¶
Source

emit_mul :: proc{
	emit_mul_v16b_v16b_v16b,
	emit_mul_zb_p_zb_zb,
}

emit_neg ¶
Source

emit_neg :: proc{
	emit_neg_v8b_v8b,
	emit_neg_zb_p_zb,
	emit_neg_r_sh,
}

emit_not ¶
Source

emit_not :: proc{
	emit_not_v8b_v8b,
	emit_not_pb_p_pb,
}

emit_orn ¶
Source

emit_orn :: proc{
	emit_orn_r_r_sh,
	emit_orn_v16b_v16b_v16b,
	emit_orn_pb_p_pb_pb,
}

emit_orr ¶
Source

emit_orr :: proc{
	emit_orr_r_r_sh,
	emit_orr_r_r_i,
	emit_orr_v16b_v16b_v16b,
	emit_orr_zb_p_zb_zb,
}

emit_prfm ¶
Source

emit_prfm :: proc{
	emit_prfm_i_m,
	emit_prfm_i_l,
}

emit_ret ¶
Source

emit_ret :: proc{
	emit_ret_r,
	emit_ret_none,
}

emit_rev ¶
Source

emit_rev :: proc{
	emit_rev_r_r,
	emit_rev_zb_zb,
}

emit_ror ¶
Source

emit_ror :: proc{
	emit_ror_r_r_r,
	emit_ror_r_r_i,
}

emit_sabd ¶
Source

emit_sabd :: proc{
	emit_sabd_v8b_v8b_v8b,
	emit_sabd_zb_p_zb_zb,
}

emit_sdiv ¶
Source

emit_sdiv :: proc{
	emit_sdiv_r_r_r,
	emit_sdiv_zs_p_zs_zs,
}

emit_smax ¶
Source

emit_smax :: proc{
	emit_smax_v8b_v8b_v8b,
	emit_smax_zb_p_zb_zb,
}

emit_smin ¶
Source

emit_smin :: proc{
	emit_smin_v8b_v8b_v8b,
	emit_smin_zb_p_zb_zb,
}

emit_smulh ¶
Source

emit_smulh :: proc{
	emit_smulh_r_r_r,
	emit_smulh_zb_p_zb_zb,
}

emit_sqadd ¶
Source

emit_sqadd :: proc{
	emit_sqadd_v8b_v8b_v8b,
	emit_sqadd_zb_zb_zb,
}

emit_sqdecb ¶
Source

emit_sqdecb :: proc{
	emit_sqdecb_r_i_i,
	emit_sqdecb_r_r_i_i,
}

emit_sqdecd ¶
Source

emit_sqdecd :: proc{
	emit_sqdecd_r_i_i,
	emit_sqdecd_r_r_i_i,
	emit_sqdecd_zd_i_i,
}

emit_sqdech ¶
Source

emit_sqdech :: proc{
	emit_sqdech_r_i_i,
	emit_sqdech_r_r_i_i,
	emit_sqdech_zh_i_i,
}

emit_sqdecp ¶
Source

emit_sqdecp :: proc{
	emit_sqdecp_r_pb,
	emit_sqdecp_r_pb_r,
	emit_sqdecp_zh_ph,
}

emit_sqdecw ¶
Source

emit_sqdecw :: proc{
	emit_sqdecw_r_i_i,
	emit_sqdecw_r_r_i_i,
	emit_sqdecw_zs_i_i,
}

emit_sqincb ¶
Source

emit_sqincb :: proc{
	emit_sqincb_r_i_i,
	emit_sqincb_r_r_i_i,
}

emit_sqincd ¶
Source

emit_sqincd :: proc{
	emit_sqincd_r_i_i,
	emit_sqincd_r_r_i_i,
	emit_sqincd_zd_i_i,
}

emit_sqinch ¶
Source

emit_sqinch :: proc{
	emit_sqinch_r_i_i,
	emit_sqinch_r_r_i_i,
	emit_sqinch_zh_i_i,
}

emit_sqincp ¶
Source

emit_sqincp :: proc{
	emit_sqincp_r_pb,
	emit_sqincp_r_pb_r,
	emit_sqincp_zh_ph,
}

emit_sqincw ¶
Source

emit_sqincw :: proc{
	emit_sqincw_r_i_i,
	emit_sqincw_r_r_i_i,
	emit_sqincw_zs_i_i,
}

emit_sqsub ¶
Source

emit_sqsub :: proc{
	emit_sqsub_v8b_v8b_v8b,
	emit_sqsub_zb_zb_zb,
}

emit_st1 ¶
Source

emit_st1 :: proc{
	emit_st1_v16b_m,
	emit_st1_veb_i_m,
}

emit_st1b ¶
Source

emit_st1b :: proc{
	emit_st1b_zb_p_m,
	emit_st1b_i_p_m,
}

emit_st1d ¶
Source

emit_st1d :: proc{
	emit_st1d_zd_p_m,
	emit_st1d_i_p_m,
}

emit_st1h ¶
Source

emit_st1h :: proc{
	emit_st1h_zh_p_m,
	emit_st1h_i_p_m,
}

emit_st1w ¶
Source

emit_st1w :: proc{
	emit_st1w_zs_p_m,
	emit_st1w_i_p_m,
}

emit_st2 ¶
Source

emit_st2 :: proc{
	emit_st2_v16b_m,
	emit_st2_veb_i_m,
}

emit_st3 ¶
Source

emit_st3 :: proc{
	emit_st3_v16b_m,
	emit_st3_veb_i_m,
}

emit_st4 ¶
Source

emit_st4 :: proc{
	emit_st4_v16b_m,
	emit_st4_veb_i_m,
}

emit_str ¶
Source

emit_str :: proc{
	emit_str_r_m,
	emit_str_z_m,
	emit_str_i_m,
}

emit_sub ¶
Source

emit_sub :: proc{
	emit_sub_r_r_i,
	emit_sub_r_r_sh,
	emit_sub_r_r_ex,
	emit_sub_v16b_v16b_v16b,
	emit_sub_zb_zb_zb,
	emit_sub_zb_p_zb_zb,
}

emit_subs ¶
Source

emit_subs :: proc{
	emit_subs_r_r_i,
	emit_subs_r_r_sh,
	emit_subs_r_r_ex,
}

emit_tbl ¶
Source

emit_tbl :: proc{
	emit_tbl_v8b_v16b_v8b,
	emit_tbl_zb_zl1b_zb,
}

emit_tbx ¶
Source

emit_tbx :: proc{
	emit_tbx_v8b_v16b_v8b,
	emit_tbx_zb_zb_zb,
}

emit_trn1 ¶
Source

emit_trn1 :: proc{
	emit_trn1_v8b_v8b_v8b,
	emit_trn1_zb_zb_zb,
}

emit_trn2 ¶
Source

emit_trn2 :: proc{
	emit_trn2_v8b_v8b_v8b,
	emit_trn2_zb_zb_zb,
}

emit_tst ¶
Source

emit_tst :: proc{
	emit_tst_r_i,
	emit_tst_r_sh,
}

emit_uabd ¶
Source

emit_uabd :: proc{
	emit_uabd_v8b_v8b_v8b,
	emit_uabd_zb_p_zb_zb,
}

emit_udiv ¶
Source

emit_udiv :: proc{
	emit_udiv_r_r_r,
	emit_udiv_zs_p_zs_zs,
}

emit_umax ¶
Source

emit_umax :: proc{
	emit_umax_v8b_v8b_v8b,
	emit_umax_zb_p_zb_zb,
}

emit_umin ¶
Source

emit_umin :: proc{
	emit_umin_v8b_v8b_v8b,
	emit_umin_zb_p_zb_zb,
}

emit_umulh ¶
Source

emit_umulh :: proc{
	emit_umulh_r_r_r,
	emit_umulh_zb_p_zb_zb,
}

emit_uqadd ¶
Source

emit_uqadd :: proc{
	emit_uqadd_v8b_v8b_v8b,
	emit_uqadd_zb_zb_zb,
}

emit_uqdecd ¶
Source

emit_uqdecd :: proc{
	emit_uqdecd_r_i_i,
	emit_uqdecd_zd_i_i,
}

emit_uqdech ¶
Source

emit_uqdech :: proc{
	emit_uqdech_r_i_i,
	emit_uqdech_zh_i_i,
}

emit_uqdecp ¶
Source

emit_uqdecp :: proc{
	emit_uqdecp_r_pb,
	emit_uqdecp_zh_ph,
}

emit_uqdecw ¶
Source

emit_uqdecw :: proc{
	emit_uqdecw_r_i_i,
	emit_uqdecw_zs_i_i,
}

emit_uqincd ¶
Source

emit_uqincd :: proc{
	emit_uqincd_r_i_i,
	emit_uqincd_zd_i_i,
}

emit_uqinch ¶
Source

emit_uqinch :: proc{
	emit_uqinch_r_i_i,
	emit_uqinch_zh_i_i,
}

emit_uqincp ¶
Source

emit_uqincp :: proc{
	emit_uqincp_r_pb,
	emit_uqincp_zh_ph,
}

emit_uqincw ¶
Source

emit_uqincw :: proc{
	emit_uqincw_r_i_i,
	emit_uqincw_zs_i_i,
}

emit_uqsub ¶
Source

emit_uqsub :: proc{
	emit_uqsub_v8b_v8b_v8b,
	emit_uqsub_zb_zb_zb,
}

emit_uzp ¶
Source

emit_uzp :: proc{
	emit_uzp_zpb_zb_zb,
	emit_uzp_zqb_zqb,
}

emit_uzp1 ¶
Source

emit_uzp1 :: proc{
	emit_uzp1_v8b_v8b_v8b,
	emit_uzp1_zb_zb_zb,
}

emit_uzp2 ¶
Source

emit_uzp2 :: proc{
	emit_uzp2_v8b_v8b_v8b,
	emit_uzp2_zb_zb_zb,
}

emit_xar ¶
Source

emit_xar :: proc{
	emit_xar_v2d_v2d_v2d_i,
	emit_xar_zd_zd_zd_i,
}

emit_zip ¶
Source

emit_zip :: proc{
	emit_zip_zpb_zb_zb,
	emit_zip_zqb_zqb,
}

emit_zip1 ¶
Source

emit_zip1 :: proc{
	emit_zip1_v8b_v8b_v8b,
	emit_zip1_zb_zb_zb,
}

emit_zip2 ¶
Source

emit_zip2 :: proc{
	emit_zip2_v8b_v8b_v8b,
	emit_zip2_zb_zb_zb,
}

inst_abs ¶
Source

inst_abs :: proc{
	inst_abs_v8b_v8b,
	inst_abs_zb_p_zb,
}

inst_add ¶
Source

inst_add :: proc{
	inst_add_r_r_i,
	inst_add_r_r_sh,
	inst_add_r_r_ex,
	inst_add_v16b_v16b_v16b,
	inst_add_zb_zb_zb,
	inst_add_zb_p_zb_zb,
}

inst_adds ¶
Source

inst_adds :: proc{
	inst_adds_r_r_i,
	inst_adds_r_r_sh,
	inst_adds_r_r_ex,
}

inst_aesd ¶
Source

inst_aesd :: proc{
	inst_aesd_v16b_v16b,
	inst_aesd_zb_zb_zb,
}

inst_aese ¶
Source

inst_aese :: proc{
	inst_aese_v16b_v16b,
	inst_aese_zb_zb_zb,
}

inst_aesimc ¶
Source

inst_aesimc :: proc{
	inst_aesimc_v16b_v16b,
	inst_aesimc_zb_zb,
}

inst_aesmc ¶
Source

inst_aesmc :: proc{
	inst_aesmc_v16b_v16b,
	inst_aesmc_zb_zb,
}

inst_and ¶
Source

inst_and :: proc{
	inst_and_r_r_sh,
	inst_and_r_r_i,
	inst_and_v16b_v16b_v16b,
	inst_and_zb_p_zb_zb,
}

inst_ands ¶
Source

inst_ands :: proc{
	inst_ands_r_r_sh,
	inst_ands_r_r_i,
	inst_ands_pb_p_pb_pb,
}

inst_asr ¶
Source

inst_asr :: proc{
	inst_asr_r_r_r,
	inst_asr_zb_p_zb_zb,
	inst_asr_r_r_i,
}

inst_bcax ¶
Source

inst_bcax :: proc{
	inst_bcax_v16b_v16b_v16b_v16b,
	inst_bcax_zd_zd_zd_zd,
}

inst_bfadd ¶
Source

inst_bfadd :: proc{
	inst_bfadd_zh_p_zh_zh,
	inst_bfadd_zh_zh_zh,
}

inst_bfcvt ¶
Source

inst_bfcvt :: proc{
	inst_bfcvt_r_r,
	inst_bfcvt_zh_p_zs,
}

inst_bfmul ¶
Source

inst_bfmul :: proc{
	inst_bfmul_zh_p_zh_zh,
	inst_bfmul_zh_zh_zh,
}

inst_bfsub ¶
Source

inst_bfsub :: proc{
	inst_bfsub_zh_p_zh_zh,
	inst_bfsub_zh_zh_zh,
}

inst_bic ¶
Source

inst_bic :: proc{
	inst_bic_r_r_sh,
	inst_bic_v16b_v16b_v16b,
	inst_bic_zb_p_zb_zb,
}

inst_bics ¶
Source

inst_bics :: proc{
	inst_bics_r_r_sh,
	inst_bics_pb_p_pb_pb,
}

inst_bsl ¶
Source

inst_bsl :: proc{
	inst_bsl_v16b_v16b_v16b,
	inst_bsl_zd_zd_zd_zd,
}

inst_ccmn ¶
Source

inst_ccmn :: proc{
	inst_ccmn_r_r_i_c,
	inst_ccmn_r_i_i_c,
}

inst_ccmp ¶
Source

inst_ccmp :: proc{
	inst_ccmp_r_r_i_c,
	inst_ccmp_r_i_i_c,
}

inst_cls ¶
Source

inst_cls :: proc{
	inst_cls_r_r,
	inst_cls_zb_p_zb,
}

inst_clz ¶
Source

inst_clz :: proc{
	inst_clz_r_r,
	inst_clz_zb_p_zb,
}

inst_cmn ¶
Source

inst_cmn :: proc{
	inst_cmn_r_sh,
	inst_cmn_r_ex,
	inst_cmn_r_i,
}

inst_cmp ¶
Source

inst_cmp :: proc{
	inst_cmp_r_sh,
	inst_cmp_r_ex,
	inst_cmp_r_i,
}

inst_cnt ¶
Source

inst_cnt :: proc{
	inst_cnt_v8b_v8b,
	inst_cnt_zb_p_zb,
}

inst_decd ¶
Source

inst_decd :: proc{
	inst_decd_r_i_i,
	inst_decd_zd_i_i,
}

inst_dech ¶
Source

inst_dech :: proc{
	inst_dech_r_i_i,
	inst_dech_zh_i_i,
}

inst_decp ¶
Source

inst_decp :: proc{
	inst_decp_r_pb,
	inst_decp_zh_ph,
}

inst_decw ¶
Source

inst_decw :: proc{
	inst_decw_r_i_i,
	inst_decw_zs_i_i,
}

inst_dup ¶
Source

inst_dup :: proc{
	inst_dup_v8b_veb_i,
	inst_dup_v8b_r,
	inst_dup_zb_r,
}

inst_eor ¶
Source

inst_eor :: proc{
	inst_eor_r_r_sh,
	inst_eor_r_r_i,
	inst_eor_v16b_v16b_v16b,
	inst_eor_zb_p_zb_zb,
}

inst_eor3 ¶
Source

inst_eor3 :: proc{
	inst_eor3_v16b_v16b_v16b_v16b,
	inst_eor3_zd_zd_zd_zd,
}

inst_ext ¶
Source

inst_ext :: proc{
	inst_ext_v8b_v8b_v8b_i,
	inst_ext_zb_zb_zb_i,
}

inst_fabs ¶
Source

inst_fabs :: proc{
	inst_fabs_r_r,
	inst_fabs_zh_p_zh,
}

inst_fadd ¶
Source

inst_fadd :: proc{
	inst_fadd_r_r_r,
	inst_fadd_zh_zh_zh,
	inst_fadd_zh_p_zh_zh,
}

inst_fcmeq ¶
Source

inst_fcmeq :: proc{
	inst_fcmeq_v2s_v2s_v2s,
	inst_fcmeq_ph_p_zh_zh,
}

inst_fcmge ¶
Source

inst_fcmge :: proc{
	inst_fcmge_v2s_v2s_v2s,
	inst_fcmge_ph_p_zh_zh,
}

inst_fcmgt ¶
Source

inst_fcmgt :: proc{
	inst_fcmgt_v2s_v2s_v2s,
	inst_fcmgt_ph_p_zh_zh,
}

inst_fcmle ¶
Source

inst_fcmle :: proc{
	inst_fcmle_v2s_v2s,
	inst_fcmle_ph_p_zh,
}

inst_fcmlt ¶
Source

inst_fcmlt :: proc{
	inst_fcmlt_v2s_v2s,
	inst_fcmlt_ph_p_zh,
}

inst_fdiv ¶
Source

inst_fdiv :: proc{
	inst_fdiv_r_r_r,
	inst_fdiv_zh_p_zh_zh,
}

inst_fmax ¶
Source

inst_fmax :: proc{
	inst_fmax_r_r_r,
	inst_fmax_zh_p_zh_zh,
}

inst_fmaxnm ¶
Source

inst_fmaxnm :: proc{
	inst_fmaxnm_r_r_r,
	inst_fmaxnm_zh_p_zh_zh,
}

inst_fmin ¶
Source

inst_fmin :: proc{
	inst_fmin_r_r_r,
	inst_fmin_zh_p_zh_zh,
}

inst_fminnm ¶
Source

inst_fminnm :: proc{
	inst_fminnm_r_r_r,
	inst_fminnm_zh_p_zh_zh,
}

inst_fmla ¶
Source

inst_fmla :: proc{
	inst_fmla_v4s_v4s_v4s,
	inst_fmla_zh_p_zh_zh,
	inst_fmla_zh_zh_zh_i,
}

inst_fmls ¶
Source

inst_fmls :: proc{
	inst_fmls_v4s_v4s_v4s,
	inst_fmls_zh_p_zh_zh,
	inst_fmls_zh_zh_zh_i,
}

inst_fmov ¶
Source

inst_fmov :: proc{
	inst_fmov_r_r,
	inst_fmov_r_i,
}

inst_fmul ¶
Source

inst_fmul :: proc{
	inst_fmul_r_r_r,
	inst_fmul_zh_zh_zh,
	inst_fmul_zh_p_zh_zh,
}

inst_fneg ¶
Source

inst_fneg :: proc{
	inst_fneg_r_r,
	inst_fneg_zh_p_zh,
}

inst_frecps ¶
Source

inst_frecps :: proc{
	inst_frecps_v2s_v2s_v2s,
	inst_frecps_zh_zh_zh,
}

inst_frecpx ¶
Source

inst_frecpx :: proc{
	inst_frecpx_r_r,
	inst_frecpx_zh_p_zh,
}

inst_frinta ¶
Source

inst_frinta :: proc{
	inst_frinta_r_r,
	inst_frinta_zh_p_zh,
}

inst_frinti ¶
Source

inst_frinti :: proc{
	inst_frinti_r_r,
	inst_frinti_zh_p_zh,
}

inst_frintm ¶
Source

inst_frintm :: proc{
	inst_frintm_r_r,
	inst_frintm_zh_p_zh,
}

inst_frintn ¶
Source

inst_frintn :: proc{
	inst_frintn_r_r,
	inst_frintn_zh_p_zh,
}

inst_frintp ¶
Source

inst_frintp :: proc{
	inst_frintp_r_r,
	inst_frintp_zh_p_zh,
}

inst_frintx ¶
Source

inst_frintx :: proc{
	inst_frintx_r_r,
	inst_frintx_zh_p_zh,
}

inst_frintz ¶
Source

inst_frintz :: proc{
	inst_frintz_r_r,
	inst_frintz_zh_p_zh,
}

inst_frsqrts ¶
Source

inst_frsqrts :: proc{
	inst_frsqrts_v2s_v2s_v2s,
	inst_frsqrts_zh_zh_zh,
}

inst_fsqrt ¶
Source

inst_fsqrt :: proc{
	inst_fsqrt_r_r,
	inst_fsqrt_zh_p_zh,
}

inst_fsub ¶
Source

inst_fsub :: proc{
	inst_fsub_r_r_r,
	inst_fsub_zh_zh_zh,
	inst_fsub_zh_p_zh_zh,
}

inst_incd ¶
Source

inst_incd :: proc{
	inst_incd_r_i_i,
	inst_incd_zd_i_i,
}

inst_inch ¶
Source

inst_inch :: proc{
	inst_inch_r_i_i,
	inst_inch_zh_i_i,
}

inst_incp ¶
Source

inst_incp :: proc{
	inst_incp_r_pb,
	inst_incp_zh_ph,
}

inst_incw ¶
Source

inst_incw :: proc{
	inst_incw_r_i_i,
	inst_incw_zs_i_i,
}

inst_index ¶
Source

inst_index :: proc{
	inst_index_zb_i_i,
	inst_index_zb_i_r,
	inst_index_zb_r_i,
	inst_index_zb_r_r,
}

inst_ins ¶
Source

inst_ins :: proc{
	inst_ins_veb_i_veb_i,
	inst_ins_veb_i_r,
}

inst_ld1 ¶
Source

inst_ld1 :: proc{
	inst_ld1_v16b_m,
	inst_ld1_veb_i_m,
}

inst_ld1b ¶
Source

inst_ld1b :: proc{
	inst_ld1b_zb_p_m,
	inst_ld1b_i_p_m,
}

inst_ld1d ¶
Source

inst_ld1d :: proc{
	inst_ld1d_zd_p_m,
	inst_ld1d_i_p_m,
}

inst_ld1h ¶
Source

inst_ld1h :: proc{
	inst_ld1h_zh_p_m,
	inst_ld1h_i_p_m,
}

inst_ld1w ¶
Source

inst_ld1w :: proc{
	inst_ld1w_zs_p_m,
	inst_ld1w_i_p_m,
}

inst_ld2 ¶
Source

inst_ld2 :: proc{
	inst_ld2_v16b_m,
	inst_ld2_veb_i_m,
}

inst_ld3 ¶
Source

inst_ld3 :: proc{
	inst_ld3_v16b_m,
	inst_ld3_veb_i_m,
}

inst_ld4 ¶
Source

inst_ld4 :: proc{
	inst_ld4_v16b_m,
	inst_ld4_veb_i_m,
}

inst_ldr ¶
Source

inst_ldr :: proc{
	inst_ldr_r_m,
	inst_ldr_r_l,
	inst_ldr_z_m,
	inst_ldr_i_m,
}

inst_lsl ¶
Source

inst_lsl :: proc{
	inst_lsl_r_r_r,
	inst_lsl_zb_p_zb_zb,
	inst_lsl_r_r_i,
}

inst_lsr ¶
Source

inst_lsr :: proc{
	inst_lsr_r_r_r,
	inst_lsr_zb_p_zb_zb,
	inst_lsr_r_r_i,
}

inst_mov ¶
Source

inst_mov :: proc{
	inst_mov_v8b_v8b,
	inst_mov_zb_p_zb,
	inst_mov_pb_p,
	inst_mov_r_i,
}

inst_mova ¶
Source

inst_mova :: proc{
	inst_mova_zb_p_i,
	inst_mova_i_p_zb,
}

inst_msr ¶
Source

inst_msr :: proc{
	inst_msr_i_i,
	inst_msr_s_r,
}

inst_mul ¶
Source

inst_mul :: proc{
	inst_mul_v16b_v16b_v16b,
	inst_mul_zb_p_zb_zb,
}

inst_neg ¶
Source

inst_neg :: proc{
	inst_neg_v8b_v8b,
	inst_neg_zb_p_zb,
	inst_neg_r_sh,
}

inst_not ¶
Source

inst_not :: proc{
	inst_not_v8b_v8b,
	inst_not_pb_p_pb,
}

inst_orn ¶
Source

inst_orn :: proc{
	inst_orn_r_r_sh,
	inst_orn_v16b_v16b_v16b,
	inst_orn_pb_p_pb_pb,
}

inst_orr ¶
Source

inst_orr :: proc{
	inst_orr_r_r_sh,
	inst_orr_r_r_i,
	inst_orr_v16b_v16b_v16b,
	inst_orr_zb_p_zb_zb,
}

inst_prfm ¶
Source

inst_prfm :: proc{
	inst_prfm_i_m,
	inst_prfm_i_l,
}

inst_ret ¶
Source

inst_ret :: proc{
	inst_ret_r,
	inst_ret_none,
}

inst_rev ¶
Source

inst_rev :: proc{
	inst_rev_r_r,
	inst_rev_zb_zb,
}

inst_ror ¶
Source

inst_ror :: proc{
	inst_ror_r_r_r,
	inst_ror_r_r_i,
}

inst_sabd ¶
Source

inst_sabd :: proc{
	inst_sabd_v8b_v8b_v8b,
	inst_sabd_zb_p_zb_zb,
}

inst_sdiv ¶
Source

inst_sdiv :: proc{
	inst_sdiv_r_r_r,
	inst_sdiv_zs_p_zs_zs,
}

inst_smax ¶
Source

inst_smax :: proc{
	inst_smax_v8b_v8b_v8b,
	inst_smax_zb_p_zb_zb,
}

inst_smin ¶
Source

inst_smin :: proc{
	inst_smin_v8b_v8b_v8b,
	inst_smin_zb_p_zb_zb,
}

inst_smulh ¶
Source

inst_smulh :: proc{
	inst_smulh_r_r_r,
	inst_smulh_zb_p_zb_zb,
}

inst_sqadd ¶
Source

inst_sqadd :: proc{
	inst_sqadd_v8b_v8b_v8b,
	inst_sqadd_zb_zb_zb,
}

inst_sqdecb ¶
Source

inst_sqdecb :: proc{
	inst_sqdecb_r_i_i,
	inst_sqdecb_r_r_i_i,
}

inst_sqdecd ¶
Source

inst_sqdecd :: proc{
	inst_sqdecd_r_i_i,
	inst_sqdecd_r_r_i_i,
	inst_sqdecd_zd_i_i,
}

inst_sqdech ¶
Source

inst_sqdech :: proc{
	inst_sqdech_r_i_i,
	inst_sqdech_r_r_i_i,
	inst_sqdech_zh_i_i,
}

inst_sqdecp ¶
Source

inst_sqdecp :: proc{
	inst_sqdecp_r_pb,
	inst_sqdecp_r_pb_r,
	inst_sqdecp_zh_ph,
}

inst_sqdecw ¶
Source

inst_sqdecw :: proc{
	inst_sqdecw_r_i_i,
	inst_sqdecw_r_r_i_i,
	inst_sqdecw_zs_i_i,
}

inst_sqincb ¶
Source

inst_sqincb :: proc{
	inst_sqincb_r_i_i,
	inst_sqincb_r_r_i_i,
}

inst_sqincd ¶
Source

inst_sqincd :: proc{
	inst_sqincd_r_i_i,
	inst_sqincd_r_r_i_i,
	inst_sqincd_zd_i_i,
}

inst_sqinch ¶
Source

inst_sqinch :: proc{
	inst_sqinch_r_i_i,
	inst_sqinch_r_r_i_i,
	inst_sqinch_zh_i_i,
}

inst_sqincp ¶
Source

inst_sqincp :: proc{
	inst_sqincp_r_pb,
	inst_sqincp_r_pb_r,
	inst_sqincp_zh_ph,
}

inst_sqincw ¶
Source

inst_sqincw :: proc{
	inst_sqincw_r_i_i,
	inst_sqincw_r_r_i_i,
	inst_sqincw_zs_i_i,
}

inst_sqsub ¶
Source

inst_sqsub :: proc{
	inst_sqsub_v8b_v8b_v8b,
	inst_sqsub_zb_zb_zb,
}

inst_st1 ¶
Source

inst_st1 :: proc{
	inst_st1_v16b_m,
	inst_st1_veb_i_m,
}

inst_st1b ¶
Source

inst_st1b :: proc{
	inst_st1b_zb_p_m,
	inst_st1b_i_p_m,
}

inst_st1d ¶
Source

inst_st1d :: proc{
	inst_st1d_zd_p_m,
	inst_st1d_i_p_m,
}

inst_st1h ¶
Source

inst_st1h :: proc{
	inst_st1h_zh_p_m,
	inst_st1h_i_p_m,
}

inst_st1w ¶
Source

inst_st1w :: proc{
	inst_st1w_zs_p_m,
	inst_st1w_i_p_m,
}

inst_st2 ¶
Source

inst_st2 :: proc{
	inst_st2_v16b_m,
	inst_st2_veb_i_m,
}

inst_st3 ¶
Source

inst_st3 :: proc{
	inst_st3_v16b_m,
	inst_st3_veb_i_m,
}

inst_st4 ¶
Source

inst_st4 :: proc{
	inst_st4_v16b_m,
	inst_st4_veb_i_m,
}

inst_str ¶
Source

inst_str :: proc{
	inst_str_r_m,
	inst_str_z_m,
	inst_str_i_m,
}

inst_sub ¶
Source

inst_sub :: proc{
	inst_sub_r_r_i,
	inst_sub_r_r_sh,
	inst_sub_r_r_ex,
	inst_sub_v16b_v16b_v16b,
	inst_sub_zb_zb_zb,
	inst_sub_zb_p_zb_zb,
}

inst_subs ¶
Source

inst_subs :: proc{
	inst_subs_r_r_i,
	inst_subs_r_r_sh,
	inst_subs_r_r_ex,
}

inst_tbl ¶
Source

inst_tbl :: proc{
	inst_tbl_v8b_v16b_v8b,
	inst_tbl_zb_zl1b_zb,
}

inst_tbx ¶
Source

inst_tbx :: proc{
	inst_tbx_v8b_v16b_v8b,
	inst_tbx_zb_zb_zb,
}

inst_trn1 ¶
Source

inst_trn1 :: proc{
	inst_trn1_v8b_v8b_v8b,
	inst_trn1_zb_zb_zb,
}

inst_trn2 ¶
Source

inst_trn2 :: proc{
	inst_trn2_v8b_v8b_v8b,
	inst_trn2_zb_zb_zb,
}

inst_tst ¶
Source

inst_tst :: proc{
	inst_tst_r_i,
	inst_tst_r_sh,
}

inst_uabd ¶
Source

inst_uabd :: proc{
	inst_uabd_v8b_v8b_v8b,
	inst_uabd_zb_p_zb_zb,
}

inst_udiv ¶
Source

inst_udiv :: proc{
	inst_udiv_r_r_r,
	inst_udiv_zs_p_zs_zs,
}

inst_umax ¶
Source

inst_umax :: proc{
	inst_umax_v8b_v8b_v8b,
	inst_umax_zb_p_zb_zb,
}

inst_umin ¶
Source

inst_umin :: proc{
	inst_umin_v8b_v8b_v8b,
	inst_umin_zb_p_zb_zb,
}

inst_umulh ¶
Source

inst_umulh :: proc{
	inst_umulh_r_r_r,
	inst_umulh_zb_p_zb_zb,
}

inst_uqadd ¶
Source

inst_uqadd :: proc{
	inst_uqadd_v8b_v8b_v8b,
	inst_uqadd_zb_zb_zb,
}

inst_uqdecd ¶
Source

inst_uqdecd :: proc{
	inst_uqdecd_r_i_i,
	inst_uqdecd_zd_i_i,
}

inst_uqdech ¶
Source

inst_uqdech :: proc{
	inst_uqdech_r_i_i,
	inst_uqdech_zh_i_i,
}

inst_uqdecp ¶
Source

inst_uqdecp :: proc{
	inst_uqdecp_r_pb,
	inst_uqdecp_zh_ph,
}

inst_uqdecw ¶
Source

inst_uqdecw :: proc{
	inst_uqdecw_r_i_i,
	inst_uqdecw_zs_i_i,
}

inst_uqincd ¶
Source

inst_uqincd :: proc{
	inst_uqincd_r_i_i,
	inst_uqincd_zd_i_i,
}

inst_uqinch ¶
Source

inst_uqinch :: proc{
	inst_uqinch_r_i_i,
	inst_uqinch_zh_i_i,
}

inst_uqincp ¶
Source

inst_uqincp :: proc{
	inst_uqincp_r_pb,
	inst_uqincp_zh_ph,
}

inst_uqincw ¶
Source

inst_uqincw :: proc{
	inst_uqincw_r_i_i,
	inst_uqincw_zs_i_i,
}

inst_uqsub ¶
Source

inst_uqsub :: proc{
	inst_uqsub_v8b_v8b_v8b,
	inst_uqsub_zb_zb_zb,
}

inst_uzp ¶
Source

inst_uzp :: proc{
	inst_uzp_zpb_zb_zb,
	inst_uzp_zqb_zqb,
}

inst_uzp1 ¶
Source

inst_uzp1 :: proc{
	inst_uzp1_v8b_v8b_v8b,
	inst_uzp1_zb_zb_zb,
}

inst_uzp2 ¶
Source

inst_uzp2 :: proc{
	inst_uzp2_v8b_v8b_v8b,
	inst_uzp2_zb_zb_zb,
}

inst_xar ¶
Source

inst_xar :: proc{
	inst_xar_v2d_v2d_v2d_i,
	inst_xar_zd_zd_zd_i,
}

inst_zip ¶
Source

inst_zip :: proc{
	inst_zip_zpb_zb_zb,
	inst_zip_zqb_zqb,
}

inst_zip1 ¶
Source

inst_zip1 :: proc{
	inst_zip1_v8b_v8b_v8b,
	inst_zip1_zb_zb_zb,
}

inst_zip2 ¶
Source

inst_zip2 :: proc{
	inst_zip2_v8b_v8b_v8b,
	inst_zip2_zb_zb_zb,
}

package core:rexcode/isa/arm64Source

Overview

Index

Types

Related Procedures With Parameters

Related Constants

Related Procedures With Parameters

Related Procedures With Parameters

Related Procedures With Parameters

Related Procedures With Parameters

Related Procedures With Returns

Related Constants

Related Procedures With Parameters

Related Procedures With Parameters

Related Procedures With Returns

Related Procedures With Parameters

Related Procedures With Parameters

Related Procedures With Returns

Related Procedures With Parameters

Related Procedures With Parameters

Related Constants

Related Procedures With Parameters

Related Procedures With Returns

Related Constants

Related Procedures With Parameters

Constants

package core:rexcode/isa/arm64
Source