package core:simd/x86
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Overview
SIMD intrinsics specific to the Intel x86 and AMD64 architectures.
Index
Constants (57)
- _MM_EXCEPT_DENORM
- _MM_EXCEPT_DIV_ZERO
- _MM_EXCEPT_INEXACT
- _MM_EXCEPT_INVALID
- _MM_EXCEPT_MASK
- _MM_EXCEPT_OVERFLOW
- _MM_EXCEPT_UNDERFLOW
- _MM_FLUSH_ZERO_MASK
- _MM_FLUSH_ZERO_OFF
- _MM_FLUSH_ZERO_ON
- _MM_FROUND_CEIL
- _MM_FROUND_CUR_DIRECTION
- _MM_FROUND_FLOOR
- _MM_FROUND_NEARBYINT
- _MM_FROUND_NINT
- _MM_FROUND_NO_EXC
- _MM_FROUND_RAISE_EXC
- _MM_FROUND_RINT
- _MM_FROUND_TO_NEAREST_INT
- _MM_FROUND_TO_NEG_INF
- _MM_FROUND_TO_POS_INF
- _MM_FROUND_TO_ZERO
- _MM_FROUND_TRUNC
- _MM_HINT_ET0
- _MM_HINT_ET1
- _MM_HINT_NTA
- _MM_HINT_T0
- _MM_HINT_T1
- _MM_HINT_T2
- _MM_MASK_DENORM
- _MM_MASK_DIV_ZERO
- _MM_MASK_INEXACT
- _MM_MASK_INVALID
- _MM_MASK_MASK
- _MM_MASK_OVERFLOW
- _MM_MASK_UNDERFLOW
- _MM_ROUND_DOWN
- _MM_ROUND_MASK
- _MM_ROUND_NEAREST
- _MM_ROUND_TOWARD_ZERO
- _MM_ROUND_UP
- _SIDD_BIT_MASK
- _SIDD_CMP_EQUAL_ANY
- _SIDD_CMP_EQUAL_EACH
- _SIDD_CMP_EQUAL_ORDERED
- _SIDD_CMP_RANGES
- _SIDD_LEAST_SIGNIFICANT
- _SIDD_MASKED_NEGATIVE_POLARITY
- _SIDD_MASKED_POSITIVE_POLARITY
- _SIDD_MOST_SIGNIFICANT
- _SIDD_NEGATIVE_POLARITY
- _SIDD_POSITIVE_POLARITY
- _SIDD_SBYTE_OPS
- _SIDD_SWORD_OPS
- _SIDD_UBYTE_OPS
- _SIDD_UNIT_MASK
- _SIDD_UWORD_OPS
Variables (0)
This section is empty.
Procedures (488)
- _MM_GET_EXCEPTION_MASK
- _MM_GET_EXCEPTION_STATE
- _MM_GET_FLUSH_ZERO_MODE
- _MM_GET_ROUNDING_MODE
- _MM_SET_EXCEPTION_MASK
- _MM_SET_EXCEPTION_STATE
- _MM_SET_FLUSH_ZERO_MODE
- _MM_SET_ROUNDING_MODE
- _MM_SHUFFLE
- _MM_TRANSPOSE4_PS
- __rdtscp
- _addcarry_u32
- _addcarry_u64
- _addcarryx_u32
- _addcarryx_u64
- _andn_u32
- _andn_u64
- _bextr2_u32
- _bextr2_u64
- _bextr_u32
- _bextr_u64
- _blsi_u32
- _blsi_u64
- _blsmsk_u32
- _blsmsk_u64
- _blsr_u32
- _blsr_u64
- _bzhi_u32
- _bzhi_u64
- _fxrstor
- _fxrstor64
- _fxsave
- _fxsave64
- _lzcnt_u32
- _lzcnt_u64
- _mm_abs_epi16
- _mm_abs_epi32
- _mm_abs_epi8
- _mm_add_epi16
- _mm_add_epi32
- _mm_add_epi64
- _mm_add_epi8
- _mm_add_pd
- _mm_add_ps
- _mm_add_sd
- _mm_add_ss
- _mm_adds_epi16
- _mm_adds_epi8
- _mm_adds_epu16
- _mm_adds_epu8
- _mm_addsub_pd
- _mm_addsub_ps
- _mm_aesdec_si128
- _mm_aesdeclast_si128
- _mm_aesenc_si128
- _mm_aesenclast_si128
- _mm_aesimc_si128
- _mm_aeskeygenassist_si128
- _mm_alignr_epi8
- _mm_and_pd
- _mm_and_ps
- _mm_and_si128
- _mm_andnot_pd
- _mm_andnot_ps
- _mm_andnot_si128
- _mm_avg_epu16
- _mm_avg_epu8
- _mm_blend_epi16
- _mm_blend_pd
- _mm_blend_ps
- _mm_blendv_epi8
- _mm_blendv_pd
- _mm_blendv_ps
- _mm_bslli_si128
- _mm_bsrli_si128
- _mm_castpd_ps
- _mm_castpd_si128
- _mm_castps_pd
- _mm_castps_si128
- _mm_castsi128_pd
- _mm_castsi128_ps
- _mm_ceil_pd
- _mm_ceil_ps
- _mm_ceil_sd
- _mm_ceil_ss
- _mm_clflush
- _mm_clmulepi64_si128
- _mm_cmpeq_epi16
- _mm_cmpeq_epi32
- _mm_cmpeq_epi64
- _mm_cmpeq_epi8
- _mm_cmpeq_pd
- _mm_cmpeq_ps
- _mm_cmpeq_sd
- _mm_cmpeq_ss
- _mm_cmpestra
- _mm_cmpestrc
- _mm_cmpestri
- _mm_cmpestrm
- _mm_cmpestro
- _mm_cmpestrs
- _mm_cmpestrz
- _mm_cmpge_pd
- _mm_cmpge_ps
- _mm_cmpge_sd
- _mm_cmpge_ss
- _mm_cmpgt_epi16
- _mm_cmpgt_epi32
- _mm_cmpgt_epi64
- _mm_cmpgt_epi8
- _mm_cmpgt_pd
- _mm_cmpgt_ps
- _mm_cmpgt_sd
- _mm_cmpgt_ss
- _mm_cmpistra
- _mm_cmpistrc
- _mm_cmpistri
- _mm_cmpistrm
- _mm_cmpistro
- _mm_cmpistrs
- _mm_cmpistrz
- _mm_cmple_pd
- _mm_cmple_ps
- _mm_cmple_sd
- _mm_cmple_ss
- _mm_cmplt_epi16
- _mm_cmplt_epi32
- _mm_cmplt_epi8
- _mm_cmplt_pd
- _mm_cmplt_ps
- _mm_cmplt_sd
- _mm_cmplt_ss
- _mm_cmpneq_pd
- _mm_cmpneq_ps
- _mm_cmpneq_sd
- _mm_cmpneq_ss
- _mm_cmpnge_pd
- _mm_cmpnge_ps
- _mm_cmpnge_sd
- _mm_cmpnge_ss
- _mm_cmpngt_pd
- _mm_cmpngt_ps
- _mm_cmpngt_sd
- _mm_cmpngt_ss
- _mm_cmpnle_pd
- _mm_cmpnle_ps
- _mm_cmpnle_sd
- _mm_cmpnle_ss
- _mm_cmpnlt_pd
- _mm_cmpnlt_ps
- _mm_cmpnlt_sd
- _mm_cmpnlt_ss
- _mm_cmpord_pd
- _mm_cmpord_ps
- _mm_cmpord_sd
- _mm_cmpord_ss
- _mm_cmpunord_pd
- _mm_cmpunord_ps
- _mm_cmpunord_sd
- _mm_cmpunord_ss
- _mm_comieq_sd
- _mm_comieq_ss
- _mm_comige_sd
- _mm_comige_ss
- _mm_comigt_sd
- _mm_comigt_ss
- _mm_comile_sd
- _mm_comile_ss
- _mm_comilt_sd
- _mm_comilt_ss
- _mm_comineq_sd
- _mm_comineq_ss
- _mm_crc32_u16
- _mm_crc32_u32
- _mm_crc32_u64
- _mm_crc32_u8
- _mm_cvt_si2ss
- _mm_cvt_ss2si
- _mm_cvtepi16_epi32
- _mm_cvtepi16_epi64
- _mm_cvtepi32_epi64
- _mm_cvtepi32_pd
- _mm_cvtepi32_ps
- _mm_cvtepi8_epi16
- _mm_cvtepi8_epi32
- _mm_cvtepi8_epi64
- _mm_cvtepu16_epi32
- _mm_cvtepu16_epi64
- _mm_cvtepu32_epi64
- _mm_cvtepu8_epi16
- _mm_cvtepu8_epi32
- _mm_cvtepu8_epi64
- _mm_cvtpd_epi32
- _mm_cvtpd_ps
- _mm_cvtps_epi32
- _mm_cvtps_pd
- _mm_cvtsd_f64
- _mm_cvtsd_si32
- _mm_cvtsd_si64
- _mm_cvtsd_si64x
- _mm_cvtsd_ss
- _mm_cvtsi128_si32
- _mm_cvtsi128_si64
- _mm_cvtsi128_si64x
- _mm_cvtsi32_sd
- _mm_cvtsi32_si128
- _mm_cvtsi32_ss
- _mm_cvtsi64_sd
- _mm_cvtsi64_si128
- _mm_cvtsi64_ss
- _mm_cvtsi64x_sd
- _mm_cvtsi64x_si128
- _mm_cvtss_f32
- _mm_cvtss_sd
- _mm_cvtss_si32
- _mm_cvtss_si64
- _mm_cvttpd_epi32
- _mm_cvttps_epi32
- _mm_cvttsd_si32
- _mm_cvttsd_si64
- _mm_cvttsd_si64x
- _mm_cvttss_si32
- _mm_cvttss_si64
- _mm_div_pd
- _mm_div_ps
- _mm_div_sd
- _mm_div_ss
- _mm_dp_pd
- _mm_dp_ps
- _mm_extract_epi16
- _mm_extract_epi32
- _mm_extract_epi64
- _mm_extract_epi8
- _mm_extract_ps
- _mm_floor_pd
- _mm_floor_ps
- _mm_floor_sd
- _mm_floor_ss
- _mm_getcsr
- _mm_hadd_epi16
- _mm_hadd_epi32
- _mm_hadd_pd
- _mm_hadd_ps
- _mm_hadds_epi16
- _mm_hsub_epi16
- _mm_hsub_epi32
- _mm_hsub_pd
- _mm_hsub_ps
- _mm_hsubs_epi16
- _mm_insert_epi16
- _mm_insert_epi32
- _mm_insert_epi64
- _mm_insert_epi8
- _mm_insert_ps
- _mm_lddqu_si128
- _mm_lfence
- _mm_load1_pd
- _mm_load1_ps
- _mm_load_pd
- _mm_load_pd1
- _mm_load_ps
- _mm_load_ps1
- _mm_load_sd
- _mm_load_si128
- _mm_load_ss
- _mm_loaddup_pd
- _mm_loadh_pd
- _mm_loadl_epi64
- _mm_loadl_pd
- _mm_loadr_pd
- _mm_loadr_ps
- _mm_loadu_pd
- _mm_loadu_ps
- _mm_loadu_si128
- _mm_loadu_si64
- _mm_madd_epi16
- _mm_maddubs_epi16
- _mm_maskmoveu_si128
- _mm_max_epi16
- _mm_max_epi32
- _mm_max_epi8
- _mm_max_epu16
- _mm_max_epu32
- _mm_max_epu8
- _mm_max_pd
- _mm_max_ps
- _mm_max_sd
- _mm_max_ss
- _mm_mfence
- _mm_min_epi16
- _mm_min_epi32
- _mm_min_epi8
- _mm_min_epu16
- _mm_min_epu32
- _mm_min_epu8
- _mm_min_pd
- _mm_min_ps
- _mm_min_sd
- _mm_min_ss
- _mm_minpos_epu16
- _mm_move_epi64
- _mm_move_sd
- _mm_move_ss
- _mm_movedup_pd
- _mm_movehdup_ps
- _mm_movehl_ps
- _mm_moveldup_ps
- _mm_movelh_ps
- _mm_movemask_epi8
- _mm_movemask_pd
- _mm_movemask_ps
- _mm_mpsadbw_epu8
- _mm_mul_epi32
- _mm_mul_epu32
- _mm_mul_pd
- _mm_mul_ps
- _mm_mul_sd
- _mm_mul_ss
- _mm_mulhi_epi16
- _mm_mulhi_epu16
- _mm_mulhrs_epi16
- _mm_mullo_epi16
- _mm_mullo_epi32
- _mm_or_pd
- _mm_or_ps
- _mm_or_si128
- _mm_packs_epi16
- _mm_packs_epi32
- _mm_packus_epi16
- _mm_packus_epi32
- _mm_pause
- _mm_prefetch
- _mm_rcp_ps
- _mm_rcp_ss
- _mm_round_pd
- _mm_round_ps
- _mm_round_sd
- _mm_round_ss
- _mm_rsqrt_ps
- _mm_rsqrt_ss
- _mm_sad_epu8
- _mm_set1_epi16
- _mm_set1_epi32
- _mm_set1_epi64x
- _mm_set1_epi8
- _mm_set1_pd
- _mm_set1_ps
- _mm_set_epi16
- _mm_set_epi32
- _mm_set_epi64x
- _mm_set_epi8
- _mm_set_pd
- _mm_set_pd1
- _mm_set_ps
- _mm_set_ps1
- _mm_set_sd
- _mm_set_ss
- _mm_setcsr
- _mm_setr_epi16
- _mm_setr_epi32
- _mm_setr_epi8
- _mm_setr_pd
- _mm_setr_ps
- _mm_setzero_pd
- _mm_setzero_ps
- _mm_setzero_si128
- _mm_sfence
- _mm_sha1msg1_epu32
- _mm_sha1msg2_epu32
- _mm_sha1nexte_epu32
- _mm_sha1rnds4_epu32
- _mm_sha256msg1_epu32
- _mm_sha256msg2_epu32
- _mm_sha256rnds2_epu32
- _mm_shuffle_epi32
- _mm_shuffle_epi8
- _mm_shuffle_pd
- _mm_shuffle_ps
- _mm_shufflehi_epi16
- _mm_shufflelo_epi16
- _mm_sign_epi16
- _mm_sign_epi32
- _mm_sign_epi8
- _mm_sll_epi16
- _mm_sll_epi32
- _mm_sll_epi64
- _mm_slli_epi16
- _mm_slli_epi32
- _mm_slli_epi64
- _mm_slli_si128
- _mm_sqrt_pd
- _mm_sqrt_ps
- _mm_sqrt_sd
- _mm_sqrt_ss
- _mm_sra_epi16
- _mm_sra_epi32
- _mm_srai_epi16
- _mm_srai_epi32
- _mm_srl_epi16
- _mm_srl_epi32
- _mm_srl_epi64
- _mm_srli_epi16
- _mm_srli_epi32
- _mm_srli_epi64
- _mm_srli_si128
- _mm_store1_pd
- _mm_store1_ps
- _mm_store_pd
- _mm_store_pd1
- _mm_store_ps
- _mm_store_ps1
- _mm_store_sd
- _mm_store_si128
- _mm_store_ss
- _mm_storeh_pd
- _mm_storel_epi64
- _mm_storel_pd
- _mm_storer_pd
- _mm_storer_ps
- _mm_storeu_pd
- _mm_storeu_ps
- _mm_storeu_si128
- _mm_stream_pd
- _mm_stream_ps
- _mm_stream_si128
- _mm_stream_si32
- _mm_stream_si64
- _mm_sub_epi16
- _mm_sub_epi32
- _mm_sub_epi64
- _mm_sub_epi8
- _mm_sub_pd
- _mm_sub_ps
- _mm_sub_sd
- _mm_sub_ss
- _mm_subs_epi16
- _mm_subs_epi8
- _mm_subs_epu16
- _mm_subs_epu8
- _mm_test_all_ones
- _mm_test_all_zeros
- _mm_test_mix_ones_zeros
- _mm_testc_si128
- _mm_testnzc_si128
- _mm_testz_si128
- _mm_ucomieq_sd
- _mm_ucomieq_ss
- _mm_ucomige_sd
- _mm_ucomige_ss
- _mm_ucomigt_sd
- _mm_ucomigt_ss
- _mm_ucomile_sd
- _mm_ucomile_ss
- _mm_ucomilt_sd
- _mm_ucomilt_ss
- _mm_ucomineq_sd
- _mm_ucomineq_ss
- _mm_undefined_pd
- _mm_undefined_ps
- _mm_undefined_si128
- _mm_unpackhi_epi16
- _mm_unpackhi_epi32
- _mm_unpackhi_epi64
- _mm_unpackhi_epi8
- _mm_unpackhi_pd
- _mm_unpackhi_ps
- _mm_unpacklo_epi16
- _mm_unpacklo_epi32
- _mm_unpacklo_epi64
- _mm_unpacklo_epi8
- _mm_unpacklo_pd
- _mm_unpacklo_ps
- _mm_xor_pd
- _mm_xor_ps
- _mm_xor_si128
- _pdep_u32
- _pdep_u64
- _pext_u32
- _pext_u64
- _popcnt32
- _popcnt64
- _rdtsc
- _subborrow_u32
- _subborrow_u64
- _tzcnt_u16
- _tzcnt_u32
- _tzcnt_u64
- cmpxchg16b
Procedure Groups (0)
This section is empty.
Types
_MM_CMPINT_ENUM ¶
_MM_CMPINT_ENUM :: i32
The _MM_CMPINT_ENUM type used to specify comparison operations in AVX-512 intrinsics.
_MM_MANTISSA_NORM_ENUM ¶
_MM_MANTISSA_NORM_ENUM :: i32
The MM_MANTISSA_NORM_ENUM type used to specify mantissa normalized operations in AVX-512 intrinsics.
_MM_MANTISSA_SIGN_ENUM ¶
_MM_MANTISSA_SIGN_ENUM :: i32
The MM_MANTISSA_SIGN_ENUM type used to specify mantissa signed operations in AVX-512 intrinsics.
_MM_PERM_ENUM ¶
_MM_PERM_ENUM :: i32
__m128bh ¶
__m128bh :: #simd[8]u16
__m256bh ¶
__m256bh :: #simd[16]u16
__m512bh ¶
__m512bh :: #simd[32]u16
Constants
_MM_EXCEPT_DENORM ¶
_MM_EXCEPT_DENORM :: 0x0002
_MM_EXCEPT_DIV_ZERO ¶
_MM_EXCEPT_DIV_ZERO :: 0x0004
_MM_EXCEPT_INEXACT ¶
_MM_EXCEPT_INEXACT :: 0x0020
_MM_EXCEPT_INVALID ¶
_MM_EXCEPT_INVALID :: 0x0001
_MM_EXCEPT_MASK ¶
_MM_EXCEPT_MASK :: 0x003f
_MM_EXCEPT_OVERFLOW ¶
_MM_EXCEPT_OVERFLOW :: 0x0008
_MM_EXCEPT_UNDERFLOW ¶
_MM_EXCEPT_UNDERFLOW :: 0x0010
_MM_FLUSH_ZERO_MASK ¶
_MM_FLUSH_ZERO_MASK :: 0x8000
_MM_FLUSH_ZERO_OFF ¶
_MM_FLUSH_ZERO_OFF :: 0x0000
_MM_FLUSH_ZERO_ON ¶
_MM_FLUSH_ZERO_ON :: 0x8000
_MM_FROUND_CEIL ¶
_MM_FROUND_CEIL :: _MM_FROUND_RAISE_EXC | _MM_FROUND_TO_POS_INF
_MM_FROUND_CUR_DIRECTION ¶
_MM_FROUND_CUR_DIRECTION :: 0x04
_MM_FROUND_FLOOR ¶
_MM_FROUND_FLOOR :: _MM_FROUND_RAISE_EXC | _MM_FROUND_TO_NEG_INF
_MM_FROUND_NEARBYINT ¶
_MM_FROUND_NEARBYINT :: _MM_FROUND_NO_EXC | _MM_FROUND_CUR_DIRECTION
_MM_FROUND_NINT ¶
_MM_FROUND_NINT :: 0x00
_MM_FROUND_NO_EXC ¶
_MM_FROUND_NO_EXC :: 0x08
_MM_FROUND_RAISE_EXC ¶
_MM_FROUND_RAISE_EXC :: 0x00
_MM_FROUND_RINT ¶
_MM_FROUND_RINT :: _MM_FROUND_RAISE_EXC | _MM_FROUND_CUR_DIRECTION
_MM_FROUND_TO_NEG_INF ¶
_MM_FROUND_TO_NEG_INF :: 0x01
_MM_FROUND_TO_POS_INF ¶
_MM_FROUND_TO_POS_INF :: 0x02
_MM_FROUND_TO_ZERO ¶
_MM_FROUND_TO_ZERO :: 0x03
_MM_FROUND_TRUNC ¶
_MM_FROUND_TRUNC :: _MM_FROUND_RAISE_EXC | _MM_FROUND_TO_ZERO
_MM_HINT_ET0 ¶
_MM_HINT_ET0 :: 7
_MM_HINT_ET1 ¶
_MM_HINT_ET1 :: 6
_MM_HINT_NTA ¶
_MM_HINT_NTA :: 0
_MM_HINT_T0 ¶
_MM_HINT_T0 :: 3
_MM_HINT_T1 ¶
_MM_HINT_T1 :: 2
_MM_HINT_T2 ¶
_MM_HINT_T2 :: 1
_MM_MASK_DENORM ¶
_MM_MASK_DENORM :: 0x0100
_MM_MASK_DIV_ZERO ¶
_MM_MASK_DIV_ZERO :: 0x0200
_MM_MASK_INEXACT ¶
_MM_MASK_INEXACT :: 0x1000
_MM_MASK_INVALID ¶
_MM_MASK_INVALID :: 0x0080
_MM_MASK_MASK ¶
_MM_MASK_MASK :: 0x1f80
_MM_MASK_OVERFLOW ¶
_MM_MASK_OVERFLOW :: 0x0400
_MM_MASK_UNDERFLOW ¶
_MM_MASK_UNDERFLOW :: 0x0800
_MM_ROUND_DOWN ¶
_MM_ROUND_DOWN :: 0x2000
_MM_ROUND_MASK ¶
_MM_ROUND_MASK :: 0x6000
_MM_ROUND_NEAREST ¶
_MM_ROUND_NEAREST :: 0x0000
_MM_ROUND_TOWARD_ZERO ¶
_MM_ROUND_TOWARD_ZERO :: 0x6000
_MM_ROUND_UP ¶
_MM_ROUND_UP :: 0x4000
_SIDD_BIT_MASK ¶
_SIDD_BIT_MASK :: 0b0000_0000
_SIDD_CMP_EQUAL_ANY ¶
_SIDD_CMP_EQUAL_ANY :: 0b0000_0000
_SIDD_CMP_EQUAL_EACH ¶
_SIDD_CMP_EQUAL_EACH :: 0b0000_1000
_SIDD_CMP_EQUAL_ORDERED ¶
_SIDD_CMP_EQUAL_ORDERED :: 0b0000_1100
_SIDD_CMP_RANGES ¶
_SIDD_CMP_RANGES :: 0b0000_0100
_SIDD_LEAST_SIGNIFICANT ¶
_SIDD_LEAST_SIGNIFICANT :: 0b0000_0000
_SIDD_MASKED_NEGATIVE_POLARITY ¶
_SIDD_MASKED_NEGATIVE_POLARITY :: 0b0011_0000
_SIDD_MASKED_POSITIVE_POLARITY ¶
_SIDD_MASKED_POSITIVE_POLARITY :: 0b0010_0000
_SIDD_MOST_SIGNIFICANT ¶
_SIDD_MOST_SIGNIFICANT :: 0b0100_0000
_SIDD_NEGATIVE_POLARITY ¶
_SIDD_NEGATIVE_POLARITY :: 0b0001_0000
_SIDD_POSITIVE_POLARITY ¶
_SIDD_POSITIVE_POLARITY :: 0b0000_0000
_SIDD_SBYTE_OPS ¶
_SIDD_SBYTE_OPS :: 0b0000_0010
_SIDD_SWORD_OPS ¶
_SIDD_SWORD_OPS :: 0b0000_0011
_SIDD_UBYTE_OPS ¶
_SIDD_UBYTE_OPS :: 0b0000_0000
_SIDD_UNIT_MASK ¶
_SIDD_UNIT_MASK :: 0b0100_0000
_SIDD_UWORD_OPS ¶
_SIDD_UWORD_OPS :: 0b0000_0001
Variables
This section is empty.
Procedures
_MM_GET_EXCEPTION_MASK ¶
_MM_GET_EXCEPTION_MASK :: proc "c" () -> u32 {…}
_MM_GET_EXCEPTION_STATE ¶
_MM_GET_EXCEPTION_STATE :: proc "c" () -> u32 {…}
_MM_GET_FLUSH_ZERO_MODE ¶
_MM_GET_FLUSH_ZERO_MODE :: proc "c" () -> u32 {…}
_MM_GET_ROUNDING_MODE ¶
_MM_GET_ROUNDING_MODE :: proc "c" () -> u32 {…}
_MM_SET_EXCEPTION_MASK ¶
_MM_SET_EXCEPTION_MASK :: proc "c" (x: u32) {…}
_MM_SET_EXCEPTION_STATE ¶
_MM_SET_EXCEPTION_STATE :: proc "c" (x: u32) {…}
_MM_SET_FLUSH_ZERO_MODE ¶
_MM_SET_FLUSH_ZERO_MODE :: proc "c" (x: u32) {…}
_MM_SET_ROUNDING_MODE ¶
_MM_SET_ROUNDING_MODE :: proc "c" (x: u32) {…}
_MM_SHUFFLE ¶
_MM_SHUFFLE :: intrinsics.simd_x86__MM_SHUFFLE
_MM_SHUFFLE(z, y, x, w) -> (z<<6 | y<<4 | x<<2 | w)
_MM_TRANSPOSE4_PS ¶
_MM_TRANSPOSE4_PS :: proc "c" (row0, row1, row2, row3: ^#simd[4]f32) {…}
_fxrstor ¶
_fxrstor :: proc "c" (mem_addr: rawptr) {…}
_fxrstor64 ¶
_fxrstor64 :: proc "c" (mem_addr: rawptr) {…}
_fxsave64 ¶
_fxsave64 :: proc "c" (mem_addr: rawptr) {…}
_mm_clflush ¶
_mm_clflush :: proc "c" (p: rawptr) {…}
_mm_cvt_si2ss ¶
_mm_cvt_si2ss :: _mm_cvtsi32_ss
_mm_cvt_ss2si ¶
_mm_cvt_ss2si :: _mm_cvtss_si32
_mm_cvttss_si32 ¶
_mm_cvttss_si32 :: _mm_cvtss_si32
_mm_getcsr ¶
_mm_getcsr :: proc "c" () -> (result: u32) {…}
_mm_lfence ¶
_mm_lfence :: proc "c" () {…}
_mm_load_ps1 ¶
_mm_load_ps1 :: _mm_load1_ps
_mm_mfence ¶
_mm_mfence :: proc "c" () {…}
_mm_pause ¶
_mm_pause :: proc "c" () {…}
_mm_set_ps1 ¶
_mm_set_ps1 :: _mm_set1_ps
_mm_setcsr ¶
_mm_setcsr :: proc "c" (val: u32) {…}
_mm_setzero_pd ¶
_mm_setzero_pd :: proc "c" () -> #simd[2]f64 {…}
_mm_setzero_ps ¶
_mm_setzero_ps :: proc "c" () -> #simd[4]f32 {…}
_mm_setzero_si128 ¶
_mm_setzero_si128 :: proc "c" () -> #simd[2]i64 {…}
_mm_sfence ¶
_mm_sfence :: proc "c" () {…}
_mm_store_ps1 ¶
_mm_store_ps1 :: _mm_store1_ps
_mm_undefined_pd ¶
_mm_undefined_pd :: proc "c" () -> #simd[2]f64 {…}
_mm_undefined_ps ¶
_mm_undefined_ps :: proc "c" () -> #simd[4]f32 {…}
_mm_undefined_si128 ¶
_mm_undefined_si128 :: proc "c" () -> #simd[2]i64 {…}
cmpxchg16b ¶
cmpxchg16b :: proc "c" (dst: ^u128, old, new: u128, $success, $failure: .Atomic_Memory_Order) -> (val: u128) {…}
Procedure Groups
This section is empty.
Source Files
- abm.odin
- adx.odin
- aes.odin
- bmi.odin
- bmi2.odin
- cmpxchg16b.odin
- doc.odin
- fxsr.odin
- pclmulqdq.odin
- rdtsc.odin
- sha.odin
- sse.odin
- sse2.odin
- sse3.odin
- sse41.odin
- sse42.odin
- ssse3.odin
- types.odin
Generation Information
Generated with odin version dev-2026-03 (vendor "odin") Windows_amd64 @ 2026-03-31 21:29:49.887635500 +0000 UTC